JP2006259076A - Image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image forming apparatus capable of suppressing the increase of a cost by reducing the number of terminals for an ASIC for controlling a high-voltage power source apparatus. <P>SOLUTION: The image forming apparatus includes; a detection voltage output means for outputting the detection voltage proportional to the output of the high-voltage power source; a multiplexer with an output stopping function; a triangular wave generating means for generating a triangular wave; an analog-digital conversion means for comparing the output of the detection voltage output means with the output of the triangular wave generating means and converting the output to a pulse; and a high-voltage power source control means for controlling the output of the high-voltage power source in accordance with a width of the pulse generated by the analog-digital conversion means. The image forming apparatus also includes a control part for counting the triangular waves and stopping the output of the multiplexer at a prescribed timing. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an image forming apparatus and an image processing apparatus, and an image forming apparatus for obtaining an image by applying a transfer electric field to a recording medium from a toner image on a latent image carrier formed by an electrophotographic method or an electrostatic recording method. The present invention relates to an image forming processing apparatus.

  In general, a plurality of high-voltage power supply devices are used in an image forming apparatus using electrophotographic technology. For example, a temporary charging device that charges an image carrier, a developing bias device that charges toner to develop an electrostatic latent image formed on the surface of the image carrier, and a toner image developed on the image carrier such as paper For example, a transfer high-pressure apparatus for transferring onto a medium.

  In order to control the high-voltage power supply device, the detection voltage proportional to the output voltage of the high-voltage power supply is normally AD converted, input to an ASIC that controls the image forming apparatus, and the high-voltage power supply device is PWM controlled based on the detection result Is required. If there are a plurality of high-voltage power supply devices, more detection inputs and more control outputs are required. Of course, the ASIC requires more terminals, which increases the ASIC scale and may increase the cost.

  In order to avoid this problem, conventionally, a multiplexer is connected to a single AD converter, and the multiplexer is controlled by an ASIC, and the number of terminals is controlled by switching the inputs in a time division manner (for example, patents). Reference 1). Further, in the method of converting the AD conversion unit into the pulse width by comparing the triangular wave and the detection voltage, the number of terminals corresponding to the resolution required for the normal AD conversion method (for example, 4 for the resolution 16 and 6 for the 64) is required. Can be replaced with one, and the number of terminals can be further reduced.

  FIG. 1 is a block diagram of a switching power supply having a conventional negative feedback control system.

  In this block diagram, T1 is a transformer, and is provided with a primary winding N1 and a secondary winding N2. One end of the primary winding N1 is connected to a positive terminal of a DC power supply that supplies a voltage Vin, and a negative terminal of the DC power supply is connected to a reference potential. As this voltage Vin, for example, a voltage obtained by full-wave rectifying a commercial power supply and smoothing it with a capacitor C0 can be considered. The other end of the primary winding N1 is connected to the drain of the FET Q1, which is a switching element, and one end of a capacitor C1. The source of the FET Q1 and the other end of the capacitor C1 are connected to a reference potential.

  One end of the secondary winding N2 is connected to the anode of the diode D1, and the other end is connected to the reference potential. A voltage Vout corresponding to a ratio with the number of windings of the primary winding N1 is induced in the secondary winding N2. The positive terminal of the smoothing capacitor C2 is connected to the cathode of the diode D1, and the negative terminal of the capacitor C2 is connected to the reference potential. A voltage dividing circuit 1 arranged in parallel with the capacitor C2 is connected to the cathode of the diode D1. The voltage dividing circuit 1 divides the voltage Vout, and the divided voltage value is selected by the multiplexer 6 and output to the minus terminal of the comparator 3.

  The triangular wave of the triangular wave generating circuit 3 is input to the plus terminal of the comparator 2. The output pulse signal S1 of the comparator 2 is counted by the pulse width counter 4 through the selector 7 and the pulse width is counted by a clock having a predetermined period, and the count value S2 is calculated. The multiplexer 6 is controlled by the selection unit 8 in the ASIC. If the number of inputs is 8, three signal lines are required. Further, the selector in the ASIC also performs A / D conversion of the secondary side divided voltage output with 2, 3, and 4 configurations.

As shown in FIG. 2, if the value of the voltage dividing circuit output V1 is high, the width of S1 is narrowed and the count value S2 is small. Conversely, if the value of V1 is low, the width of S1 increases and the count value S2 increases. The count value S2 is reset during a period when the pulse S1 is not output, and is latched by the drive pulse generation unit 5 at the falling edge of the pulse S1, and the drive pulse generation unit 5 uses the latched count value S2 and a reference. When the values are compared and S2 is smaller than the reference value, it is determined that Vout is higher than the desired value, and the drive pulse S3 is controlled in a direction in which the duty decreases. Conversely, when S2 is larger than the reference value, it is determined that Vout is lower than the desired value, and the drive pulse S3 is controlled in a direction in which the duty increases. By inputting such a drive pulse S3 to the gate of the FET Q1, negative feedback control of the secondary output Vout is performed.
Japanese Patent Laid-Open No. 06-153385

  However, as the image forming apparatus is digitized, the number of objects to be controlled by the ASIC increases, and the scale of the ASIC continues to expand.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide an image forming apparatus that further reduces the number of ASIC terminals in order to suppress an increase in the ASIC scale that leads to an increase in cost.

  In order to achieve the above object, the invention described in claim 1 controls the detection voltage output means for outputting a detection voltage proportional to the output of the high voltage power supply, the triangular wave generation means for generating a triangular wave, and the triangular wave generation means. Triangular wave control means, analog-digital conversion means for comparing the outputs of the detection voltage output means and the triangular wave generation means and converting them into pulses, and according to the pulse width generated by the analog-digital conversion means In the image forming apparatus having the high-voltage power supply control means for controlling the output, the triangular wave control means provides a period in which a triangular wave is not generated once every predetermined number of times.

  According to a second aspect of the present invention, in the image forming apparatus according to the first aspect, a multiplexer is provided at the input of the analog-digital conversion means, and the input is selected from the detection voltages of the plurality of detection voltage means and input to the analog-digital conversion means. The selection is made by a triangular wave control means.

  According to a third aspect of the present invention, in the image forming apparatus according to the first aspect, the triangular wave control means sets the multiplexer in a non-selected state during a period when the triangular wave is not generated, and adjusts the multiplexer according to the generation of the triangular wave during the period when the triangular wave is generated. The operation of sequentially switching inputs is defined as one cycle, and the one cycle operation is repeated.

  According to a fourth aspect of the present invention, in the image forming apparatus according to the first aspect, the number of times the triangular wave is generated in the period in which the triangular wave is generated is the number of inputs of the multiplexer.

  According to a fifth aspect of the present invention, in the image forming apparatus according to the first aspect, the high-voltage power supply control unit detects a period in which the triangular wave is not generated and detects a start point of the cycle operation.

  According to the present invention, in a switching power supply having a configuration in which a plurality of analog signals input to an analog / digital conversion unit of a switching power supply for negative feedback control are selectively input by a multiplexer, each triangular wave related to analog / digital conversion is obtained for each wave. Switching the multiplexer input and stopping the output of the multiplexer for a predetermined period for each number of multiplexer inputs, the controller of the switching power supply built in Asic recognizes the output stop state of the multiplexer as the reset period and resets it. By recognizing pulses sequentially input from the subsequent pulse as each channel of the multiplexer and controlling the switching power supply, the terminal for controlling the multiplexer by Asic becomes unnecessary, and the number of terminals of Asic can be reduced. .

  Hereinafter, the present invention will be described in detail with reference to the drawings.

  FIG. 3 is a block diagram showing the configuration of the present invention. A pulse count & multiplexer selection unit 9 is added to the configuration of the conventional example, and the function of the selection unit 8 in the ASIC is changed. The multiplexer 6 has an output enable terminal for enabling / disabling the output.

  FIG. 4 is a timing chart of this operation. A pulse count & multiplexer selection unit (hereinafter referred to as PM unit) counts the triangular wave generated by the triangular wave generation circuit 3 and switches the input of the multiplexer 6 for each pulse. The multiplexer 6 has 8 inputs and receives V1 output from the voltage dividing circuit 1 and V1 to V1g output from seven voltage dividing circuits (not shown). As shown in the figure, the channel is switched for each triangular wave, and the signals of each channel are sequentially selected and output.

  Further, the output of the multiplexer 6 is masked for a predetermined period for every 8 input channels of the multiplexer 6. The mask period in the figure is the timing. When the predetermined mask period ends, the signals are sequentially selected and output again from V1 of one channel. The comparator 2 is repeatedly inputted with 1-8 channel selection outputs and Mask signal states. Then, as shown in S1 of FIG. 4, a pulse having a width corresponding to each channel and a Low signal for a predetermined mask period are input to Asic.

  The selection unit 8 in the Asic resets every predetermined low period of the signal S1, sets the pulse immediately after the reset as the first V1 pulse in the eight channels, controls the selector 7, and outputs the signal S1 to the high voltage control unit 1 . Thereafter, the pulses of the S1 signal corresponding to V1a to V1g, which are 2 to 8 channel signals, are similarly sequentially selected and output to the high voltage controllers 2 to 8.

  By adopting such a configuration, a terminal for a selection signal that has been conventionally used to control an external multiplexer from Asic becomes unnecessary, and the number of Asic terminals can be reduced.

Configuration diagram of a conventional power supply device The figure which shows the mode of the pulse generation by the comparison operation of the divided wave output of the triangular wave and the voltage dividing circuit Configuration diagram of power supply device according to the present invention The figure which shows the mode of the pulse generation by the comparison operation of the triangular wave in this invention and the partial pressure output of a voltage dividing circuit

Explanation of symbols

1 Voltage Divider 2 Comparator 3 Triangle Wave Generator 4 Pulse Width Counter 5 Drive Pulse Generator 6 Multiplexer 7 Selector 8 Selector 9 Pulse Count & Multiplexer Selector C0, C1, C2 Capacitor D1 Diode Q1 FET
T1 transformer

Claims (4)

Detection voltage output means for outputting a detection voltage proportional to the output of the high-voltage power supply;
A multiplexer with an output stop function,
A triangular wave generating means for generating a triangular wave;
Having analog-digital conversion means for comparing the output of the detection voltage output means and the output of the triangular wave generation means to convert them into pulses,
In an image forming apparatus having a high voltage power supply control means for controlling the output of a high voltage power supply in accordance with a pulse width generated by the analog-digital conversion means,
An image forming apparatus comprising: a control unit that counts the triangular wave and stops the output of the multiplexer at a predetermined timing.   2. The image forming apparatus according to claim 1, wherein an output of the multiplexer is sequentially selected for each of the triangular waves.   2. The image forming apparatus according to claim 1, wherein a cycle of stopping the output of the multiplexer for a predetermined period is repeated for each input number of the multiplexer.   2. The image forming apparatus according to claim 1, wherein the high-voltage power supply control unit detects an output stop state of the multiplexer and detects a start point of the cycle operation.

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