CN112491274B - Power supply control device and method and switching power supply system - Google Patents
Power supply control device and method and switching power supply system Download PDFInfo
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- CN112491274B CN112491274B CN201910775200.7A CN201910775200A CN112491274B CN 112491274 B CN112491274 B CN 112491274B CN 201910775200 A CN201910775200 A CN 201910775200A CN 112491274 B CN112491274 B CN 112491274B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
Abstract
The present disclosure relates to a power supply control device, method and switching power supply system, the control device including: a sample-hold module, an error amplification module, a control module, a degaussing time sampling module, an anti-interference buffer module, a sample-hold module, used for sampling and holding the feedback voltage of the switching power supply to obtain a feedback voltage signal, an error amplification module, for comparing the feedback voltage signal with a preset reference voltage signal to obtain an error amplified signal, an anti-interference buffer module, the module is used for determining whether the feedback voltage signal is interfered or not according to the error amplification signal and determining a buffer signal, if the feedback voltage signal is interfered, the buffer signal is a preset pull-up voltage signal, if the feedback voltage signal is not interfered, the buffer signal is the error amplification signal, the degaussing time sampling module, the demagnetization control circuit comprises a demagnetization time signal used for sampling the switching power supply, and a control module used for generating a switching signal according to the buffer signal and the demagnetization time signal.
Description
Technical Field
The present disclosure relates to the field of electronic control technologies, and in particular, to a power control apparatus and method, and a switching power supply system.
Background
With the continuous development of electronic information technology, the requirements for power supplies equipped for electronic products are also increasing. In order to meet various requirements of electronic products, a stable power supply needs to be provided to ensure that the electronic products can stably work under various conditions. The Flyback switching power supply is often selected as a power supply of an electronic product due to advantages of simple structure, low cost, and the like, and when the Flyback switching power supply is used, a corresponding power supply control device (such as an AC/DC control chip) is required to be equipped to control the switching power supply so as to realize constant voltage output. The auxiliary coil of the switching power supply samples secondary voltage, the power supply control device provides the sampled output voltage for the error amplifier, and the error amplifier amplifies the sampled output voltage and reference voltage to realize control of the conduction time and working frequency of a power switching tube of the switching power supply.
However, the power control device is easily subjected to external interference, and especially in an ESD (Electro-Static Discharge, chinese: electrostatic Discharge) test scenario, a signal received by a voltage feedback terminal of the power control device is raised instantaneously, and the power control device misjudges that a current load state of the switching power supply is a light load, so that a voltage output by the switching power supply is greatly reduced, and even a short-circuit protection turn-off system (i.e., a hicup mode) is triggered, thereby affecting normal use of the whole electronic product.
Disclosure of Invention
The invention aims to provide a power supply control device, a power supply control method and a switching power supply system, which are used for solving the problem that the switching power supply output is unstable due to the fact that the power supply control device in the prior art is easily interfered by the outside.
In order to achieve the above object, according to a first aspect of embodiments of the present disclosure, there is provided a power supply control device including: the device comprises a sampling and holding module, an error amplification module, a control module, a degaussing time sampling module and an anti-interference buffer module;
the input end of the sampling and holding module is a voltage feedback end of the control device, the output end of the sampling and holding module is connected with the input end of the error amplification module, the output end of the error amplification module is connected with the input end of the anti-interference buffer module, the output end of the anti-interference buffer module is connected with a first input end of the control module, the output end of the control module is the output end of the control device, the input end of the demagnetization time sampling module is connected with the input end of the sampling and holding module, and the output end of the demagnetization time sampling module is connected with a second input end of the control module;
the sampling and holding module is used for sampling and holding the feedback voltage of the switching power supply to obtain a feedback voltage signal;
the error amplification module is used for comparing the feedback voltage signal with a preset reference voltage signal to obtain an error amplification signal;
the anti-interference buffer module is configured to determine whether the feedback voltage signal is interfered according to the error amplification signal, and determine a buffer signal, where the buffer signal is a preset pull-up voltage signal if the feedback voltage signal is interfered, and the buffer signal is the error amplification signal if the feedback voltage signal is not interfered;
the demagnetization time sampling module is used for sampling a demagnetization time signal of the switching power supply;
the control module is used for generating a switching signal according to the buffer signal and the degaussing time signal, and the switching signal is used for controlling a power switch tube of the switching power supply.
Optionally, the control device further comprises: the input end of the compensation module is connected with the output end of the error amplification module, the input end of the compensation module is also connected with the output end of the control module, and the output end of the compensation module is connected with the input end of the sampling and holding module;
and the compensation module is used for generating a compensation voltage signal according to the error amplification signal and the switching signal and superposing the compensation voltage signal to the sampling and holding module for compensation.
Optionally, the control module comprises: the constant-current constant-voltage control system comprises a constant-current constant-voltage submodule, a logic control submodule and a driving submodule;
the first input end of the constant-current and constant-voltage submodule is the first input end of the control module, the second input end of the constant-current and constant-voltage submodule is the second input end of the control module, the output end of the constant-current and constant-voltage submodule is connected with the input end of the logic control submodule, the output end of the logic control submodule is connected with the input end of the driving submodule, and the output end of the driving submodule is the output end of the control module;
the constant-current and constant-voltage submodule is used for generating a control signal according to the buffer signal and the degaussing time signal, and the control signal is used for indicating the working period and the conducting time of the power switch tube;
the logic control submodule is used for generating a switch logic control signal according to the control signal;
and the driving submodule is used for generating the switching signal according to the switching logic control signal.
Optionally, the antijam buffering module includes: the first control switch, the comparison submodule and the trigger submodule;
the input end of the comparison submodule is the input end of the anti-interference buffer module, the output end of the comparison submodule is connected with the input end of the trigger submodule, and the output end of the trigger submodule is connected with the control end of the first control switch;
the comparison submodule is used for comparing the error amplification signal with a first voltage to obtain a first comparison signal and comparing the error amplification signal with a second voltage to obtain a second comparison signal;
the trigger submodule is used for triggering a switch control signal according to the first comparison signal and the second comparison signal;
the switch control signal is used for controlling the first control switch to determine the buffer signal.
Optionally, the first control switch is configured to determine the buffer signal as the pull-up voltage signal by controlling a pull-up power supply to be connected to a first input terminal of the control module if the feedback voltage signal is interfered;
the first control switch is further configured to control the first control switch to connect the output end of the error amplification module with the first input end of the control module if the feedback voltage signal is not interfered, and determine the buffer signal as the error amplification signal.
Optionally, the comparison submodule includes: a first comparator and a second comparator;
the positive phase input end of the first comparator is connected with the first voltage, the negative phase input end of the first comparator is connected with the error amplification signal, the positive phase input end of the second comparator is connected with the second voltage, the negative phase input end of the second comparator is connected with the error amplification signal, and the output end of the first comparator and the output end of the second comparator are both connected with the trigger submodule.
Optionally, the trigger submodule includes: the first RS trigger, the second RS trigger, the first NOT gate, the first NAND gate and the second NAND gate;
the output end of the first comparator is connected with the S end of the first RS flip-flop through the first not gate, the R end of the first RS flip-flop is connected with the switch logic control signal, the output end of the first RS flip-flop is connected with the first input end of the first nand gate, the output end of the second comparator is connected with the second input end of the first nand gate, the output end of the first nand gate is connected with the first input end of the second nand gate, the second input end of the second nand gate is connected with the enable signal, the output end of the second nand gate is connected with the R end of the second RS flip-flop, the S end of the second RS flip-flop is connected with the demagnetization time signal of the switch power supply, and the output end of the second RS flip-flop is the output end of the trigger submodule.
According to a second aspect of the embodiments of the present disclosure, there is provided a power supply control method applied to the power supply control apparatus of the first aspect of the embodiments of the present disclosure, the method including:
comparing a feedback voltage signal of the switching power supply with a preset reference voltage signal to obtain an error amplification signal;
determining whether the feedback voltage signal is interfered according to the error amplification signal;
if the feedback voltage signal is interfered, controlling a power switch tube of the switch power supply according to a preset pull-up voltage signal and a demagnetization time signal of the switch power supply;
and if the feedback voltage signal is not interfered, controlling the power switch tube according to the feedback voltage signal and the degaussing time signal.
According to a third aspect of embodiments of the present disclosure, there is provided a switching power supply system, the system including: the voltage feedback end of the power supply control device is connected with the feedback voltage of the switching power supply, and the output end of the power supply control device is connected with the power switch tube of the switching power supply.
Through the technical scheme, the power control device in the disclosure comprises a sample-and-hold module, an error amplification module, a control module, a demagnetization time sampling module and an anti-interference buffer module, wherein the sample-and-hold module is used for performing sample-and-hold on a feedback voltage of a switching power supply to obtain a feedback voltage signal, the error amplification module is used for comparing the feedback voltage signal with a preset reference voltage signal to obtain an error amplification signal, the anti-interference buffer module is used for determining whether the feedback voltage signal is interfered according to the error amplification signal and determining a buffer signal, if the feedback voltage signal is interfered, the buffer signal is a preset pull-up voltage signal, if the feedback voltage signal is not interfered, the buffer signal is the error amplification signal, the demagnetization time sampling module is used for sampling a demagnetization time signal of the switching power supply, and the control module, and the switching circuit is used for generating a switching signal according to the buffer signal and the degaussing time signal, and the switching signal is used for controlling a power switching tube of the switching power supply. This is disclosed whether receive the interference according to feedback voltage signal through anti-interference buffer module, adjusts the buffer signal who exports control module, can avoid switching power supply because receive external disturbance, lead to the problem that underloading even restarted, has improved switching power supply output voltage's stability.
Additional features and advantages of the disclosure will be set forth in the detailed description which follows.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure, but do not constitute a limitation of the disclosure. In the drawings:
FIG. 1 is a block diagram illustrating a power control apparatus according to an exemplary embodiment;
FIG. 2 is a schematic diagram of the power control apparatus of FIG. 1 connected to a switching power supply;
FIG. 3 is a block diagram illustrating another power control apparatus according to an exemplary embodiment;
FIG. 4 is a block diagram of a control module in the power control apparatus of FIG. 1;
FIG. 5 is a block diagram of an anti-jamming buffer module according to the power control apparatus of FIG. 1;
FIG. 6 is a schematic diagram illustrating the connection of the anti-interference buffer module in the power control apparatus shown in FIG. 4;
FIG. 7 is a signal waveform diagram of an anti-interference buffer module in the power control apparatus shown in FIG. 6;
FIG. 8a is a signal waveform diagram of a power control device without an anti-interference buffer module;
FIG. 8b is a signal waveform diagram according to the power control apparatus shown in FIG. 6;
FIG. 9 is a flow chart illustrating a power control method according to an exemplary embodiment;
fig. 10 is a schematic diagram illustrating a switching power supply system according to an exemplary embodiment.
Description of the reference numerals
101 sample-and-hold module 102 error amplification module
103 degaussing time sampling module 104 control module
105 anti-jamming buffer module 106 compensation module
1041 constant current and constant voltage submodule 1042 logic control submodule
1043 drive submodule 1053 first control switch
1051 compare submodule 1052 trigger submodule
COM1 first comparator COM2 second comparator
RS1 first RS flip-flop RS2 second RS flip-flop
N1 first NOT gate N2 first NAND gate
N3 TDS degaussing time signal of second NAND gate
PUL switch logic control signal for VEA error amplification signal
Output signal EN of PAE RS1 enables signal
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below do not represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.
Fig. 1 is a block diagram illustrating a power control apparatus according to an exemplary embodiment, and as shown in fig. 1, the control apparatus 100 includes: a sample-and-hold module 101, an error amplification module 102, a degaussing time sampling module 103, a control module 104, and an anti-jamming buffer module 105.
The input end of the sample-and-hold module 101 is a voltage feedback end of the control device, the output end of the sample-and-hold module 101 is connected with the input end of the error amplification module 102, the output end of the error amplification module 102 is connected with the input end of the anti-interference buffer module 105, the output end of the anti-interference buffer module 105 is connected with a first input end of the control module 104, the output end of the control module 104 is an output end of the control device, the input end of the demagnetization time sampling module 103 is connected with the input end of the sample-and-hold module 101, and the output end of the demagnetization time sampling module 103 is connected with a second input end of the control module 104.
And the sample-and-hold module 101 is configured to sample and hold a feedback voltage of the switching power supply to obtain a feedback voltage signal.
The error amplifying module 102 is configured to compare the feedback voltage signal with a preset reference voltage signal to obtain an error amplified signal.
The anti-interference buffer module 105 is configured to determine whether the feedback voltage signal is interfered according to the error amplification signal, and determine a buffer signal, where the buffer signal is a preset pull-up voltage signal if the feedback voltage signal is interfered, and the buffer signal is the error amplification signal if the feedback voltage signal is not interfered.
And the demagnetization time sampling module 103 is used for sampling a demagnetization time signal of the switching power supply.
And the control module 104 is configured to generate a switching signal according to the buffer signal and the degaussing time signal, where the switching signal is used to control a power switch tube of the switching power supply.
For example, the schematic diagram of the power control apparatus 100 and the switching power supply shown in fig. 2 is taken as an example, wherein the output terminal of the power control apparatus 100 is connected to the base of the transistor Q1 of the switching power supplyThen, the power control device 100 outputs a switching signal DRI to control the on/off state of the transistor Q1, so as to convert the Alternating Current (english: Alternating Current) into a stable Direct Current (english: Direct Current). When the transistor Q1 is turned on, the DC power supply VACThe input voltage charges the primary winding (including terminals 1 and 4). When the transistor Q1 is turned off, the energy in the primary winding is transferred to the secondary winding (including terminals 5 and 6), and the filter capacitor C5 stores energy, so that the output voltage VOUT of the switching power supply can only occur during the degaussing time of the secondary diode D6. The output voltage VOUT is divided by the coupling of the secondary winding and the auxiliary winding (including the 2 terminal and the 3 terminal) and the voltage dividing resistors R5 and R6 to obtain a feedback voltage VFB of the switching power supply, and the feedback voltage VFB is input to the sample-and-hold module 101 through the voltage feedback terminal of the control device 100. The power control device 100 may further include a power feedback terminal connected to the emitter of the transistor Q1, and a power supply terminal connected to the 2-terminal of the auxiliary winding through a diode.
Firstly, the sampling and holding module 101 samples and holds the feedback voltage VFB of the switching power supply to obtain a feedback voltage signal VSH, and then the feedback voltage signal VSH is input to the error amplification module 102, and the error amplification module 102 compares the feedback voltage signal VSH with a preset reference voltage signal Vref to obtain an error amplification signal VEA.
Then, the error amplification signal VEA is input to the anti-interference buffer module 105, and the anti-interference buffer module 105 determines whether the feedback voltage signal VSH is interfered according to the error amplification signal VEA, and further determines the buffer signal BUFF. The error amplification signal VEA may be compared with a first voltage value and a second voltage value, respectively, to determine whether the feedback voltage signal VSH is interfered. For example, the first voltage value is 3V, the second voltage value is 1.5V, when the error amplification signal VEA is greater than 3V, the load state is determined to be full (i.e., the feedback voltage signal VSH is not disturbed), and when the error amplification signal VEA is less than 1.5V, the feedback voltage signal VSH is determined to be disturbed (it can be understood that the control device 100 is disturbed by the outside). If the feedback voltage signal VSH is determined to be interfered, the buffer signal BUFF is set to be a preset pull-up voltage signal (output by a pull-up power supply), and the pull-up voltage signal is at a high level. If the feedback voltage signal is determined not to be interfered, the buffer signal BUFF is set as the error amplification signal VEA.
Finally, the control module 104 generates a switching signal DRI according to the buffer signal BUFF and the demagnetization time signal TDS of the switching power supply sampled by the demagnetization time sampling module 103, and the switching signal DRI controls the on-time and the operating frequency of the transistor Q1, so that the switching power supply realizes a constant output voltage VOUT. The switching signal DRI can control the on-time and the operating Frequency of the transistor Q1 through an analog control mode of PWM (Pulse Width Modulation, chinese) and PFM (Pulse Frequency Modulation, chinese).
If the feedback voltage signal VSH is disturbed and the corresponding buffer signal BUFF is a pull-up voltage signal (i.e., a high level), the control module 104 may output the switching signal DRI according to a state that the load state is full load, so that the on-time and the operating frequency of the transistor Q1 can be maintained normal, i.e., the on-time and the operating frequency corresponding to the state that the load state is full load. If the feedback voltage signal VSH is not interfered and the corresponding buffer signal BUFF is set as the error amplification signal VEA, the control module 104 determines the switching signal DRI according to the error amplification signal VEA and the demagnetization time sampling module 103 according to the normal control flow, so that the conduction time and the working frequency of the triode Q1 can be maintained normal, that is, the conduction time and the working frequency are controlled according to the load state indicated by the error amplification signal VEA. Therefore, the power supply control device provided by the disclosure can adjust the buffer signal output to the control module according to whether the feedback voltage signal is interfered, thereby avoiding the problem of light load and even restart due to external interference and improving the stability of the output voltage of the switching power supply.
In summary, the power control apparatus in the disclosure includes a sample-and-hold module, an error amplification module, a control module, a demagnetization time sampling module, and an anti-interference buffer module, where the sample-and-hold module is configured to sample and hold a feedback voltage of a switching power supply to obtain a feedback voltage signal, the error amplification module is configured to compare the feedback voltage signal with a preset reference voltage signal to obtain an error amplification signal, the anti-interference buffer module is configured to determine whether the feedback voltage signal is interfered according to the error amplification signal and determine a buffer signal, if the feedback voltage signal is interfered, the buffer signal is a preset pull-up voltage signal, if the feedback voltage signal is not interfered, the buffer signal is the error amplification signal, the demagnetization time sampling module is configured to sample a demagnetization time signal of the switching power supply, and the control module, and the switching circuit is used for generating a switching signal according to the buffer signal and the degaussing time signal, and the switching signal is used for controlling a power switching tube of the switching power supply. This is disclosed whether receive the interference according to feedback voltage signal through anti-interference buffer module, adjusts the buffer signal who exports control module, can avoid switching power supply because receive external disturbance, lead to the problem that underloading even restarted, has improved switching power supply output voltage's stability.
Fig. 3 is a block diagram illustrating another power control apparatus according to an exemplary embodiment, and as shown in fig. 3, the control apparatus 100 further includes: and the input end of the compensation module 106 is connected with the output end of the error amplification module 102, the input end of the compensation module is further connected with the output end of the control module 104, and the output end of the compensation module is connected with the input end of the sample-and-hold module 101.
And the compensation module 106 is configured to generate a compensation voltage signal according to the error amplification signal and the switching signal, and superimpose the compensation voltage signal on the sample-and-hold module 101 for compensation.
Illustratively, the control device 100 may further include a compensation module 106, which generates a compensation voltage signal according to the error amplification signal VEA and the switching signal DRI, and the compensation voltage signal is superimposed with the feedback signal VFB and is commonly input to the sample-and-hold module 101 to compensate for the voltage drop generated by the wires. Further, the control device 100 may further include a reference bias module, a high-low voltage conversion module, and a corresponding start-up circuit.
Fig. 4 is a block diagram of a control module in the power control apparatus shown in fig. 1, and as shown in fig. 4, the control module 104 includes: a constant current and constant voltage sub-module 1041, a logic control sub-module 1042 and a driving sub-module 1043.
The first input end of the constant-current and constant-voltage sub-module 1041 is the first input end of the control module 104, the second input end of the constant-current and constant-voltage sub-module 1041 is the second input end of the control module 104, the output end of the constant-current and constant-voltage sub-module 1041 is connected with the input end of the logic control sub-module 1042, the output end of the logic control sub-module 1042 is connected with the input end of the driver sub-module 1043, and the output end of the driver sub-module 1043 is the output end of the control module 104.
And the constant-current and constant-voltage submodule 1041 is configured to generate a control signal according to the buffer signal and the demagnetization time signal, where the control signal is used to indicate a duty cycle and a conduction time of the power switching tube.
And the logic control sub-module 1042 is configured to generate a switching logic control signal according to the control signal.
And a driving submodule 1043, configured to generate a switching signal according to the switching logic control signal.
Specifically, after receiving the buffer signal BUFF (which may be the error amplification signal VEA or the pull-up voltage signal) output by the anti-interference buffer module 105, the constant current and constant voltage sub-module 104 converts the buffer signal BUFF into a control signal ON/OFF corresponding to the operating frequency and the ON-time of the load with the aid of the degaussing time signal TDS, and outputs the control signal ON/OFF, where the ON signal is used to determine the operating frequency of the control device 100 (i.e., the operating frequency of the switching power supply), the OFF signal is used to determine the ON-time of the operation of the control device 100 (i.e., the operating period of the switching power supply), the ON signal and the OFF signal perform a logic operation in the logic control sub-module 1042 to obtain a switching logic control signal PUL, and then obtain a DRI signal for controlling the power tube switch of the switching power supply through the driving sub-module 1043.
Fig. 5 is a block diagram of the jammer resistant buffer module in the power control apparatus shown in fig. 1, and as shown in fig. 5, the jammer resistant buffer module 105 includes: a first control switch 1053, a comparison sub-module 1051, and a trigger sub-module 1052.
The input end of the comparison submodule 1051 is the input end of the anti-interference buffer module 105, the output end of the comparison submodule 1051 is connected with the input end of the trigger submodule 1052, and the output end of the trigger submodule 1052 is connected with the control end of the first control switch 1053.
The comparing submodule 1051 is configured to compare the error amplified signal with a first voltage to obtain a first comparison signal, and compare the error amplified signal with a second voltage to obtain a second comparison signal.
A trigger sub-module 1052 for triggering the switch control signal according to the first comparison signal and the second comparison signal.
A switch control signal for controlling the first control switch 1053 to determine the buffer signal.
For example, the comparing sub-module 1051 is configured to compare the error amplifying signal VEA with the first voltage and the second voltage, respectively, and send the comparison result to the triggering sub-module 1052, the triggering sub-module 1052 triggers different switch control signals, and then controls the first control switch 1053 according to the switch control signals to determine the buffer signal BUFF. Taking the first voltage value as 3V and the second voltage value as 1.5V as an example, the first comparison signal can indicate a magnitude relationship between the error amplification signal VEA and 3V, if the error amplification signal VEA is greater than 3V, it indicates that the current load state of the switching power supply is full load, if the error amplification signal VEA is less than 3V, it further determines a relationship between the error amplification signal VEA and 1.5V, if the error amplification signal VEA is greater than 1.5V, it indicates that the current load state of the switching power supply is between light load and full load (the switching power supply can normally output voltage), and if the error amplification signal VEA is less than 1.5V, it indicates that the feedback voltage signal VSH is disturbed (the determination result indicates that the load state is light load).
Specifically, the first control switch 1053 is configured to determine the buffer signal as a pull-up voltage signal by controlling the pull-up power supply to be connected to the first input terminal of the control module 104 if the feedback voltage signal is interfered.
The first control switch 1053 is further configured to, if the feedback voltage signal is not interfered, control the first control switch 1053 to connect the output terminal of the error amplification module 102 with the first input terminal of the control module 104, and determine the buffered signal as the error amplified signal.
The first control switch 1053 may be a multi-way switch, and can control different signals to be connected to the first input terminal of the control module 104, and if the feedback voltage signal VSH is disturbed (e.g., the error amplification signal VEA is smaller than 1.5V), the pull-up power source is connected to the first input terminal of the control module 104 (i.e., the output terminal of the anti-interference buffer module 105), and then the buffer signal BUFF is the pull-up voltage signal. If the feedback voltage signal is not disturbed (e.g., the error amplification signal VEA is greater than 3V), the output terminal of the error amplification module 102 is connected to the first input terminal of the control module 104, and the buffer signal BUFF is the error amplification signal VEA at this time. It should be noted that the structure of the first control switch 1053 shown in fig. 5 is only an example, and the switch type of the first control switch 1053 is not specifically limited in the present disclosure
Fig. 6 is a schematic diagram illustrating the connection of the anti-interference buffer module 105 in the power control apparatus shown in fig. 5, and as shown in fig. 6, the comparison sub-module 1051 includes: a first comparator COM1 and a second comparator COM 2.
The positive phase input end of the first comparator COM1 is connected with a first voltage, the negative phase input end of the first comparator COM1 is connected with an error amplification signal, the positive phase input end of the second comparator COM2 is connected with a second voltage, the negative phase input end of the second comparator COM2 is connected with the error amplification signal, and the output end of the first comparator COM1 and the output end of the second comparator COM2 are both connected with the trigger submodule 1052.
The trigger sub-module 1052 includes: the first RS flip-flop RS1, the second RS flip-flop RS2, the first NOT gate N1, the first NAND gate N2 and the second NAND gate N3.
The output end of the first comparator COM1 is connected with the S end of the first RS flip-flop RS1 through a first not gate N1, the R end of the first RS flip-flop RS1 is connected with a switch logic control signal, the output end of the first RS flip-flop RS1 is connected with the first input end of a first nand gate N2, the output end of the second comparator COM2 is connected with the second input end of a first nand gate N2, the output end of the first nand gate N2 is connected with the first input end of a second nand gate N3, the second input end of the second nand gate N3 is connected with an enable signal EN, the output end of a second nand gate N3 is connected with the R end of a second RS flip-flop RS2, the S end of the second RS flip-flop RS2 is connected with a degaussing time signal of the switch power supply, and the output end of the second RS flip-flop RS2 is the output end of the trigger submodule 1052.
For example, the initial states of the first RS flip-flop RS1 and the second RS flip-flop RS2 are both R set to 0 and S set to 1, and the initial state of the switch control signal output by the second RS flip-flop RS2 is 1, where when the switch control signal is 1, the first control switch 1053 connects the output end of the error amplification module 102 with the first input end of the control module 104, then the buffer signal BUFF is the error amplification signal VEA, and when the switch control signal is 0, the first control switch 1053 connects the pull-up power source with the first input end of the control module 104 (i.e., the output end of the anti-interference buffer module 105), and then the buffer signal BUFF is a pull-up voltage signal.
If the error amplification signal VEA is greater than 3V, it is considered that the feedback voltage signal VSH is not interfered, and the load state is full load, then the output result of the first comparator COM1 is 0, the output result of the second comparator COM2 is also 0, the signal input to the S terminal of the first RS flip-flop RS1 is 1, the signal input to the R terminal of the first RS flip-flop RS1 is the switching logic control signal PUL, the switching logic control signal PUL locks the error amplification signal VEA to the next switching logic control signal PUL by using the first RS flip-flop RS1, and the output signal PAE of the first RS flip-flop RS1, PAE being 1, represents that the load is still in full load state before the sampling of the working period starts. When the PAE is 1, if the error amplification signal VEA drops below 1.5V (i.e., the load is in a light load state), it is determined that the feedback voltage signal VSH is interfered, the R terminal of the second RS flip-flop RS2 is set to 1, the switch control signal output by the second RS flip-flop RS2 is 0, the first input terminal of the control module 104 is switched from the error amplification signal VEA to the pull-up voltage signal, the connection between the error amplification signal VEA and the constant current and voltage sub-module 1041 is cut off, and the operating frequency and the conduction time of the control device 100 are controlled to be in a full load state. And (3) giving time for recovering the difference amplification signal VEA, after sampling in the next period (the next degaussing time signal TDS), recovering the error amplification signal VEA to be normal, sending a pulse signal to trigger the S end of the second RS trigger RS2 when the degaussing time signal TDS is finished, resetting the second RS trigger RS2 to be 1, and controlling the constant-current and constant-voltage sub-module 1041 by the error amplification signal VEA again. Specifically, the waveforms of the error amplifying signal VEA, the switch logic control signal PUL, the signal PAE, the degaussing time signal TDS, and the switch control signal in the immunity buffer module 105 are shown in fig. 7.
It should be noted that, if the immunity buffer module 105 is not provided, the waveforms of the feedback signal VFB, the switching logic control signal PUL, and the output voltage VOUT in the power control apparatus 100 are shown in fig. 8a, and it can be seen that the output voltage VOUT is greatly reduced when the feedback signal VFB is disturbed (i.e., the feedback voltage signal VSH is disturbed), or even triggers the short-circuit protection shutdown system (i.e., VOUT is 0). The anti-interference buffer module 105 adjusts the buffer signal BUFF output to the control module 104 according to whether the feedback voltage signal VSH is interfered, and at this time, the waveform diagrams of the feedback signal VFB, the switching logic control signal PUL and the output voltage VOUT in the power control device 100 are shown in fig. 8b, so that it can be seen that the output voltage VOUT can be stably output when the feedback signal VFB is interfered (i.e., the feedback voltage signal VSH is interfered).
In summary, the power control apparatus in the disclosure includes a sample-and-hold module, an error amplification module, a control module, a demagnetization time sampling module, and an anti-interference buffer module, where the sample-and-hold module is configured to sample and hold a feedback voltage of a switching power supply to obtain a feedback voltage signal, the error amplification module is configured to compare the feedback voltage signal with a preset reference voltage signal to obtain an error amplification signal, the anti-interference buffer module is configured to determine whether the feedback voltage signal is interfered according to the error amplification signal and determine a buffer signal, if the feedback voltage signal is interfered, the buffer signal is a preset pull-up voltage signal, if the feedback voltage signal is not interfered, the buffer signal is the error amplification signal, the demagnetization time sampling module is configured to sample a demagnetization time signal of the switching power supply, and the control module, and the switching circuit is used for generating a switching signal according to the buffer signal and the degaussing time signal, and the switching signal is used for controlling a power switching tube of the switching power supply. According to the anti-interference buffer module, the buffer signal output to the control module is adjusted according to whether the feedback voltage signal is interfered, the problem that the switch power supply is lightly loaded or even restarted due to external interference can be avoided, and the stability of the output voltage of the switch power supply is improved.
Fig. 9 is a flowchart illustrating a power control method according to an exemplary embodiment, which is applied to any one of the power control apparatuses shown in fig. 1 to 6, as shown in fig. 9, and includes:
And 203, if the feedback voltage signal is interfered, controlling a power switch tube of the switching power supply according to a preset pull-up voltage signal and a demagnetization time signal of the switching power supply.
And step 204, if the feedback voltage signal is not interfered, controlling the power switch tube according to the error amplification signal and the degaussing time signal.
With regard to the method in the above-described embodiment, the specific manner in which the respective steps perform operations has been described in detail in the embodiment related to the apparatus, and will not be elaborated upon here.
In summary, the power control apparatus in the disclosure includes a sample-and-hold module, an error amplification module, a control module, a demagnetization time sampling module, and an anti-interference buffer module, where the sample-and-hold module is configured to sample and hold a feedback voltage of a switching power supply to obtain a feedback voltage signal, the error amplification module is configured to compare the feedback voltage signal with a preset reference voltage signal to obtain an error amplification signal, the anti-interference buffer module is configured to determine whether the feedback voltage signal is interfered according to the error amplification signal and determine a buffer signal, if the feedback voltage signal is interfered, the buffer signal is a preset pull-up voltage signal, if the feedback voltage signal is not interfered, the buffer signal is the error amplification signal, the demagnetization time sampling module is configured to sample a demagnetization time signal of the switching power supply, and the control module, and the switching circuit is used for generating a switching signal according to the buffer signal and the degaussing time signal, and the switching signal is used for controlling a power switching tube of the switching power supply. This is disclosed whether receive the interference according to feedback voltage signal through anti-interference buffer module, adjusts the buffer signal who exports control module, can avoid switching power supply because receive external disturbance, lead to the problem that underloading even restarted, has improved switching power supply output voltage's stability.
Fig. 10 is a schematic diagram illustrating a switching power supply system according to an exemplary embodiment, and as shown in fig. 10, the system 300 includes: in the switching power supply 301 and the power supply control device 100 shown in any one of fig. 1 to 6, the voltage feedback terminal of the power supply control device 100 is connected to the feedback voltage of the switching power supply 301, and the output terminal of the power supply control device 100 is connected to the power switching tube of the switching power supply 301.
With regard to the switching power supply system in the above-described embodiment, the specific manner in which the power supply control device performs operations when controlling the switching power supply has been described in detail in the embodiment relating to the device, and will not be described in detail here.
To sum up, the power control apparatus in the present disclosure includes a sample-and-hold module, an error amplification module, a control module, a degaussing time sampling module, and an anti-interference buffer module, wherein the sample-and-hold module is configured to sample and hold a feedback voltage of the switching power supply to obtain a feedback voltage signal, the error amplification module is configured to compare the feedback voltage signal with a preset reference voltage signal to obtain an error amplification signal, the anti-interference buffer module is configured to determine whether the feedback voltage signal is interfered according to the error amplification signal and determine a buffer signal, if the feedback voltage signal is interfered, the buffer signal is a preset pull-up voltage signal, if the feedback voltage signal is not interfered, the buffer signal is the error amplification signal, the degaussing time sampling module is configured to sample a degaussing time signal of the switching power supply, and the control module, and the switching circuit is used for generating a switching signal according to the buffer signal and the demagnetization time signal, and the switching signal is used for controlling a power switching tube of the switching power supply. This is disclosed whether receive the interference according to feedback voltage signal through anti-interference buffer module, adjusts the buffer signal who exports control module, can avoid switching power supply because receive external disturbance, lead to the problem that underloading even restarted, has improved switching power supply output voltage's stability.
The preferred embodiments of the present disclosure are described in detail with reference to the accompanying drawings, however, the present disclosure is not limited to the specific details of the above embodiments, and various simple modifications may be made to the technical solution of the present disclosure within the technical idea of the present disclosure, and these simple modifications all belong to the protection scope of the present disclosure.
It should be noted that, in the foregoing embodiments, various features described in the above embodiments may be combined in any suitable manner, and in order to avoid unnecessary repetition, various combinations that are possible in the present disclosure are not described again.
In addition, any combination of various embodiments of the present disclosure may be made, and the same should be considered as the disclosure of the present disclosure, as long as it does not depart from the spirit of the present disclosure.
Claims (9)
1. A power supply control device, characterized in that the control device comprises: the device comprises a sample-hold module, an error amplification module, a control module, a degaussing time sampling module and an anti-interference buffer module;
the input end of the sampling and holding module is a voltage feedback end of the control device, the output end of the sampling and holding module is connected with the input end of the error amplification module, the output end of the error amplification module is connected with the input end of the anti-interference buffer module, the output end of the anti-interference buffer module is connected with a first input end of the control module, the output end of the control module is the output end of the control device, the input end of the demagnetization time sampling module is connected with the input end of the sampling and holding module, and the output end of the demagnetization time sampling module is connected with a second input end of the control module;
the sampling and holding module is used for sampling and holding the feedback voltage of the switching power supply to obtain a feedback voltage signal;
the error amplification module is used for comparing the feedback voltage signal with a preset reference voltage signal to obtain an error amplification signal;
the anti-interference buffer module is configured to determine whether the feedback voltage signal is interfered according to the error amplification signal, and determine a buffer signal, where the buffer signal is a preset pull-up voltage signal if the feedback voltage signal is interfered, and the buffer signal is the error amplification signal if the feedback voltage signal is not interfered;
the demagnetization time sampling module is used for sampling a demagnetization time signal of the switching power supply;
the control module is used for generating a switching signal according to the buffer signal and the degaussing time signal, and the switching signal is used for controlling a power switch tube of the switching power supply.
2. The control device according to claim 1, characterized in that the control device further comprises: the input end of the compensation module is connected with the output end of the error amplification module, the input end of the compensation module is also connected with the output end of the control module, and the output end of the compensation module is connected with the input end of the sampling and holding module;
and the compensation module is used for generating a compensation voltage signal according to the error amplification signal and the switching signal and superposing the compensation voltage signal to the sampling and holding module for compensation.
3. The control device according to claim 1 or 2, wherein the control module includes: the constant-current constant-voltage control system comprises a constant-current constant-voltage submodule, a logic control submodule and a driving submodule;
the first input end of the constant-current and constant-voltage submodule is the first input end of the control module, the second input end of the constant-current and constant-voltage submodule is the second input end of the control module, the output end of the constant-current and constant-voltage submodule is connected with the input end of the logic control submodule, the output end of the logic control submodule is connected with the input end of the driving submodule, and the output end of the driving submodule is the output end of the control module;
the constant-current and constant-voltage submodule is used for generating a control signal according to the buffer signal and the degaussing time signal, and the control signal is used for indicating the working period and the conducting time of the power switch tube;
the logic control submodule is used for generating a switch logic control signal according to the control signal;
and the driving submodule is used for generating the switching signal according to the switching logic control signal.
4. The control device of claim 3, wherein the anti-jam buffering module comprises: the first control switch, the comparison submodule and the trigger submodule;
the input end of the comparison submodule is the input end of the anti-interference buffer module, the output end of the comparison submodule is connected with the input end of the trigger submodule, and the output end of the trigger submodule is connected with the control end of the first control switch;
the comparison submodule is used for comparing the error amplification signal with a first voltage to obtain a first comparison signal and comparing the error amplification signal with a second voltage to obtain a second comparison signal;
the trigger submodule is used for triggering a switch control signal according to the first comparison signal and the second comparison signal;
the switch control signal is used for controlling the first control switch to determine the buffer signal.
5. The control device of claim 4, wherein the first control switch is configured to determine the buffered signal as the pull-up voltage signal by controlling a pull-up power supply to be connected to the first input terminal of the control module if the feedback voltage signal is disturbed;
the first control switch is further configured to control the first control switch to connect the output end of the error amplification module with the first input end of the control module if the feedback voltage signal is not interfered, and determine the buffer signal as the error amplification signal.
6. The control device of claim 4, wherein the comparison submodule comprises: a first comparator and a second comparator;
the positive phase input end of the first comparator is connected with the first voltage, the negative phase input end of the first comparator is connected with the error amplification signal, the positive phase input end of the second comparator is connected with the second voltage, the negative phase input end of the second comparator is connected with the error amplification signal, and the output end of the first comparator and the output end of the second comparator are both connected with the trigger submodule.
7. The control device of claim 6, wherein the trigger submodule comprises: the first RS trigger, the second RS trigger, the first NOT gate, the first NAND gate and the second NAND gate;
the output end of the first comparator is connected with the S end of the first RS flip-flop through the first not gate, the R end of the first RS flip-flop is connected with the switch logic control signal, the output end of the first RS flip-flop is connected with the first input end of the first nand gate, the output end of the second comparator is connected with the second input end of the first nand gate, the output end of the first nand gate is connected with the first input end of the second nand gate, the second input end of the second nand gate is connected with the enable signal, the output end of the second nand gate is connected with the R end of the second RS flip-flop, the S end of the second RS flip-flop is connected with the demagnetization time signal of the switch power supply, and the output end of the second RS flip-flop is the output end of the trigger submodule.
8. A power supply control method applied to the power supply control device according to any one of claims 1 to 7, the method comprising:
comparing a feedback voltage signal of the switching power supply with a preset reference voltage signal to obtain an error amplification signal;
determining whether the feedback voltage signal is interfered according to the error amplification signal;
if the feedback voltage signal is interfered, controlling a power switch tube of the switch power supply according to a preset pull-up voltage signal and a demagnetization time signal of the switch power supply;
and if the feedback voltage signal is not interfered, controlling the power switch tube according to the error amplification signal and the degaussing time signal.
9. A switching power supply system, characterized in that the system comprises: the power supply control device of any one of claims 1-7 and a switching power supply, wherein a voltage feedback terminal of the power supply control device is connected with a feedback voltage of the switching power supply, and an output terminal of the power supply control device is connected with a power switch tube of the switching power supply.
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