JPH06314823A - Gallium nitride compound semiconductor light emitting element and its manufacture - Google Patents

Gallium nitride compound semiconductor light emitting element and its manufacture

Info

Publication number
JPH06314823A
JPH06314823A JP12502693A JP12502693A JPH06314823A JP H06314823 A JPH06314823 A JP H06314823A JP 12502693 A JP12502693 A JP 12502693A JP 12502693 A JP12502693 A JP 12502693A JP H06314823 A JPH06314823 A JP H06314823A
Authority
JP
Japan
Prior art keywords
layer
light emitting
compound semiconductor
impurity concentration
emitting diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12502693A
Other languages
Japanese (ja)
Inventor
Hisayoshi Kato
久喜 加藤
Masafumi Hashimoto
雅文 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyoda Gosei Co Ltd
Toyota Central R&D Labs Inc
Original Assignee
Toyoda Gosei Co Ltd
Toyota Central R&D Labs Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyoda Gosei Co Ltd, Toyota Central R&D Labs Inc filed Critical Toyoda Gosei Co Ltd
Priority to JP12502693A priority Critical patent/JPH06314823A/en
Publication of JPH06314823A publication Critical patent/JPH06314823A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a light emitting diode of a GaN compound semiconductor with high luminance and high reliability and a manufacturing method thereof. CONSTITUTION:An i-layer on an n-layer has a double layer structure wherein a low impurity concentration iL-layer 5 and a high impurity concentration iH- layer 6 are formed. Pit (hole) parts 6a of various sizes are generated in a crystal surface of the high impurity concentration iH-layer 6. An insulation film 9 is formed in the pit part 6a by anode oxidation. Therefore, a current made to flow from an electrode 7 does not concentrate in the pit part 6a and luminance deterioration in a light emitting diode 10 based on local breakdown of the i-layer can be prevented. A light emitting diode having high luminance and high reliability can be acquired in this way.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、青色発光の窒化ガリウ
ム系化合物半導体発光素子及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a blue light emitting gallium nitride compound semiconductor light emitting device and a method for manufacturing the same.

【0002】[0002]

【従来技術】従来、青色の発光ダイオードとしてGaN
系の化合物半導体を用いたものが知られている。そのG
aN 系の化合物半導体は直接遷移であることから発光効
率が高いこと、光の3原色の1つである青色を発光色と
すること等から注目されている。このようなGaN 系の
化合物半導体を用いた発光ダイオードは、サファイヤ基
板上に直接又は窒化アルミニウムから成るバッファ層を
介在させて、n導電型のGaN 系の化合物半導体から成
る高キャリヤ濃度n+ 層と低キャリヤ濃度n層と、その
低キャリヤ濃度n層の上にp型不純物を添加したi層、
具体的にはp型不純物を少量添加したiL 層(以下、低
不純物濃度iL 層という)と低不純物濃度iL 層より多
く添加したiH 層(以下、高不純物濃度iH 層という)
とを成長させた構造をとっている(特開平3−2521
77号公報)。
2. Description of the Related Art Conventionally, GaN has been used as a blue light emitting diode.
There are known ones using a system compound semiconductor. That G
Attention has been paid to the fact that an aN 2 -based compound semiconductor has a high emission efficiency because it is a direct transition, and that blue, which is one of the three primary colors of light, is the emission color. A light emitting diode using such a GaN-based compound semiconductor has a high carrier concentration n + layer made of an n-conductivity type GaN-based compound semiconductor, either directly on a sapphire substrate or with a buffer layer made of aluminum nitride interposed. A low carrier concentration n layer and an i layer in which a p-type impurity is added on the low carrier concentration n layer,
I L layer added a small amount of p-type impurities specifically (hereinafter low as impurity concentration i L layer) i H layer added more than a low impurity concentration i L layer (hereinafter, referred to as the high impurity concentration i H layer)
And has a grown structure (JP-A-3-2521).
77 publication).

【0003】[0003]

【発明が解決しようとする課題】上述のように、i層の
電極を形成する前のi−GaN 層は、低不純物濃度iL
層と高不純物濃度iH 層との二重層構造とされる。この
二重層の成膜工程において、膜成長温度を前者では1150
℃とし低不純物濃度、後者では 900℃に下げてZn を入
り易くし高不純物濃度を達成するようにしている。高不
純物濃度iH 層面に、i層の電極を形成した発光ダイオ
ードでは、室温連続試験(電流値:20mA)により、一部
ロットで1000時間後くらいから輝度劣化が生じるという
問題があった。
As described above, the i-GaN layer before the formation of the i-layer electrode has a low impurity concentration i L.
It has a double layer structure of a layer and a high impurity concentration i H layer. In the film formation process of this double layer, the film growth temperature was 1150 in the former case.
In order to achieve a high impurity concentration, the temperature is set to ℃ and the impurity concentration is lowered to 900 ° C. A light-emitting diode having an i-layer electrode formed on the surface of a high impurity concentration i H layer has a problem that luminance deterioration occurs in some lots after about 1000 hours in a room temperature continuous test (current value: 20 mA).

【0004】発明者らは、上述の問題について鋭意実験
研究を重ねた結果、この現象が起こる要因を見出し、以
下のように新規な構成から成るGaN 系の化合物半導体
の発光ダイオード及びその製造方法を提供するに至った
のである。上記要因としては、i層の結晶状態の不連続
性のため、電極が形成される高不純物濃度iH 層側の表
面には、通常、多角(六角)錐状のピット(孔)と呼ば
れる欠陥部分が形成されることとなる。そして、i層の
電極が形成される領域に多角錐状で底面の対角線が約 1
50nm以上の大きなピット部分があると、そのピット部分
では電流の集中が起こり周囲よりも多くの電流が流れ
る。これにより、発光ダイオードは発光強度がトータル
的に低くなると共にそのMIS(Metal Insulator Semic
onductor)構造がピット部分から局所的に徐々に破壊さ
れて耐久劣化による発光輝度の低下が生じるのである。
As a result of intensive studies and researches on the above-mentioned problems, the inventors have found out the cause of this phenomenon, and have found a GaN-based compound semiconductor light emitting diode having a novel structure and a method for manufacturing the same as follows. It has been provided. As the above-mentioned factor, due to the discontinuity of the crystalline state of the i-layer, defects called polygonal (hexagonal) pyramid-shaped pits (holes) are usually formed on the surface of the high impurity concentration i H layer side where the electrodes are formed. A part will be formed. Then, in the region where the electrode of the i layer is formed, the polygonal pyramid is formed and the diagonal line of the bottom surface is about 1
If there is a large pit portion of 50 nm or more, current concentration occurs in that pit portion, and more current flows than the surroundings. As a result, the light emission intensity of the light emitting diode is lowered in total and the MIS (Metal Insulator Semic)
The onductor) structure is gradually destroyed locally from the pit portion, resulting in deterioration of the light emission luminance due to deterioration of durability.

【0005】本発明は、上記の課題を解決するために成
されたものであり、その目的とするところは、高輝度・
高信頼性を有するGaN 系の化合物半導体の発光ダイオ
ード及びその製造方法を提供することである。
The present invention has been made to solve the above-mentioned problems, and its purpose is to achieve high brightness and
A highly reliable GaN compound semiconductor light emitting diode and a method of manufacturing the same.

【0006】[0006]

【課題を解決するための手段】上記課題を解決するため
の発明の構成における第1の特徴は、n型の窒化ガリウ
ム系化合物半導体(InXAlYGa1-X-YN;X=0,Y=
0を含む)から成るn層と、p型不純物を添加したi型
の窒化ガリウム系化合物半導体(InXAlYGa1-X-YN;
X=0,Y=0を含む)から成るi層とを有する窒化ガ
リウム系化合物半導体発光素子において、前記i層の結
晶表面の少なくともピット部分にのみ選択的に絶縁膜を
有することである。
The first feature of the constitution of the invention for solving the above-mentioned problems is that an n-type gallium nitride-based compound semiconductor (In X Al Y Ga 1-XY N; X = 0, Y =
0 layer) and an i-type gallium nitride-based compound semiconductor (In X Al Y Ga 1 -XY N;
In the gallium nitride-based compound semiconductor light-emitting device having an i layer formed of X = 0 and Y = 0), an insulating film is selectively provided only in at least a pit portion on the crystal surface of the i layer.

【0007】又、第2の特徴は、n型の窒化ガリウム系
化合物半導体(InXAlYGa1-X-YN;X=0,Y=0を
含む)から成るn層と、p型不純物を添加したi型の窒
化ガリウム系化合物半導体(InXAlYGa1-X-YN;X=
0,Y=0を含む)から成るi層とを有する窒化ガリウ
ム系化合物半導体発光素子の製造方法において、前記n
層及び前記i層に対する電極形成以前に、該i層の結晶
表面に生じる少なくともピット部分にのみ選択的に絶縁
膜を形成することである。
A second feature is that an n layer made of an n-type gallium nitride compound semiconductor (In x Al Y Ga 1-XY N; including X = 0 and Y = 0) and a p-type impurity are included. Added i-type gallium nitride compound semiconductor (In X Al Y Ga 1-XY N; X =
0, Y = 0) and an i-layer made of n).
Before forming an electrode on the i-layer and the i-layer, an insulating film is selectively formed only on at least a pit portion formed on the crystal surface of the i-layer.

【0008】[0008]

【作用及び効果】本発明のGaN 系の化合物半導体の発
光ダイオードは、i層の結晶表面の少なくともピット部
分にのみに選択的に絶縁膜を有し、このピット部分に電
流の集中が起こらないようにできる。このため、必要以
上に素子の抵抗を増大させることなく、ピット部分への
電流集中による局所的な破壊に基づく耐久劣化が防止さ
れ、高輝度・高信頼性を有する窒化ガリウム系化合物半
導体発光素子及びその製造方法となる。
The GaN-based compound semiconductor light emitting diode of the present invention has an insulating film selectively in at least the pit portion of the crystal surface of the i layer so that current concentration does not occur in this pit portion. You can Therefore, without increasing the resistance of the device more than necessary, durability deterioration due to local destruction due to current concentration in the pit portion is prevented, and a gallium nitride-based compound semiconductor light emitting device having high brightness and high reliability, and This is the manufacturing method.

【0009】[0009]

【実施例】以下、本発明を具体的な実施例に基づいて説
明する。図1は、本発明に係るGaN 系の化合物半導体
の発光ダイオード10を示した断面図である。尚、図1
(a) には発光ダイオードの多層構造断面、図1(b) には
ピット部分の拡大断面を示した。発光ダイオード10
は、サファイア基板1を有しており、そのサファイア基
板1に 500ÅのAlN のバッファ層2が形成されてい
る。そのバッファ層2の上には、順に、膜厚 2.2μm 、
キャリヤ濃度 1.5×1018/cm3のGaN から成る高キャリ
ヤ濃度n+ 層3と膜厚 1.1μm 、キャリヤ濃度1×1015
/cm3のGaN から成る低キャリヤ濃度n層4が形成され
ており、更に、低キャリヤ濃度n層4の上に膜厚 1.1μ
m 、Zn 濃度2×1018/cm3のGaN から成る低不純物濃
度iL 層5及び膜厚 0.2μm 、Zn 濃度1×1020/cm3
GaN から成る高不純物濃度iH 層6が形成されてい
る。そして、iH 層6に接続するアルミニウムで形成さ
れた電極7と高キャリヤ濃度n+ 層3に接続するアルミ
ニウムで形成された電極8とが形成されている。
EXAMPLES The present invention will be described below based on specific examples. FIG. 1 is a sectional view showing a GaN compound semiconductor light emitting diode 10 according to the present invention. Incidentally, FIG.
The cross section of the multilayer structure of the light emitting diode is shown in (a), and the enlarged cross section of the pit portion is shown in FIG. 1 (b). Light emitting diode 10
Has a sapphire substrate 1, and a 500 Å buffer layer 2 of AlN is formed on the sapphire substrate 1. On the buffer layer 2, a film thickness of 2.2 μm,
High carrier concentration n + layer 3 and the film thickness 1.1μm of GaN of carrier concentration 1.5 × 10 18 / cm 3, the carrier concentration of 1 × 10 15
A low carrier concentration n-layer 4 made of GaN of / cm 3 is formed, and a film thickness of 1.1 μm is formed on the low carrier concentration n-layer 4.
A low impurity concentration i L layer 5 made of GaN having m and Zn concentrations of 2 × 10 18 / cm 3 and a high impurity concentration i H layer 6 made of GaN having a film thickness of 0.2 μm and Zn concentration of 1 × 10 20 / cm 3 are formed. Has been done. Then, an electrode 7 formed of aluminum and connected to the i H layer 6 and an electrode 8 formed of aluminum and connected to the high carrier concentration n + layer 3 are formed.

【0010】次に、この構造の発光ダイオード10の製
造方法について説明する。上記発光ダイオード10は有
機金属化合物気相成長法(以下、MOVPEと記す)に
よる気相成長により製造された。用いられたガスは、N
3 とキャリヤガスH2 とトリメチルガリウム(Ga(C
3)3)(以下、TMGと記す)とトリメチルアルミニウ
ム(Al(CH3)3)(以下、TMAと記す)とシラン(Si
4)とジエチル亜鉛(以下、DEZと記す)である。
Next, a method of manufacturing the light emitting diode 10 having this structure will be described. The light emitting diode 10 was manufactured by vapor phase epitaxy by a metal organic compound vapor phase epitaxy method (hereinafter referred to as MOVPE). The gas used is N
H 3 and carrier gas H 2 and trimethylgallium (Ga (C
H 3) 3) (hereinafter referred to as TMG) and trimethylaluminum (Al (CH 3) 3) ( hereinafter referred to as TMA) and silane (Si
H 4) and diethyl zinc (hereinafter, it is referred to as DEZ).

【0011】先ず、有機洗浄及び熱処理により洗浄した
a面を主面とする単結晶のサファイア基板1をMOVP
E装置の反応室に載置されたサセプタに装着する。次
に、常圧でH2 を流速2 l/分で反応室に流しながら温
度1100℃でサファイア基板1を気相エッチングした。次
に、温度を 400℃まで低下させて、H2 を20 l/分、N
3 を10 l/分、TMAを 1.8×10-5モル/分で供給し
て 500Åの厚さのAlN から成るバッファ層2を形成し
た。
First, a single crystal sapphire substrate 1 whose main surface is the a-plane cleaned by organic cleaning and heat treatment is MOVP.
E Attach to the susceptor placed in the reaction chamber of the device. Next, the sapphire substrate 1 was vapor-phase etched at a temperature of 1100 ° C. while flowing H 2 at a flow rate of 2 l / min into the reaction chamber under normal pressure. Next, the temperature is lowered to 400 ° C. and H 2 is added at 20 l / min and N 2
H 3 was supplied at 10 l / min and TMA was supplied at 1.8 × 10 −5 mol / min to form a buffer layer 2 made of AlN having a thickness of 500 Å.

【0012】次に、サファイア基板1の温度を1150℃に
保持し、H2 を20 l/分、NH3 を10 l/分、TMGを
1.7×10-4モル/分、H2 で0.86ppm まで希釈したシラ
ン(SiH4)を 200ml/分の割合で30分間供給し、膜厚
2.2μm 、キャリヤ濃度 1.5×1018/cm3のGaN から成
る高キャリヤ濃度n+ 層3を形成した。
Next, the temperature of the sapphire substrate 1 is maintained at 1150 ° C., H 2 is 20 l / min, NH 3 is 10 l / min, and TMG is
Silane (SiH 4 ) diluted to 1.76 × 10 -4 mol / min and 0.86 ppm with H 2 was supplied at a rate of 200 ml / min for 30 minutes to obtain a film thickness.
2.2 .mu.m, to form a high-carrier density n + layer 3 made of GaN of carrier concentration 1.5 × 10 18 / cm 3.

【0013】続いて、サファイア基板1の温度を1150℃
に保持し、H2 を20 l/分、NH3を10 l/分、TMG
を1.7 ×10-4モル/分の割合で15分間供給し、膜厚 1.1
μm、キャリヤ濃度 1×1015/cm3のGaN から成る低キ
ャリヤ濃度n層4を形成した。
Then, the temperature of the sapphire substrate 1 is set to 1150 ° C.
, H 2 at 20 l / min, NH 3 at 10 l / min, TMG
Was supplied at a rate of 1.7 × 10 -4 mol / min for 15 minutes to obtain a film thickness of 1.1
A low carrier concentration n layer 4 made of GaN having a carrier concentration of 1 × 10 15 / cm 3 was formed.

【0014】次に、サファイア基板1を1150℃にして、
2 を20 l/分、NH3 を10 l/分、TMGを 1.7×10
-4モル/分、DEZを 1.5×10-4モル/分の割合で15分
間供給して、膜厚 1.1μm のGaN から成るZn 濃度2
×1018/cm3の低不純物濃度iL 層5を形成した。
Next, the sapphire substrate 1 is heated to 1150 ° C.,
H 2 20 l / min, NH 3 10 l / min, TMG 1.7 × 10
-4 mol / min, DEZ at a rate of 1.5 × 10 -4 mol / min for 15 minutes, and a Zn concentration of 2 μm consisting of GaN with a film thickness of 1.1 μm 2
A low impurity concentration i L layer 5 of × 10 18 / cm 3 was formed.

【0015】続いて、サファイア基板1を 900℃にし
て、H2 を20 l/分、NH3 を10 l/分、TMGを 1.7
×10-4モル/分、DEZを 1.5×10-4モル/分の割合で
3分間供給して、膜厚 0.2μm のGaN から成るZn 濃
度1×1020/cm3の高不純物濃度iH 層6を形成した。こ
のようにして、図2に示したような多層構造のウェーハ
が得られた。
Subsequently, the sapphire substrate 1 is heated to 900 ° C., H 2 is 20 l / min, NH 3 is 10 l / min, and TMG is 1.7 l.
× 10 -4 mol / min, DEZ was supplied at a rate of 1.5 × 10 -4 mol / min for 3 minutes, and a high impurity concentration i H of Zn concentration 1 × 10 20 / cm 3 consisting of GaN with a film thickness of 0.2 μm Layer 6 was formed. In this way, a wafer having a multilayer structure as shown in FIG. 2 was obtained.

【0016】上述の結晶成長終了後、形成された多層構
造のウェーハにおける高不純物濃度iH 層6表面には、
図3にその拡大断面を示したように、ピット部分6aが
生じている。このピット部分6aは、高不純物濃度iH
層6表面に大小様々に現れ、前述したように多角錐状の
底面の対角線が約 150nm以上であると発光強度の劣化に
大きく影響を及ぼすこととなる。この多層構造のウェー
ハにおけるピット部分6aを有する高不純物濃度iH
6の周辺の一部にプラス極となる金属を蒸着する。そし
て、金属が蒸着されていない高不純物濃度iH 層6表面
を除いて、上記多層構造のウェーハの周囲全面に絶縁物
質である、例えば、アピエゾンワックスを塗布する。即
ち、iH−GaN表面だけを露出させる。上述の実施例で
は、アピエゾンワックスの例を示したが、適当な治具に
より金属が蒸着されていない高不純物濃度iH 層6表面
を除いたウェーハが電気的に絶縁できていれば良い。そ
して、図4に示したように、上記多層構造のウェーハに
蒸着された金属部分をプラス極、Pt 電極をマイナス極
とし、9wt%のH2SO4水溶液を電解液として用い、定
電流電源に接続して閉回路から成る陽極酸化装置を構成
した。上述の陽極酸化装置において、H2SO4水溶液を
攪拌しつつ電流密度が10μA/cm2の定電流を流して陽極
酸化することによりiH−GaN表面のピット部分6aに
ガリウム酸化物を含む陽極酸化膜である絶縁膜9を形成
した。尚、H2SO4水溶液濃度は1〜20wt%、電流密度
は1〜 100μA/cm2の範囲に設定できる。又、電解液と
してはH2SO4水溶液の他、H22溶液などを用いるこ
とができる。又、絶縁膜9としては上述の陽極酸化によ
るガリウム酸化物を含む陽極酸化膜の他、電気メッキな
どでピット部分6aに選択的に別の金属、例えば、アル
ミニウム(Al)を付けて酸化させることにより形成して
も良い。
After completion of the above-mentioned crystal growth, the surface of the high impurity concentration i H layer 6 in the formed multi-layered wafer is
As shown in the enlarged cross section of FIG. 3, a pit portion 6a is formed. This pit portion 6a has a high impurity concentration i H
It appears in various sizes on the surface of the layer 6, and as described above, if the diagonal line of the polygonal pyramid-shaped bottom surface is about 150 nm or more, the deterioration of the emission intensity is greatly affected. A metal serving as a positive pole is vapor-deposited on a part of the periphery of the high impurity concentration i H layer 6 having the pit portion 6a in the wafer having the multilayer structure. Then, except for the surface of the high impurity concentration i H layer 6 on which the metal is not vapor-deposited, an insulating material such as apiezon wax is applied to the entire periphery of the wafer having the above-mentioned multilayer structure. That is, to expose only the i H -GaN surface. In the above embodiment, an example of apiezon wax is shown, but it is sufficient that the wafer except the surface of the high impurity concentration i H layer 6 where the metal is not vapor-deposited is electrically insulated by an appropriate jig. Then, as shown in FIG. 4, the metal portion deposited on the wafer having the above-mentioned multi-layer structure was used as a positive electrode and the Pt electrode was used as a negative electrode, and a 9 wt% H 2 SO 4 aqueous solution was used as an electrolytic solution. Connected to construct an anodizing device consisting of a closed circuit. In the anodizing apparatus described above, an anode containing gallium oxide pits 6a of the i H -GaN surface by current density anodizing by supplying a constant current of 10 .mu.A / cm 2 while stirring the aqueous H 2 SO 4 An insulating film 9 which is an oxide film was formed. The H 2 SO 4 aqueous solution concentration can be set in the range of 1 to 20 wt% and the current density can be set in the range of 1 to 100 μA / cm 2 . Further, as the electrolytic solution, an H 2 SO 4 aqueous solution, a H 2 O 2 solution, or the like can be used. In addition to the anodic oxide film containing gallium oxide by the above-mentioned anodic oxidation as the insulating film 9, another metal such as aluminum (Al) is selectively attached to the pit portion 6a by electroplating or the like to be oxidized. You may form by.

【0017】次に、図6に示したように、高不純物濃度
H 層6の上に、スパッタリングによりSiO2層11を
2000Åの厚さに形成した。次に、そのSiO2層11上に
フォトレジスト12を塗布して、フォトリソグラフィに
より、そのフォトレジスト12を高キャリヤ濃度n+
3に対する電極形成部位のフォトレジストを除去したパ
ターンに形成した。次に、図7に示したように、フォト
レジスト12によって覆われていないSiO2層11をフ
ッ酸系エッチング液で除去した。
Next, as shown in FIG. 6, a SiO 2 layer 11 is sputtered on the high impurity concentration i H layer 6.
Formed to a thickness of 2000Å. Next, a photoresist 12 was applied on the SiO 2 layer 11, and the photoresist 12 was formed by photolithography in a pattern in which the photoresist at the electrode formation site for the high carrier concentration n + layer 3 was removed. Next, as shown in FIG. 7, the SiO 2 layer 11 not covered with the photoresist 12 was removed with a hydrofluoric acid-based etching solution.

【0018】次に、図8に示したように、フォトレジス
ト12及びSiO2層11によって覆われていない部位の
高不純物濃度iH 層6とその下の低不純物濃度iL 層5
と低キャリヤ濃度n層と高キャリヤ濃度n+ 層3の上面
一部を、真空度0.04Torr、高周波電力 0.44W/cm2 、C
Cl22 ガスを10ml/分の割合で供給しドライエッチン
グした後、Ar でドライエッチングした。次に、図9に
示したように、高不純物濃度iH 層6上に残っているS
iO2層11をフッ酸で除去した。
Next, as shown in FIG. 8, the high impurity concentration i H layer 6 and the low impurity concentration i L layer 5 thereunder are covered by the photoresist 12 and the SiO 2 layer 11.
And a part of the upper surface of the low carrier concentration n layer and the high carrier concentration n + layer 3 are vacuum degree 0.04 Torr, high frequency power 0.44 W / cm 2 , C
Cl 2 F 2 gas was supplied at a rate of 10 ml / minute for dry etching, and then Ar was used for dry etching. Next, as shown in FIG. 9, S remaining on the high impurity concentration i H layer 6 is removed.
The iO 2 layer 11 was removed with hydrofluoric acid.

【0019】次に、図10に示したように、真空度8×
10-7Torr、試料温度 225℃に保持し、試料の上全面に、
蒸着によりAl 層13を形成した。そして、そのAl 層
13の上にフォトレジスト14を塗布して、フォトリソ
グラフィにより、そのフォトレジスト14が高キャリヤ
濃度n+ 層3及び高不純物濃度iH 層6に対する電極部
が残るように、所定形状にパターン形成した。
Next, as shown in FIG. 10, the degree of vacuum is 8 ×
Hold at 10 -7 Torr and sample temperature 225 ℃,
An Al layer 13 was formed by vapor deposition. Then, a photoresist 14 is applied on the Al layer 13 and is subjected to a photolithography process so that the photoresist 14 has a predetermined electrode portion for the high carrier concentration n + layer 3 and the high impurity concentration i H layer 6. The pattern was formed into a shape.

【0020】上述の製造工程の後、フォトレジスト14
によって覆われていないAl 層13の露出部を硝酸系エ
ッチング液でエッチングし、フォトレジスト14をアセ
トンで除去し、高キャリヤ濃度n+ 層3の電極8、高不
純物濃度iH 層6の電極7を形成した。ここで、高不純
物濃度iH 層6のピット部分6aに形成されたガリウム
酸化物を含む陽極酸化膜である絶縁膜9とその上の電極
7の状態を図1(b) に示した。このようにして、図1
(a) に示したMIS構造のGaN 系の化合物半導体の発
光ダイオードを製造することができる。尚、高キャリヤ
濃度n+ 層3の電極8及び高不純物濃度iH 層6の電極
7の金属材料としては、Al の他、Ti などのn+-Ga
N 層3とオーミック接続が可能な金属物質であれば良
い。
After the above manufacturing process, the photoresist 14 is formed.
The exposed portion of the Al layer 13 which is not covered by the etching is etched with a nitric acid-based etching solution, the photoresist 14 is removed with acetone, and the electrode 8 of the high carrier concentration n + layer 3 and the electrode 7 of the high impurity concentration i H layer 6 are removed. Was formed. Here, the state of the insulating film 9 which is the anodic oxide film containing gallium oxide formed in the pit portion 6a of the high impurity concentration i H layer 6 and the state of the electrode 7 thereon are shown in FIG. 1 (b). In this way, FIG.
The GaN-based compound semiconductor light emitting diode having the MIS structure shown in (a) can be manufactured. The metal material of the electrode 8 of the high carrier concentration n + layer 3 and the electrode 7 of the high impurity concentration i H layer 6 is n + -Ga such as Ti in addition to Al.
Any metal substance capable of making ohmic contact with the N 3 layer 3 may be used.

【0021】上述したように、電極7が形成された高不
純物濃度iH 層6に大きなピット部分6aがあっても絶
縁膜9により被覆され、その部分に電流の集中が起こる
ことはない。従って、本発明のGaN 系の化合物半導体
の発光ダイオードにおいては、高輝度であると共にMI
S構造が局所的に徐々に破壊されて発光強度が低下する
ことがないので高信頼性を有することとなる。又、上述
の実施例ではGaN のみで記述したが、InGaAlN 材
料においても、ピットがあれば陽極酸化法により選択的
に陽極酸化膜である絶縁膜の製作は可能であるし、電気
メッキ法により選択的に金属酸化物などの絶縁膜を作る
ことは可能である。従って、InGaAlN 半導体系にも
本方法は有効である。
As described above, even if the high impurity concentration i H layer 6 on which the electrode 7 is formed has a large pit portion 6a, the large pit portion 6a is covered with the insulating film 9 and current does not concentrate at that portion. Therefore, the GaN-based compound semiconductor light emitting diode of the present invention has high brightness and MI.
Since the S structure is not locally locally destroyed and the emission intensity is not lowered, the S structure has high reliability. Further, in the above-mentioned embodiment, only GaN is described, but also in InGaAlN material, if there are pits, it is possible to selectively manufacture an insulating film which is an anodized film, and it is selected by an electroplating method. It is possible to form an insulating film such as a metal oxide. Therefore, this method is also effective for InGaAlN semiconductor systems.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の具体的な一実施例に係る発光ダイオー
ドを示した構成図である。
FIG. 1 is a configuration diagram illustrating a light emitting diode according to a specific embodiment of the present invention.

【図2】同実施例に係る発光ダイオードを形成するため
の多層構造のウェーハを示した部分断面図である。
FIG. 2 is a partial cross-sectional view showing a wafer having a multilayer structure for forming the light emitting diode according to the embodiment.

【図3】同実施例に係る発光ダイオードの多層構造のウ
ェーハの高不純物濃度iH 層に生じたピット部分を示し
た部分拡大断面図である。
FIG. 3 is a partially enlarged cross-sectional view showing a pit portion formed in a high impurity concentration i H layer of a wafer having a multilayer structure of a light emitting diode according to the same example.

【図4】同実施例に係る発光ダイオードの製造に用いた
陽極酸化装置を示した構成図である。
FIG. 4 is a configuration diagram showing an anodizing device used for manufacturing the light emitting diode according to the embodiment.

【図5】同実施例に係る発光ダイオードの多層構造のウ
ェーハの高不純物濃度iH 層のピット部分の陽極酸化に
より形成された絶縁膜を示した部分拡大断面図である。
FIG. 5 is a partially enlarged cross-sectional view showing an insulating film formed by anodizing the pit portion of the high impurity concentration i H layer of the wafer having the multilayer structure of the light emitting diode according to the example.

【図6】同実施例に係る発光ダイオードの多層構造のウ
ェーハの製造工程を示した断面図である。
FIG. 6 is a cross-sectional view showing a manufacturing process of a wafer having a multilayer structure of a light emitting diode according to the same embodiment.

【図7】同実施例に係る発光ダイオードの多層構造のウ
ェーハの製造工程を示した図6に続く断面図である。
7 is a cross-sectional view subsequent to FIG. 6, showing a manufacturing process of a wafer having a multilayer structure of a light emitting diode according to the same example.

【図8】同実施例に係る発光ダイオードの多層構造のウ
ェーハの製造工程を示した図7に続く断面図である。
FIG. 8 is a cross-sectional view subsequent to FIG. 7, showing a manufacturing process of a wafer having a multilayer structure of a light emitting diode according to the same embodiment.

【図9】同実施例に係る発光ダイオードの多層構造のウ
ェーハの製造工程を示した図8に続く断面図である。
9 is a cross-sectional view following FIG. 8 showing a manufacturing process of a wafer having a multilayer structure of a light emitting diode according to the same embodiment.

【図10】同実施例に係る発光ダイオードの多層構造の
ウェーハの製造工程を示した図9に続く断面図である。
10 is a cross-sectional view showing the manufacturing process of the wafer having the multi-layer structure of the light emitting diode according to the embodiment, following FIG. 9;

【符号の説明】[Explanation of symbols]

1…サファイア基板 2…バッファ層 3…高キャリヤ濃度n+ 層 4…低キャリヤ濃度n層 5…低不純物濃度iL 層 6…高不純物濃度iH 層 6a…ピット(孔)部分 7,8…電極 9…絶縁膜 10…発光ダイオード(窒化ガリウム系化合物半導体発
光素子)
1 ... Sapphire substrate 2 ... Buffer layer 3 ... High carrier concentration n + layer 4 ... Low carrier concentration n layer 5 ... Low impurity concentration i L layer 6 ... High impurity concentration i H layer 6a ... Pit (hole) part 7, 8 ... Electrode 9 ... Insulating film 10 ... Light emitting diode (gallium nitride compound semiconductor light emitting element)

───────────────────────────────────────────────────── フロントページの続き (72)発明者 橋本 雅文 愛知県愛知郡長久手町大字長湫字横道41番 地の1 株式会社豊田中央研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Masafumi Hashimoto, Inventor, Masafumi Hashimoto, No. 41 Yokomichi, Nagakute-cho, Aichi-gun, Aichi-gun, Toyota Central Research Institute Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 n型の窒化ガリウム系化合物半導体(I
nXAlYGa1-X-YN;X=0,Y=0を含む)から成るn
層と、p型不純物を添加したi型の窒化ガリウム系化合
物半導体(InXAlYGa1-X-YN;X=0,Y=0を含
む)から成るi層とを有する窒化ガリウム系化合物半導
体発光素子において、 前記i層の結晶表面の少なくともピット(孔)部分にの
み選択的に絶縁膜を有することを特徴とする窒化ガリウ
ム系化合物半導体発光素子。
1. An n-type gallium nitride-based compound semiconductor (I
n X Al Y Ga 1-XY N; including X = 0 and Y = 0)
Layer and an i layer made of an i-type gallium nitride-based compound semiconductor (In X Al Y Ga 1-XY N; including X = 0 and Y = 0) doped with a p-type impurity In the light emitting device, a gallium nitride-based compound semiconductor light emitting device having an insulating film selectively in at least pits (holes) on the crystal surface of the i layer.
【請求項2】 n型の窒化ガリウム系化合物半導体(I
nXAlYGa1-X-YN;X=0,Y=0を含む)から成るn
層と、p型不純物を添加したi型の窒化ガリウム系化合
物半導体(InXAlYGa1-X-YN;X=0,Y=0を含
む)から成るi層とを有する窒化ガリウム系化合物半導
体発光素子の製造方法において、 前記n層及び前記i層に対する電極形成以前に、該i層
の結晶表面に生じる少なくともピット(孔)部分にのみ
選択的に絶縁膜を形成することを特徴とする窒化ガリウ
ム系化合物半導体発光素子の製造方法。
2. An n-type gallium nitride-based compound semiconductor (I
n X Al Y Ga 1-XY N; including X = 0 and Y = 0)
Layer and an i layer made of an i-type gallium nitride-based compound semiconductor (In X Al Y Ga 1-XY N; including X = 0 and Y = 0) doped with a p-type impurity In the method for manufacturing a light emitting device, an insulating film is selectively formed only on at least pits (holes) formed on a crystal surface of the i layer before forming electrodes on the n layer and the i layer. Method for manufacturing gallium compound semiconductor light emitting device.
JP12502693A 1993-04-28 1993-04-28 Gallium nitride compound semiconductor light emitting element and its manufacture Pending JPH06314823A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12502693A JPH06314823A (en) 1993-04-28 1993-04-28 Gallium nitride compound semiconductor light emitting element and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12502693A JPH06314823A (en) 1993-04-28 1993-04-28 Gallium nitride compound semiconductor light emitting element and its manufacture

Publications (1)

Publication Number Publication Date
JPH06314823A true JPH06314823A (en) 1994-11-08

Family

ID=14900016

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JPH06314823A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10200215A (en) * 1997-01-08 1998-07-31 Mitsubishi Cable Ind Ltd Semiconductor light emitting element and manufacturing method thereof
JP2006339550A (en) * 2005-06-06 2006-12-14 Sony Corp Semiconductor element and manufacturing method thereof, and semiconductor device and manufacturing method thereof
KR101026031B1 (en) * 2008-11-14 2011-03-30 삼성엘이디 주식회사 Nitride Semiconductor Device and Manufacturing Method of The Same
JP2012191208A (en) * 2011-03-08 2012-10-04 Opto Tech Corp Light-emitting diode having wide view angle and method for manufacturing the same
US8934513B2 (en) 1994-09-14 2015-01-13 Rohm Co., Ltd. Semiconductor light emitting device and manufacturing method therefor
JP2018174185A (en) * 2017-03-31 2018-11-08 ソウル バイオシス カンパニー リミテッドSeoul Viosys Co.,Ltd. Light-emitting element and method of manufacturing light-emitting element

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8934513B2 (en) 1994-09-14 2015-01-13 Rohm Co., Ltd. Semiconductor light emitting device and manufacturing method therefor
JPH10200215A (en) * 1997-01-08 1998-07-31 Mitsubishi Cable Ind Ltd Semiconductor light emitting element and manufacturing method thereof
JP2006339550A (en) * 2005-06-06 2006-12-14 Sony Corp Semiconductor element and manufacturing method thereof, and semiconductor device and manufacturing method thereof
KR101026031B1 (en) * 2008-11-14 2011-03-30 삼성엘이디 주식회사 Nitride Semiconductor Device and Manufacturing Method of The Same
JP2012191208A (en) * 2011-03-08 2012-10-04 Opto Tech Corp Light-emitting diode having wide view angle and method for manufacturing the same
JP2018174185A (en) * 2017-03-31 2018-11-08 ソウル バイオシス カンパニー リミテッドSeoul Viosys Co.,Ltd. Light-emitting element and method of manufacturing light-emitting element

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