JPH06310650A - Lead frame and manufacture of the same - Google Patents

Abstract

PURPOSE:To prevent electric short circuit between bonding wires and bus bars by direct mounting of a semiconductor chip on a lead frame and deposition of resists on the bus bars through the patterning. CONSTITUTION:In a lead frame where wire bondings are carried out bridging over bus bars 10, resist 14 is deposited through the patterning at the surface of the wire bonding bridging over the bus bar 10. After the resist 14 is deposited on the external surface of lead by the deposition panting method, the resist is exposed and developed for the patterning of the deposition resist 14. After the patterning, the plating 16 is carried out on the wire bonding area.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame and a method for manufacturing the same, and more particularly to a lead frame manufactured by using an electrodeposition coating method and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 1 shows an example of a LOC (Lead On Chip) type lead frame, but the LOC type lead frame has a common lead 10 commonly used as a common power supply lead or ground lead. Common lead 10 to each inner lead 12 as shown.
There is one that is arranged so as to cross the tip side of. When wire-bonding the inner lead 12 and the semiconductor chip with such a product, the inner lead 12 is connected by wire-bonding so as to straddle over the common lead 10.

In the case of wire-bonding over the common lead 10 as described above, the wire is apt to hang down,
The hanging wire may come into contact with the common lead 10 and cause an electrical short circuit. Therefore, in such a product, it is difficult to hang down the wire by using a wire that is not easily deformed, or a portion on the common lead 10 where the wire is easily contacted is covered with an electrical insulator to prevent the wire from hanging down. It is being considered to prevent a short circuit.

[0004]

By the way, since the common lead and the semiconductor chip are wire-bonded at a plurality of locations, it is necessary to expose the surface of the common lead wire bonding area without covering it with an insulator. ,
When the common lead is covered with an electrical insulator, it is necessary to form the portion covered with the insulator and the portion exposing the common lead in a predetermined pattern. As a method of applying an electrical insulator to the common lead, a method of applying an insulator such as polyimide to the common lead can be considered, but it is a technical technique to apply the insulator to the common lead with a fine pattern. Difficult and unrealistic.

Further, it is usual to partially plate the wire bonding areas of the inner lead of the lead frame and the common lead so as to obtain a suitable wire bonding property. Even when an electrical insulator is applied, it is necessary to make such partial plating suitable. The present invention has been made to solve these problems, and an object thereof is to easily form an electrical insulator on a common lead in a predetermined pattern to effectively prevent an electrical short between a bonding wire and the common lead. The present invention aims to provide a lead frame and a method for manufacturing the same, which can be effectively prevented and also can be suitably plated on the wire bonding area.

[0006]

The present invention has the following constitution in order to achieve the above object. Ie LOC and C
The OL type lead frame is characterized in that an electrodeposition resist is deposited on the lead surface in the region where the semiconductor chip is bonded. Further, in a LOC type lead frame in which a common lead is arranged so as to cross the tip side of the inner lead at a predetermined distance from the tip of the inner lead, and wire bonding is performed across the common lead, bonding is performed on the common lead. It is characterized in that an electrodeposition resist is adhered to the surface of the portion straddled by the wire.
Further, the wire bonding areas on the common lead and the inner lead are plated. Further, the invention is characterized in that the side surface of the lead and the surface to which the semiconductor chip is bonded are coated with an electrodeposition resist. Further, in the lead frame manufacturing method, after processing a lead frame material to form a predetermined lead, an electrodeposition resist is applied to the outer surface of the lead using an electrodeposition coating method, and the electrodeposition resist is exposed. It is characterized in that after developing to remove the electrodeposition resist on a required portion such as a wire bonding area, the required portion is plated.

[0007]

[Function] By covering the lead surface with the electrodeposition resist, the lead surface is surely covered even if the lead frame is formed with high density of leads, and the electrical insulation of the lead frame is appropriately maintained. it can. Further, by exposing and developing the electrodeposition resist, the electrodeposition resist can be easily applied even with a fine pattern.
By removing the electrodeposition resist from only the wire bonding area of the electrodeposition resist deposited on the lead surface and performing the plating, it is possible to prevent leakage of the plating to the lower surface side of the lead and perform suitable plating. .

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 shows an embodiment of a lead frame according to the present invention. In the LOC type lead frame of this embodiment, inner lead groups are arranged on the left and right sides of the center line, and a common lead 10 is provided so as to cross the tip side of each inner lead 12. When mounting a semiconductor chip, the semiconductor chip is bonded to the lower surface side of the common lead 10 and the inner lead 12, and when wire-bonding the electrode of the semiconductor chip and the inner lead 12, the semiconductor chip is bonded so as to straddle the common lead 10. It

The lead frame of the embodiment is a common lead 10
Is characterized in that the electrodeposition resist 14 is applied in a predetermined pattern on the upper surface, that is, the surface through which the bonding wire passes. The electrodeposition resist 14 is an electrical insulator, and it is possible to prevent the common lead 10 and the bonding wire from being electrically short-circuited even if the bonding wire hangs down by applying the electrodeposition resist 14. Since silver plating 16 is applied to a portion of the common lead 10 that is connected to the semiconductor chip by wire bonding, the portion of the common lead 10 to which the electrodeposition resist 14 and the silver plating 16 are attached. The parts are mixed.

The lead frame of the above embodiment is characterized in that the electrodeposition resist 14 is used as an electrical insulator in order to prevent an electrical short circuit between the bonding wire and the common lead 10. Is performed as follows. First, a lead frame material is pressed or etched to form a predetermined lead pattern. Next, the electrodeposition resist 14 is applied to the surface of the lead by using the electrodeposition coating method. According to the electrodeposition coating method, the electrodeposition resist is applied to the exposed portion of the conductor, so that the electrodeposition resist 14 is surely applied to the lead surface even in a lead frame having an extremely fine pattern.

Since the electrodeposition resist 14 is applied to the exposed surface of the conductor, the entire surface of the lead is covered by the electrodeposition resist 14 unless a shielding operation or the like is performed. Like the photoresist, a resist that can be patterned in a predetermined manner by exposure / development operation is used as the electrodeposition resist 14, and only the portion where the electrodeposition resist 14 is removed is exposed to light and developed, whereby the electrodeposition of the required portion of the lead surface Only the resist 14 can be removed. Electrodeposition resist 1
The parts for removing 4 include the wire bonding areas of the inner lead 12 and the common lead 10 and the outer lead part.

Inner lead 12 and common lead 10
When the electrodeposition resist 14 is removed in order to form the wire bonding area, it is only necessary to remove the electrodeposition resist 14 on the upper surface of the lead which becomes the bonding surface. Therefore, when the electrodeposition resist 14 is removed by the inner lead 12 and the common lead 10, only the upper surface of the lead of the wire bonding portion is irradiated with light, and the electrodeposition resist 14 on the side surface and the lower surface of the lead is left as it is. . FIG. 2 shows a state in which the electrodeposition resist 14 is deposited on the surface of the leads, and then exposed and developed to remove the electrodeposition resist 14 from the wire bonding area and the outer leads. The figure illustrates only the tips of the inner leads 12 and the common lead 10.

Next, the inner lead 12 and the common lead 10 of the lead frame are plated with silver 16 by electrolytic plating. Silver plating is for improving the wire bondability. FIG. 3 shows a state after the silver plating 16 is applied. Inner lead 12 and common lead 1
The silver plating does not adhere to the portion where the electrodeposition resist 14 is 0, and the silver plating 16 can be applied only to the portion where the lead surface is exposed, that is, the wire bonding area. Thus, as shown in FIG. 1, the lead frame can be obtained in which the common lead 10 is coated with the electrodeposition resist 14 in a predetermined pattern and the wire bonding area is partially silver-plated.

As described above, the surface of the lead is electrodeposited resist 1
According to the method of patterning by exposing and developing the electrodeposition resist 14 after coating with 4, it is also possible to easily pattern the electrodeposition resist 14 with a fine pattern,
It can be suitably applied to a lead frame in which leads are finely formed. Further, there is an advantage that the electrodeposition resist 14 can be freely patterned with any pattern.

When silver plating is applied to the wire bonding areas of the inner lead 12 and the common lead 10, the electrodeposition resist 14 is removed only on the bonding surface of the lead surface and the side surface and the lower surface of the lead are electrically plated as in the above embodiment. By plating with the deposition resist 14 left, it is possible to reliably prevent the silver plating from entering the side surface of the lead and from being excessively silver-plated. In the case of the usual partial silver plating method, a mask plate is used to perform silver plating in a predetermined pattern, but in this case, the plating solution wraps around the side surface of the lead, which causes a problem in electrical characteristics such as silver migration. In this respect, the present embodiment has an advantage that the problems of the conventional partial silver plating method can be solved. In addition, although the wire bonding area is silver-plated in the above-described embodiment, the same is true when gold plating other than silver plating is applied.

As a method of depositing an electrical insulator in a predetermined pattern on the common lead 10 as in this embodiment,
Although it is conceivable to use a conventionally used photoresist, it is almost impossible to adhere the lead frame after forming the leads with a fine pattern so as to wrap the surface of each lead. In this respect, according to the electrodeposition coating method of the above-mentioned embodiment, there is an advantage that the lead surface can be surely covered with the insulating material regardless of the lead pattern and even if the leads are formed at a high density.

Further, in the above embodiment, the electrodeposition resist 14 is left on the semiconductor chip bonding area of the lead. Therefore, when the semiconductor chip is mounted on this lead frame, insulation is provided between the lead frame and the semiconductor chip. There is an advantage that the semiconductor chip can be directly bonded to the lead frame without the need for an operation for electrical insulation such as interposing a film.

Although the above embodiment is directed to a LOC type lead frame in which wire bonding is performed across the common lead 10, the electrodeposition coating method is COL (Chip).
It can also be effectively used for OnLead) type leadframes. FIG. 4 shows that by applying the electrodeposition coating method to a COL type lead frame, the entire surface of the inner lead is covered with the electrodeposition resist 14 and then the electrodeposition resist is removed from the wire bonding area. Is plated with silver 16. In the case of this product, since the surface of the inner lead 12 is covered with the electrodeposition resist 14, the semiconductor chip can be directly mounted on the inner lead 12.

Of course, in both the case of the LOC type lead frame and the case of the COL type lead frame, the unnecessary electrodeposition resist on the lead surface can be finally removed to obtain a product. If an electrodeposition resist material that has good adhesion with is selected, it is possible to prevent the generation of package cracks after molding by leaving the electrodeposition resist applied, and the electrodeposition resist was applied. It becomes possible to provide it as a useful product.

[0020]

As described above, according to the lead frame and the method of manufacturing the same of the present invention, the semiconductor chip can be directly mounted on the lead frame by depositing the electrodeposition resist on the lead surface. . Further, since the electrodeposition resist can be patterned and deposited on the common lead, an electrical short circuit between the bonding wire and the common lead can be effectively prevented. Further, by utilizing the electrodeposition coating method, it is possible to easily obtain a lead frame in which the lead surface is covered with the electrodeposition resist.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing an example of a LOC type lead frame.

FIG. 2 is an explanatory diagram showing a state in which an electrodeposition resist is attached to a lead frame.

FIG. 3 is an explanatory diagram showing a state in which a lead frame is plated with silver.

FIG. 4 is an explanatory diagram showing an example of a COL type lead frame.

[Explanation of symbols]

 10 Common lead 12 Inner lead 14 Electrodeposition resist 16 Silver plating

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Fumio Kuraishi 711, Rita, Kurita, Nagano City, Nagano Prefecture Shinko Electric Industry Co., Ltd.

Claims (5)

[Claims] 1. A lead frame of LOC type and COL type, characterized in that an electrodeposition resist is deposited on a lead surface of a region to which a semiconductor chip is bonded. 2. A LOC type lead frame in which a common lead is arranged so as to cross the tip side of the inner lead at a predetermined distance from the tip of the inner lead, and wire bonding is performed across the common lead. A lead frame, characterized in that an electrodeposition resist is applied to the surface of the portion over which the bonding wire is straddled above. 3. The lead frame according to claim 2, wherein the wire bonding areas on the common lead and the inner lead are plated. 4. The lead frame according to claim 2, wherein an electrodeposition resist is applied to the side surface of the lead and the surface to which the semiconductor chip is bonded. 5. A wire is prepared by processing a lead frame material to form a predetermined lead, applying an electrodeposition resist to the surface of the lead using an electrodeposition coating method, exposing and developing the electrodeposition resist. A method for manufacturing a lead frame, which comprises removing the electrodeposition resist on a required portion such as a bonding area and then plating the required portion.