JPH06308951A - Musical performance information reproducing device - Google Patents

Abstract

PURPOSE:To obtain a faithful reproducing sound in the case of reproducing the musical performance information in the reverse direction. CONSTITUTION:A RAM 7 stores the musical performance information containing musical tone control information. A CPU 9 reads out the RAM 7 in the direction reverse to the advance direction of a musical piece. When first musical tone control information (for instance, echo-off) is read out by the CPU 9, second musical tone control information (for instance, echo-on) existing in the direction reverse to its first musical tone information is further read out. Subsequently, to a sound source circuit 4, second musical tone control information is supplied, and based thereon, a musical tone signal is generated. Moreover, the sound source circuit 4 allows an envelope signal and a musical tone waveform to be subjected to a time inversion.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a performance information reproducing apparatus suitable for editing and reverse reproduction of automatic performance information.

[0002]

2. Description of the Related Art Conventionally, electronic musical instruments that perform automatic performance based on performance information such as MIDI data have been known, and among these musical instruments, MIDI data can be edited as appropriate. When editing MIDI data, it is convenient to search for the edited portion while reproducing the performance information in the forward and backward directions. In view of such circumstances,
The present applicant has proposed an automatic performance device capable of reproducing MIDI data in the reverse direction (Japanese Patent Laid-Open No. 62-175796). According to this technique, the MIDI data on the recording medium is read in the reverse direction, and the note-on signal and the note-off signal included in the MIDI data are converted into a note-off signal and a note-on signal, respectively. When the automatic performance is performed based on the converted data, the MID
I data is reproduced in the reverse direction.

[0003]

However, in the above-mentioned technique, it is not possible to reverse even the generation mode of the tone signal for each tone. As an example thereof, a case of reproducing a musical tone of an organ will be described. First, when the musical sound waveform of the organ is reproduced in the forward direction, the attack part where the sound level rises, the decay part where the level decays rapidly, the sustain part where the level becomes flat, and the release part where the level gradually decreases appear. Therefore, if it is reproduced in the reverse direction, the musical sound should be reproduced in the order of the release part, the sustain part, the decay part, and the attack part. However, in the above-described technique, such a faithful reverse reproduction is impossible, and a musical tone having the same waveform as the forward reproduction is reproduced. further,
Tone changes, performance on / off during performance information
Although data other than note-on and note-off data such as off may be included in some cases, the above-described technique has a problem that the position where these data are valid becomes inaccurate. For example, as performance data, tone color change (piano), note data A, B, tone color change (organ),
When there is note data C, D, tone color change (brass), etc., when reproduced in the forward direction, the note data A, B becomes the piano tone color, and the note data C, D becomes the organ tone color. On the other hand, when this is reproduced in the reverse direction, the note data D,
Since the note data B and A are read after C is read and the tone color change (organ) is read, A and B become organ tones, C and D become brass tones, and forward playback is performed. There was a problem that it could not be matched with the case of. The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a performance information reproducing apparatus capable of reverse reproduction extremely faithful to performance information.

[0004]

In order to solve the above-mentioned problems, in the structure according to claim 1, a storage means for storing performance information including musical tone control information, and the performance information in the traveling direction of the music. On the other hand, when the reading means for reading in the reverse direction and the reading means read the first musical sound control information, the second musical sound control information existing in the reverse direction to the first musical sound control information is read. It is characterized by comprising a search means and a control means for generating a tone signal based on the second tone control information. Further, in the configuration according to claim 2, a storage means for storing the performance information, and a reading means for reading the performance information in a direction opposite to the traveling direction of the music.
Envelope information generating means for outputting envelope information of a musical sound signal and outputting the envelope information by time-reversing the envelope information when the reading means operates, a tone waveform generating means for outputting a tone waveform, the envelope information and the tone waveform. And a musical tone signal synthesizing means for synthesizing a musical tone signal based on the above. Further, in the configuration according to claim 3, the storage means for storing the performance information, the reading means for reading the performance information in a direction opposite to the traveling direction of the music, and outputting the musical tone waveform, It is characterized in that it is provided with a musical tone waveform generating means for inverting and outputting the musical tone waveform when the reading means operates, and a musical tone signal synthesizing means for synthesizing a musical tone signal based on the musical tone waveform.

[0005]

In the structure according to the first aspect, the reading means reads the performance information in the direction opposite to the traveling direction of the music.
Next, when the reading means reads the first musical tone control information, the searching means reads the second musical tone control information existing in the opposite direction to the first musical tone control information. Then, the control means generates a tone signal based on the second tone control information. As a result, the tone signal corresponding to the performance information read after the first tone control information is generated based on the second tone control information. Further, in the configuration according to the second aspect, when the reading means reads the performance information in the direction opposite to the traveling direction of the music, the envelope information generating means time-inverts and outputs the envelope information. Therefore, the musical tone output from the musical tone signal synthesizing means approximates to the time-reversed actual musical tone. According to the third aspect of the present invention, when the reading means reads the performance information in the direction opposite to the traveling direction of the musical composition, the musical tone waveform generating means outputs the musical tone waveform by reversing the time. Therefore, the musical tone output from the musical tone signal synthesizing means approximates to the time-reversed actual musical tone.

[0006]

EXAMPLES A. Configuration of Example A-1. Overall Configuration of Embodiments A performance information reproducing apparatus according to an embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, reference numeral 1 denotes a panel switch, and in addition to a start / stop switch 1a for designating the start and stop of reproduction of performance information, a reverse switch 1b for designating a reproduction direction (forward or reverse direction), A plurality of controls operated by the editor are provided. The operation information in the panel switch 1 is detected by the panel detection circuit 2 and the bus 11
Is output via.

Next, 9 is a CPU, which is configured to appropriately control other components based on a control program stored in the ROM 8. 3 is a display circuit,
Under the control of the CPU 9, various data supplied via the bus 11 are displayed. 4 is a sound source circuit, C
A tone signal is generated based on various data supplied from the PU 9. The generated tone signal is sounded via the D / A converter 5 and the sound system 6. A RAM 7 stores performance information to be reproduced, and is provided with various registers and flags when the processing program operates.

A-2. Details of tone generator circuit 4 Next, details of the tone generator circuit 4 will be described with reference to FIG. In the figure, reference numeral 20 denotes an envelope generator, which outputs envelope data EV of a musical tone signal. Reference numeral 68 is a waveform memory for storing tone waveforms, which is read by the address signal ADR supplied through the address control circuit 50. The read musical tone waveform is multiplied by the envelope data EV in the multiplier 70, and various acoustic effects such as echo and vibrato are added in the effector 72. Then, the output signal of the effector 72 is supplied to the D / A converter 5 as a tone signal.

An example of the envelope data EV output by the envelope generator 20 is shown in FIG. 2 (b).
Shown in. This figure shows envelope data EV when a musical sound of an organ is generated. When the key-on signal KON is detected at time t ₀ , the envelope data E
The V level rises with a slope of a predetermined positive value (attack rate AR). Next, when the data level reaches a predetermined value (attack level AL) at time t ₁ , the data level is attenuated with a predetermined negative value (decay rate DR).

Next, when the data level reaches a predetermined value (sustain level SL) at time t ₂ , the data level becomes constant. When the key-off signal KOFF is detected at time t _3, the data level is attenuated at a slope of a predetermined negative value (release rate RR), the data level at time t ₄ is pronounced becomes "0" is completed.

Envelope data EV as described above
The state is displayed by the state signal ST that is incremented each time the state changes (details will be described later). In other words, the state signal ST is, from the time t ₀ to time t ₁ "1", from the time t ₁ to time t ₂ "2", from the time t ₂ to time t ₃ "3", from the time t ₃ until the time t ₄ is "4". Then, the slope and the final value in each state can be expressed as the basic rate data BRT and the basic level data BLV, respectively. For example, as shown in FIG. 2A, the basic rate data BRT is the attack rate AR and the basic level data BLV is the attack level AL when the state signal ST is "1".

On the other hand, when the musical sound of the organ is reproduced in the reverse direction, the envelope data EV in this embodiment is as shown in FIG. 2 (d). In the figure, when the key-on signal KON is detected at time t ₀ ', the envelope data EV rises at the release rate RR. The "key-on signal KON" referred to here was originally recorded as note-off data, but converted into the key-on signal KON when performing reverse reproduction.

Next, when the data level reaches the sustain level SL at time t ₁ ', the slope of the data level becomes constant. Next, at time t ₂ ', the key-off signal KO
When FF (that is, the signal originally recorded as the note-on data and converted into the key-off signal KOFF) is detected, the data level rises at the decay rate DR. Next, at time t ₃ ', the data level is the attack level A
When it reaches L, the data level decays at the attack rate AR. When the data level is set to "0" at time t ₄ ', pronunciation is finished. In this way, the envelope data EV in the backward reproduction is equal to the data in the forward reproduction time-reversed.

The state signal ST at the time of reverse reproduction is also provided.
Is, is 'from the time t _1' time t ₀ to "1", is 'from the time t _2' time t ₁ to "2", is 'from the time t _3' time t ₂ to "3", the time t ₃ From "to time t ₄ " is "4". Although details will be described later, whether the reproduction state is the forward direction or the reverse direction is indicated by the reverse mode signal REV. That is, if the reverse mode signal REV is "0", the reading is performed in the forward direction, and if it is "1", the reading is performed in the reverse direction.

A-2-1. Envelope Generator 20 The envelope generator 20 generates the forward and backward envelope data EV as described above, and its details will be described. First, inside the envelope generator 20, reference numeral 22 is a table for basic state data BRT and basic level data BLV for each state with respect to envelopes relating to various timbres.
Is remembered. For example, for the envelope related to the tone of "organ", as shown in FIGS. 2 (a) and 2 (c), these data are stored for the forward direction and the backward direction, respectively. Besides, similar data is recorded for various tone colors.

When the tone color data TC and the reverse mode signal REV are supplied to the table 22 via the panel switch 1 (see FIG. 1), the CPU 9 and the bus 11, eight data (for example, FIG. The eight data shown in 2 (a) are ready to be read. Then 2
Reference numeral 6 is a state generation circuit, which is the above-mentioned "1" to "4".
Output the state signal ST. The state signal ST to be output has an initial value of "1" and is incremented by "1" each time a coincidence signal is output from the comparator 30 (details will be described later).

Reference numeral 24 is a rate calculating circuit, which reads the basic rate data BRT corresponding to the state signal ST supplied from the state generating circuit 26 from the table 22 and, when the velocity data VEL is supplied, the velocity data VEL. Data whose maximum value is "1" and whose minimum value is "0" (hereinafter referred to as modified velocity data VEL '
Called). And the basic rate data BRT
And the modified velocity data VEL ′ are multiplied, and the multiplication result is output as rate data RT.

Now, the reason why the rate calculating circuit 24 performs the above-described multiplication will be described. First, the basic rate data BRT and the basic level data BLV read from the table 22 are the reverse mode signal RE.
V, the tone color data TC, and the state signal ST are uniquely determined, and thus the envelope data EV as shown in FIG. 2B is determined. The effects of different velocities are not considered.

For example, if the envelope level of the musical tone waveform becomes "1/2" because the velocity is small, the level data should also be "1/2".
There are also cases where it is desired to control the shape of the envelope (for example, the attack speed) according to the velocity. Therefore, in the rate calculation circuit 24, the basic rate data BRT is multiplied by the modified velocity data VEL ′, and the rate data RT with added velocity is output.

Reference numeral 32 denotes a level calculation circuit, which reads basic level data BLV corresponding to the state signal ST supplied from the state generation circuit 26 from the table 22 and supplies velocity data VEL when the velocity data VEL is supplied. Correct VEL Velocity data VE
Convert to L '. Then, similar to the rate calculation circuit 24, the corrected velocity data V is added to the basic level data BLV.
EL ′ is multiplied and the multiplication result is output as level data LV.

Reference numeral 28 denotes an accumulator, which is a rate calculation circuit 24.
The rate data RT supplied from the CPU are accumulated, and the result is output as envelope data EV. Further, the accumulator 28, when the accumulated value becomes “0”,
The “1” signal is supplied to the OR circuit 66. Reference numeral 30 denotes a comparator, which compares the envelope data EV with the level data LV, and supplies a coincidence detection signal to the state generation circuit 26 when they coincide with each other. The state generation circuit 26 receives the state signal S when the coincidence detection signal is supplied from the comparator 30.
Increment T by "1".

However, the state generation circuit 26 does not increment the state signal ST based on the coincidence detection signal when the basic rate data BRT is "0". That is, in this case, it is detected whether or not the key-off signal KOFF is supplied, and when this is supplied, the state signal ST is incremented by "1".

In the above configuration, when the reverse mode signal REV and the tone color data TC are supplied to the table 22 with the state signal ST initialized to "1",
Based on these signals ST, REV and data TC, basic level data BLV and basic rate data B
RT is read from the table 22. If "0" is supplied as the reverse mode signal REV and the read data is as shown in FIG. 2A,
First, the attack rate AR is supplied to the rate calculation circuit 24 as the basic rate data BRT, and the attack level AL
Is supplied to the level calculation circuit 32 as basic level data BLV.

Next, the attack rate AR and the attack level AL are respectively multiplied by the modified velocity data VEL ', and the rate data RT and the level data LV are output. In the accumulator 28, the rate data RT
Are accumulated, the level of the envelope data EV increases with time. When the envelope data EV matches the level data LV, the match detection signal is supplied to the state generation circuit 26, and the state signal ST
Is incremented to "2".

When the state signal ST becomes "2", the decay rate DR is read from the table 22 as the basic rate data BRT and the sustain level SL as the basic level data BLV. Then, the level of the envelope data EV becomes smaller with time.
Then, the envelope data EV and the level data LV
When and match, the match detection signal indicates the state generation circuit 26.
And the state signal ST is incremented to “3”.

When the state signal ST becomes "3", "0" is read as the basic rate data BRT and the sustain level SL is read as the basic level data BLV from the table 22. In this case, since the basic rate data BRT is "0", the level data LV is always at the sustain level SL, and the comparator 30 always outputs the coincidence detection signal. However, as described above, when the basic rate data BRT is “0”, the state signal ST is not updated by the coincidence detection signal.
T is kept as "3", and the envelope data EV having a constant value is continuously output.

When the key-off data is read from the RAM 7 (see FIG. 1) and the CPU 9 supplies the key-off signal KOFF to the envelope generator 20 based on the read key-off data, the state signal ST is incremented to "4". It As a result, the release rate RR as the basic rate data BRT and "0" as the basic level data BLV are read from the table 22, respectively, and the level of the envelope data EV becomes smaller with the lapse of time. Then, when the envelope data EV becomes "0", the "1" signal is supplied from the accumulator 28 to the OR circuit 66.

From the above, it can be seen that the envelope data EV similar to that shown in FIG. 2B is output from the accumulator 28. Also, the reverse mode signal REV is "1".
If it is, basic rate data BRT and basic level data BLV similar to those shown in FIG. 2C are read out, and envelope data EV similar to that shown in FIG. 2D are obtained. .

A-2-2. Configuration of Waveform Memory 68 Next, the waveform memory 68 includes a piano, a harpsichord,
Waveforms corresponding to various timbres such as organ are stored. An example of one of the waveforms is shown in FIG.

In the figure, AS is an attack start address and LS is a loop start address, and a waveform at the initial stage of a musical tone is stored between both addresses. Further, LE is a loop end address, and between the loop start address LS and the loop end address LE, the waveform of the musical sound that has passed the initial stage is stored.

Therefore, when reproducing the tone waveform in the forward direction, first, the waveform memory 68 is read only once from the attack start address AS to the loop end address LE, and then the loop start address LS to the loop end address LE. It is advisable to repeatedly read the waveform only in the section up to LE (see FIG. 7B). When reproducing the tone waveform in the reverse direction, the loop end address L
The waveform may be repeatedly read only in the section from E to the loop start address LS, and finally the waveform from the loop end address LE to the attack start address AS may be read only once.

The address accessed in the waveform memory 68 is determined by the address signal ADR. By controlling the increment width of the address signal ADR per unit time, musical tone waveforms are read out at various pitches. That is, the larger the increment width, the higher the pitch.

A-2-3. Configuration of Other Parts of Sound Source Circuit 4 The above-mentioned address control of the waveform memory 68 is specifically performed by other components of the sound source circuit 4. The details will be described below. First, reference numeral 40 is a preset address generator which, when supplied with tone color data TC, outputs an attack start address AS, a loop start address LS and a loop end address LE relating to the tone color. Each output address is registered in register 4
2, 44, 46 are stored.

Reference numeral 48 is a frequency number conversion circuit, which is RA
When the note number NTN is supplied from M7 via the CPU 9, the frequency number FNO is calculated and output based on the note number NTN and the reverse mode signal REV. This frequency number FNO indicates the increment width of the above-mentioned address signal ADR, and has a larger absolute value as the pitch indicated by the note number NTN is higher. Here, the sign of the frequency number FNO is set according to the reverse mode signal REV. That is, when the reverse mode signal REV is "0", the sign of the frequency number FNO is positive (+), and when the signal REV is "1", the sign of the number FNO is negative (-).

A selector 60 selects the loop end address LE when the reverse mode signal REV is "0", while selecting and selecting the loop start address LS when the signal REV is "1". The address information is supplied to the comparator 58. The comparator 58 is the selector 6
Address information and address signal AD supplied via 0
R is compared, and if they match, a "1" signal is supplied to one end of the AND circuit 56. Further, 52 is an AND circuit that outputs the logical product of the reverse mode signal REV and the key-off signal KOFF, and 54 is an inverter that inverts the output of the AND circuit 52 and supplies it to the other end of the AND circuit 56.

Reference numeral 62 denotes a comparator which compares the address signal ADR with the attack start address AS and supplies a "1" signal to one end of the AND circuit 64 when they match. The reverse mode signal REV is input to the other end of the AND circuit 64. Further, the OR circuit 66 supplies the logical sum of the output signal of the AND circuit 64 and the output of the accumulator 28 in the envelope generator 20 to the address control circuit 50 as a stop signal STP.

Here, the function of the address control circuit 50 will be described. The address control circuit 50 has the following functions according to the reverse mode signal REV.
That is, when the signal REV is “0”, the address control circuit 50 determines the attack start address AS.
Is set as an initial value, and the address signal ADR is incremented for each frequency number FNO.

Here, the start time of the increment is the time when the key-on signal KON of "1" is input,
The increment time interval is defined by a predetermined clock signal (not shown). Also, the address control circuit 5
When 0 is supplied with the load signal LD of "1" when the reverse mode signal REV is "0", the value of the address signal ADR is forcibly set to the loop start address LS. Further, when the stop signal STP of "1" is supplied, the address control circuit 50 stops the increment of the address signal ADR.

On the other hand, the reverse mode signal REV is "1".
, The initial value of the address signal ADR is set to the loop end address LE. Also, the load signal L
The value at which the address signal ADR is forcibly set when D is supplied is the loop end address LE. However, the functions other than the above are almost the same as when the reverse mode signal REV is "0".

In the above structure, the reverse mode signal R
When EV is “0”, that is, when the reproduction direction is the forward direction, the frequency number conversion circuit 48 outputs a positive frequency number FNO and supplies it to the address control circuit 50. Also,
The loop end address LE is supplied to the comparator 58 via the selector 60.

When the address control circuit 50 is supplied with the key-on signal KON of "1", the address control circuit 50 outputs the address signal ADR. The address signal ADR has an attack start address AS as an initial value and is incremented by a frequency number FNO every clock. Here, since the frequency number FNO is a positive value, the address signal ADR becomes large with time.

Next, when the address signal ADR becomes equal to the loop end address LE, the comparator 58 outputs "1".
The signal is output. Here, when the key-off signal KOFF is not yet output (that is, the key-off signal KOFF is "0"), the AND circuit 52 outputs the "0" signal and the inverter 54 outputs the "1" signal. It That is, since the "1" signal is supplied to both input terminals of the AND circuit 56, the output load signal LD becomes "1".

As a result, the address signal ADR is forcibly set to the loop start address LS and is incremented by the frequency number FNO every clock.
Then, when the address signal ADR becomes equal to the loop end address LE again, the load signal LD becomes "1" again. Similarly, the address signal ADR is repeatedly incremented in the range from the loop start address LS to the loop end address LE, and the corresponding portion of the waveform memory 68 is repeatedly read.

When the key-off signal KOFF becomes "1", the "1" signal is supplied to one input terminal of the AND circuit 52, but the reverse mode signal REV which is a "0" signal is always supplied to the other input terminal. Is being supplied. Therefore, since the AND circuit 52 still outputs the "0" signal, the operation state of the address control circuit 50 is not changed. In the case of forward reproduction, a reverse mode signal R which is a "0" signal
Since EV is supplied to one end of the AND circuit 64, the output signal of the AND circuit 64 is always "0". Therefore, the stop signal STP is output only when the accumulator 28 outputs the "1" signal.

As described above, when the reverse mode signal REV is "0", the address signal ADR is as shown in FIG.
It changes as shown in. Then, this address signal AD
The waveform signal WF is output from the waveform memory 68 based on R, the waveform signal WF is multiplied by the envelope data EV in the multiplier 70, and the multiplication result is sent to the D / A converter 5 via the effector 72 as a musical tone signal. Supplied.

On the other hand, in the above configuration, when the reverse mode signal REV is "1", that is, the reproduction direction is the reverse direction, the frequency number conversion circuit 48 outputs the negative frequency number F.
NO is output and supplied to the address control circuit 50.
Further, the loop start address LS is supplied to the comparator 58 via the selector 60.

When the key-on signal KON of "1" is supplied to the address control circuit 50, the address signal AD
R has a loop end address LE as an initial value and is incremented by a frequency number FNO every clock. Here, since the frequency number FNO is a negative value,
The address signal ADR becomes small with time.

Next, when the address signal ADR becomes equal to the loop start address LS, the comparator 58 outputs a "1" signal. Here, the key-off signal KOF
When F is “0”, the AND circuit 52 outputs “0”.
A signal is output, and the inverter 54 outputs a “1” signal. That is, "1" is applied to both input terminals of the AND circuit 56.
Since the signal is supplied, the output load signal LD becomes "1".

As a result, the address signal ADR is forcibly set to the loop end address LE and is incremented by the frequency number FNO for each clock. Then, when the address signal ADR becomes equal to the loop start address LS again, the load signal LD becomes "1" again. Similarly, the address signal ADR is repeatedly incremented in the range from the loop end address LE to the loop start address LS, and the corresponding portion of the waveform memory 68 is repeatedly read.

Here, when the key-off signal KOFF becomes "1", the "1" signal is supplied to both input terminals of the AND circuit 52, so that the output signal of the AND circuit 52 becomes "1". Therefore, even if the comparator 58 subsequently outputs a "1" signal, the load signal LD is always "0", and the address signal ADR continues to be low.

Then, at time t _E , the address signal A
If DR and attack start address AS match,
Since the comparator 62 outputs the "1" signal to the AND circuit 64, the "1" signal is output from the AND circuit 64. Therefore, the stop signal STP is supplied to the address control circuit 50 at the earlier of the time when the accumulator 28 outputs the "1" signal or the time when the comparator 62 outputs the "1" signal. It will be.

As described above, when the reverse mode signal REV is "1", the address signal ADR is as shown in FIG.
It changes as shown in. Then, this address signal AD
The waveform signal WF is output from the waveform memory 68 based on R, the waveform signal WF is multiplied by the envelope data EV in the multiplier 70, and the multiplication result is supplied to the D / A converter 5 as a tone signal.

The time t _E when the address signal ADR becomes "0" (see FIG. 4C) and the envelope data E
Since it does not always coincide with time t ₄ 'when V becomes "0" (see FIG. 2 (d)), for example, the address signal ADR becomes a constant value before the envelope data EV becomes "0",
Alternatively, even if the address signal ADR does not reach the attack start address AS,
It is possible that the data EV becomes "0". But,
Considering that the time from the time t ₂ 'to the time t ₄ ' is extremely short, and that the backward reproduction is used not for viewing but for sound search, there is practically no problem. .

B. Operation of Embodiment Next, the operation of this embodiment will be described with reference to FIGS. Note that these figures are flowcharts of the control program stored in the ROM 8. First, when the power of the performance information reproducing apparatus is turned on, the main routine shown in FIG. 6 is started, and a predetermined initialization is performed in step SP101. Then, the switch processing in step SP102 and the other processing in step SP103 are repeatedly executed.

Here, the data format of the performance information used in this embodiment will be described with reference to FIG. FIG. 5 shows a map of performance information stored in the RAM 7. In the figure, reference numeral 80 denotes a header section in which initial parameters of a musical tone such as an initial tempo and tone color of the musical tone are recorded. Also, 81b, 83b, 84d and 85b
Is an event part, and note-on data or note-off data is recorded together with a key code. 82b,
Reference numerals 84b, 84c, 84d are control units for changing tone colors, changing volume, turning effects on / off, and the like.
Various musical tone control data are recorded.

Further, 81a, 82a, 83a, 84a, and 85a are timing sections, in which timing data indicating the timing for executing the processing relating to the next event data and control data is recorded. This timing data displays the time at which the event occurs within the bar to which the event or the like that occurs next belongs.
For example, if the time signature of the music is 4/4, the start point and the end point of one bar are equally divided into “96”, and the timing data is represented by numerical data of “0” to “95”.
The details will be described later. In this way, one timing part and one event part or one control part are in principle paired. However, 8 in FIG.
As shown in 4b to 84d, a plurality of event parts or control parts may be recorded following one timing part. For example, when recording chords, and
This is because the key depression operation may be performed at the same timing and an effect such as an echo may be added. Also,
End data 89 indicating the end of the performance information is recorded in the last part of the performance information.

B-1. In the switch processing subroutine
That Operation Next, when the various switches has been pressed, the details of the switch process in step SP102 will be described with reference to FIG.

B-1-1. Start / stop switch
When the process is started in the process diagram when 1a is pressed, it is determined in step SP1 whether there is an event of the start / stop switch 1a. Here, if there is an event of the switch 1a, it is determined to be "YES" and the process proceeds to step SP2. In step SP2, the flag R
It is determined whether UN is “0”. Here, the flag RUN is a flag which indicates that the reproducing operation is being executed when it is "1" and indicates that the reproducing operation is not being executed when it is "0".

Here, if the flag RUN is "1", that is, if the start / stop switch 1a is pressed during the reproducing operation, the process proceeds to step SP6 and the flag RUN is set to "0". . Details will be described later,
In the other steps, when the flag RUN is "0", no processing is substantially performed, so that the reproduction operation is stopped.

On the other hand, if the flag RUN is "0", the process proceeds to step SP3. In step SP3, the header section 80 of the performance information is read from the RAM 7, and the initial tempo, tone color, etc. of the musical tone are set thereby. Next, when the processing proceeds to step SP4, the first timing data (in the illustrated example, the timing section 81a
(Timing data relating to the above) is read and the content thereof is stored in a variable TIME (hereinafter referred to as timing information). Then, the flag RUN is set to "1" and the variable C
LK (referred to as clock data) is set to "0".
In addition, when there is no event of the start / stop switch 1a, the processes of steps SP2 to 6 are skipped, and the process immediately proceeds to step SP7.

B-1-2. Based on reverse switch 1b
Processing Here, processing when the reverse switch 1b changes from the off state to the on state will be described. First, step S
In P7, it is determined whether or not an on event of the reverse switch 1b has occurred. Here, it is determined as "YES" and the process proceeds to step SP8. In step SP8, it is determined whether or not the flag RUN is "1", and if "YES" is determined here, the process is step S.
Proceed to P9.

At step SP9, the timing data in the immediately higher timing portion is read out and the content thereof is set in the timing information TIME. It should be noted that here, “upper” means a direction closer to the header section 80 in the data format shown in FIG. Similarly, the direction of approaching the end portion 89 is referred to as “down”. For example, when the timing unit read last is the timing unit 84a, the timing unit 83a immediately above the timing unit 84a is read. On the other hand, if "NO" is determined in step SP8, steps SP9 and SP10 are skipped and the process proceeds to step SP11.

Next, when the processing advances to step SP10,
The reverse mode signal REV of “1” is supplied to the sound source circuit 4. Therefore, in the sound source circuit 4, the operation corresponding to the above-described backward reproduction is executed. Next, processing when the reverse switch 1b changes from the on state to the off state will be described. First, in step SP7, "N
It is determined to be "O" and the process proceeds to step SP11. In step SP11, it is determined whether or not an off event of the reverse switch 1b has occurred, and here, "YE
It is determined to be "S" and the process proceeds to step SP12. In step SP12, it is determined whether or not the flag RUN is "1", and if "YES" is determined, the process proceeds to step SP13, while if "NO" is determined, step SP13 is skipped. Processing is step SP14
Proceed to.

Assuming that the flag RUN is "1", the process proceeds to step SP13 and the reverse mode signal REV of "0" is supplied to the tone generator circuit 4. Therefore, in the sound source circuit 4, the operation corresponding to the above-described forward reproduction is executed. Then, the above steps SP1 to SP1
When the process of 13 is completed, the process proceeds to step SP14, and various other switch processes are performed.

B-2. Operation in Timer Interrupt Processing In the present embodiment, the timer 10 generates an interrupt signal at predetermined time intervals, whereby the CPU 9 executes the interrupt processing. The details will be described with reference to FIG. Here, the interval at which the interrupt signal is generated is set according to the tempo of the performance, and is "24 times" per quarter note (hence, 4/4).
If it is a beat, an interrupt signal of "96 times" is generated per bar. FIG. 8 shows a flowchart in the case of 4/4 time.

B-2-1. Main routine of timer interrupt processing
Operation in Chin When the process is started in FIG. 8, it is determined in step SP20 whether the flag RUN is "1". Here, when the flag RUN is "0", the reproducing operation is not in progress, so the timer interrupt processing is immediately terminated. On the other hand, if the flag RUN is "1", the process proceeds to step SP21.

In step SP21, it is determined whether the clock data CLK is equal to the timing information TIME. Here, first, step SP5 (see FIG. 7)
Assuming that the clock data CLK has not been updated since was executed, the clock data CLK is “0”. It is also assumed that the timing information TIME has been set to a positive predetermined value at the time when step SP4 is executed first.

Based on the above premise, it is determined to be "NO" in step SP21, and the process proceeds to step SP27. In steps SP27 to 33, the clock data CLK is updated. That is, during forward reproduction, the process proceeds to step SP30 via steps SP27 and 28, and the clock data CLK is decremented by "1". However, step SP2
If it is determined that the clock data CLK is "95" in 8, the process proceeds to step SP29, and the clock data CLK is set to "0". That is, the clock data CLK is data indicating the elapsed time within the bar, with the time corresponding to one bar equally divided by "96" as one unit.

On the other hand, at the time of backward reproduction, the process advances to step SP33 via steps SP27 and 31, and the clock data CLK is decremented by "1". However, if it is determined in step SP31 that the clock data CLK is "0", the process proceeds to step SP32, and the clock data CLK is set to "95".

In this way, steps SP27 to SP33 are executed every time the timer interrupt occurs, and the clock data CL
When K is updated, the clock data CLK eventually becomes equal to the timing information TIME. When the timer interrupt is further generated, "YE
S ”is determined, and the process proceeds to step SP22. In step SP22, the event section or control section corresponding to the timing section read last is read. For example, if the timing portion read last is the timing portion 82a, the control portion 82b is read.

Next, the reverse mode signal REV is "0".
If so, the process proceeds to step SP through step SP23.
Proceeding to 24, the forward processing subroutine is called. On the other hand, if the reverse mode signal REV is "1", the process proceeds to step SP25, and the backward process subroutine is called. The processing when each subroutine is called will be described below.

B-2-2. Forward processing subroutine called
A forward processing subroutine shown in the process diagram 9 when issued is called, various processes are performed in accordance with the type of event data read last. First, when the event data is a note-on event, the process proceeds from step SP40 to step SP41, and the CPU 9 causes the tone generator circuit 4 to operate.
The key-on signal KON, the note number NTN, the velocity data VEL, etc. are output. by this,
In the tone generator circuit 4, sound generation processing is started.

If the event data is a note-off event, the process proceeds to step SP45,
The key-off signal KOFF is supplied to the tone generator circuit 4. As a result, the state signal ST generated by the state generation circuit 26 (see FIG. 3) is updated to "4". After that, when the stop signal STP is supplied to the address control circuit 50 via the accumulator 28 and the OR circuit 66, the sound generation related to the sound is stopped.

Further, the event data is the end part 89.
If the end data is recorded in, the flag RU
After N is set to "0", the process returns to the timer interrupt process routine (FIG. 8). If the event data is not note-on, note-off, or end data, for example, if the tone color is changed, the process proceeds to step SP4.
Then, the processing according to the contents is performed.

When the processing of step SP41, 45 or 48 is completed, the processing proceeds to step SP42 and the data in the downward direction is read from the next data, that is, the last read data. Next, the process is step SP4.
When proceeding to 3, it is judged whether or not the read data is timing data. Here, when it is determined to be "NO", step SP4 is performed on the data.
The processing after 0 is repeated. Here, a specific example of determination as "NO" corresponds to a case where echo-on data is placed immediately after the note-on data, that is, a case where echo is applied at the same time as note-on. When the timing data is read in step SP42, the process returns to the timer interrupt processing routine via step SP43.

Then, when the processing advances to step SP26, the timing data previously read in step SP43 is stored in the timing information TIME. After that, every time a timer interrupt occurs, the timing information TIME and the clock data CLK are output in step SP21.
The processing of steps SP28 to 30 is executed and the clock data CLK is incremented until it is determined that Then, in step SP21, "YES"
If it is determined that the new event data is read again in step SP22, a process corresponding to the event data is performed.

B-2-3. Reverse processing subroutine called
Processing when Issued Next, the processing when the backward processing subroutine is called in step SP25 will be described with reference to FIG. When the backward processing subroutine shown in FIG. 10 is called, various processing is performed according to the type of event data or the like that was last read. First, when the event data or the like is a note-off event, the processing is step SP6.
The process proceeds to step SP66 via 0 and 65. Step S
In P66, note-on data corresponding to the read note-off data is searched. Needless to say, this note-on data exists in the upward direction with reference to the note-off data. Then, the velocity data VEL is read from this note-on data.

Next, when the processing advances to step SP67,
Key-on signal KON, note number NTN in tone generator circuit 4
And velocity data VEL are output. That is, the key-on signal KON is supplied to the tone generator circuit 4 even though the event data previously read in step SP22 is the note-off data. by this,
In the sound source circuit 4, the sound generation process related to the backward reproduction is started.

If the event data or the like read in step SP22 is a note-on event, the process proceeds from step SP60 to step SP6.
Go to 1. In step SP61, the key-off signal KOFF and the note number NTN corresponding to the key-off signal KOFF are output to the tone generator circuit 4. As a result, the state signal ST in the state generation circuit 26 becomes "3", and the load signal LD output from the AND circuit 56 is held at "0". As a result, the stop signal STP is supplied from the OR circuit 66 to the address control circuit 50 after a lapse of a predetermined time, and the sound generation is ended.

If the event data or the like read in step SP22 is control data, the process proceeds to step SP69 via steps SP60, 65 and 68. In step SP69, the control data corresponding to the read control data is read. For example, the data read in step SP22 is the control unit 84b (see FIG. 5).
In the case of "echo off" in (see reference), the control section is searched upward from the control section 84b, and "echo on" in the control section 82b is read.

When the corresponding data is found in step SP69, the process proceeds to step SP72 via step SP71, and the process according to the searched data is performed. For example, when the data searched in step SP69 is "echo on" related to the control section 82b, the effect of adding an echo to the musical tone, C
A command is supplied from the PU 9 to the effector 72.

On the other hand, in some cases, there is no data corresponding to the control data read in step SP22. For example, this corresponds to the case where the read control data is the control unit 84c. In the control section 84c, there is control data to the effect that "set tone color to organ", but control data corresponding thereto does not exist in the control sections 82b and 84b in the upward direction.

If the corresponding data cannot be found in step SP69, the process proceeds to step SP73 via step SP71. In step SP73, the header section 80 is read out, and if the corresponding data exists here, the processing based on the corresponding data is executed. For example, if the control data read out in step SP22 is the control data related to the control section 84c (tone color change), the initial data stored in the header section 80 indicating "set tone color to piano" is read. The preset tone generator 40 outputs the tone color data TC that specifies the tone color of "piano".
Is supplied to. If the corresponding data does not exist in the header section 80, no particular processing is performed.

If the data read in step SP22 is not note-on, note-off, or control data, step SP60,
It is determined to be "NO" at 65 and 68, and the process proceeds to step SP70. Note that a specific example corresponding to this is only when the reading has proceeded to the header section 80. In this case, the vertical reproduction has reached the beginning of the performance data, and the reverse mode signal REV is set to "0" in step SP70. Therefore, thereafter, the data after the timing section 81a is read again, and the reproduction operation in the forward direction is performed.

As described above, step SP60,6
When it is determined to be "YES" in any of 5 and 68, the corresponding processing is performed. Then, when the corresponding process ends, the process proceeds to step SP62. In step SP62, the next (that is, one downward) data is read. Here, if the read data is other than the timing data, the processing from step SP60 onward is repeated via step SP63. On the other hand, if the read data is timing data, the process proceeds to step SP64, and the next higher timing data is read.

For example, when the data read in step SP62 is the control data for the tone color setting in the control section 84c, the control section 84d is subsequently read out and the corresponding processing is performed.
Next, when the timing portion 85a is read, it is determined as "YES" in step SP63. As a result, in step SP64, the next higher timing data, that is, the timing data in the timing section 83a is read.

When performing a search in steps SP66 and SP69, step SP4
An address pointer separate from the address pointers used in 2, 62, 64, etc. is used. That is,
No matter what data is retrieved in steps SP66 and 69, the address specified in step SP64 is not affected.

B-3. Specific Example of Search Operation Here, a specific example of the search operation of the performance information according to the present embodiment will be described with reference to FIG. Referring to FIG. 5, there is control data for changing the tone color to "organ" in the control section 84c, but here, this control data is inserted by mistake, and it is assumed that this data is deleted. To do.

First, the editor turns on the power of the performance information reproducing apparatus of this embodiment and loads the performance information shown in FIG. At this point, both the flag RUN and the reverse mode signal REV are “0”.
Is. Next, the editor will start / stop switch 1
When a is pressed, the header section 80 is read out and the tone color is set to "piano" in step SP3 (see FIG. 7).

Thereafter, forward reproduction is performed according to the performance information stored in the RAM 7. That is, the event section 8
When 1b is read, the musical tone signal of note number "C3" is sounded through the sound system 6. Next, when the control section 82b is read, an echo is added to this musical sound signal. Next, when the event section 83b is read, the musical sound associated with the note number "C3" is released, and when the control section 84b is read, the echo is turned off.

Next, when the event portion 84c is read out, the tone color data TC is changed to the one indicating "organ", and when the event portion 84d is read out, the musical tone of the note number "D3" having the tone color of the organ is sounded. To be done.
Here, it is assumed that the editor notices an error in the performance information several seconds after the tone color data TC is changed, and depresses the reverse switch 1b. When the reverse switch 1b is pressed, the performance information that has been reproduced so far is reproduced in the reverse direction.

The tone color in the reverse reproduction is the tone color immediately before the reverse switch 1b is pressed, that is, "organ". Then, the backward reproduction is performed up to the event portion 84d with the tone color of "organ". Next, when the control section 84c is read, as described above, the steps SP68, SP69, and SP71 are performed, and then the step SP73.
The process of is executed. That is, the tone color data corresponding to the control data for changing the tone color and designating the tone color of "piano" is read from the header section 80,
This data is supplied to the tone generator circuit 4 as tone color data TC.

Therefore, when the event portion 83b is read out next, the musical tone of the note number "C3" is produced with the tone color of "piano". By this, the editor can know the existing position of the control unit 84c, and appropriately perform processing such as deleting it. Various devices are well known as devices for editing performance information, and these devices may be appropriately used. As described above, according to this embodiment, when the control section 84c is read during the backward reproduction, the header section 80 is searched and the tone color data TC is changed to the one indicating "piano". Therefore, even during the backward reproduction, the positions of the various control units can be accurately grasped, and the portion where the performance information should be edited can be promptly determined.

C. Modifications The present invention is not limited to the embodiments described above, and various modifications can be made, for example, as follows. In the above embodiment, the content of the reverse mode signal REV is changed only while the reverse switch 1b is being pressed, but the content of the reverse mode signal REV may be changed each time the reverse switch 1b is pressed.

In the above embodiment, the forward reproduction is first executed and then the reverse reproduction is executed. However, the reverse reproduction may be executed from the beginning. In this case, it is preferable to read only the control section downward from the header section 80 at the beginning of the backward reproduction and set the tone generator circuit 4 based on the read result. That is, since this setting is originally at the end of the music, if the performance information is reproduced upward from the end portion 89 as it is, the reverse reproduction can be accurately performed.

In the above embodiment, the frequency at which the timer interrupt occurs is 24 times per quarter note, but it goes without saying that this frequency may be changed as appropriate. Further, in the above-mentioned embodiment, the operation is explained only when the performance information of 4/4 time signature is reproduced.
By changing the constant in 2, it is possible to reproduce the performance information of other beats in the same manner.

The sound source circuit 4 shown in FIG. 3 has a structure capable of producing only one sound at a time, but like the well-known electronic musical instruments, sound generation channels are assigned by time division processing so that a plurality of sounds can be output simultaneously. May be.

The note data in the above embodiment has note-on data and note-off data for one note, but other than this, various data formats for expressing the playing state are known. Therefore, the present invention is in no way limited by the format of the data. For example, it may be a format in which note-on data and gate time (representing a period from note-on to note-off) are provided for one note.

In the above-described embodiment, when the control data is read from the RAM 7, the tone generator circuit 4 is set immediately in response to this, but the tone generator circuit 4 is set by outputting the next key-on signal KON. It may be done at some point.

In the above embodiment, when a slight deviation occurs between time t ₄ '(see FIG. 2 (d)) and time t _E (see FIG. 4 (c)) during reverse reproduction. However, they may be configured to match. That is, when the key-off signal KOFF signal is output from the CPU 9,
Since the time t _E is uniquely determined, the attack rate AR may be finely adjusted so that the time t ₄ ′ and the time t _E match.

In the above embodiment, the envelope generator 20 calculates the envelope data EV by calculation, but the envelope waveform may be stored in the memory in advance and read out. Further, the example of the sound source of the waveform memory method is shown, but a sound source of a method of forming a musical tone waveform by calculation such as FM method may be used. In this case, in order to obtain a time-reversed musical tone waveform, the time variation mode of the given parameter may be reversed.

[0102]

As described above, according to the structure of the first aspect, the second musical tone control information existing in the direction opposite to the traveling direction of the music is more than the first musical tone control information. Since the tone signal is read out and the tone signal is generated, extremely accurate control information can be added to the tone. Further, in the configurations of claims 2 and 3, since the envelope information or the musical tone waveform is time-inverted and output, it is possible to generate a tone signal that is close to the time-reversed actual tone. is there. Therefore, according to the present invention, it is possible to perform reverse reproduction that is extremely faithful to the performance information.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an example.

FIG. 2 Envelope data EV in one embodiment
It is a waveform diagram of.

FIG. 3 is a block diagram of a tone generator circuit 4.

FIG. 4 is a diagram illustrating the operation of the embodiment.

FIG. 5 is a diagram illustrating the operation of the embodiment.

FIG. 6 is a flowchart of a main routine of one embodiment.

FIG. 7 is a flowchart of a switch processing subroutine.

FIG. 8 is a flowchart of a timer interrupt processing routine.

FIG. 9 is a flowchart of a forward processing subroutine.

FIG. 10 is a flowchart of a reverse processing subroutine.

[Explanation of symbols]

4 sound source circuit (control means, musical tone waveform generating means) 7 RAM (memory means) 9 CPU (reading means, search means, control means) 20 envelope generator (envelope information generating means) 70 multiplier (tone waveform synthesizing means)

Claims (3)

[Claims] 1. A storage unit for storing performance information including musical tone control information, a reading unit for reading the musical performance information in a direction opposite to the direction of music, and the reading unit for first musical tone control information. Retrieval means for reading out second tone control information existing in the opposite direction to the first tone control information when read, and control means for generating a tone signal based on the second tone control information. A performance information reproducing apparatus comprising: 2. Storage means for storing performance information, reading means for reading the performance information in a direction opposite to the traveling direction of music, and output of envelope information of a musical tone signal and the operation of the reading means, An envelope information generating means for outputting time-reversed envelope information, a musical tone waveform generating means for outputting a musical tone waveform, and a musical tone signal synthesizing means for synthesizing a musical tone signal based on the envelope information and the musical tone waveform are provided. A performance information reproducing device characterized in that 3. Storage means for storing performance information, reading means for reading out the performance information in a direction opposite to a traveling direction of music, and outputting the musical tone waveform, and when the reading means operates, the musical tone waveform is generated. A musical performance information reproducing apparatus comprising: a musical tone waveform generating means for reversing the time and outputting; and a musical tone signal synthesizing means for synthesizing a musical tone signal based on the musical tone waveform.