JPH0629567A - Light-receiving circuit - Google Patents
Light-receiving circuitInfo
- Publication number
- JPH0629567A JPH0629567A JP4184969A JP18496992A JPH0629567A JP H0629567 A JPH0629567 A JP H0629567A JP 4184969 A JP4184969 A JP 4184969A JP 18496992 A JP18496992 A JP 18496992A JP H0629567 A JPH0629567 A JP H0629567A
- Authority
- JP
- Japan
- Prior art keywords
- light
- receiving circuit
- light receiving
- elements
- amorphous silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、光通信、光情報処理あ
るいはイメージセンシングなどの機能を実現するための
光電子機能回路に用いて有用な高感度な受光回路に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a highly sensitive light receiving circuit useful as an optoelectronic functional circuit for realizing functions such as optical communication, optical information processing or image sensing.
【０００２】[0002]
【従来の技術】従来、４００ｎｍから８００ｎｍの可視
光領域において透明なガラス基板上に形成した光感応素
子として、水素化アモルファスシリコンを用いたｐ−ｉ
−ｎ構造のフォトダイオードが報告されている。図５
に、テレビジョン学会技出報告（VOL.12 p.55-60,1988)
に記載されている二次元イメージセンサ用アモルファス
シリコンｐ−ｉ−ｎフォトダイオードの受光回路を示
す。図５において、アモルファスシリコンｐ−ｉ−ｎフ
ォトダイオードＤ10とブロッキングダイオードＤ11とが
互いに逆極性で直列接続されている。Ｃ10とＣ11は各ダ
イオードの接合容量である。この受光回路では、光照射
時に、アモルファスシリコンｐ−ｉ−ｎフォトダイオー
ドＤ10に発生した電荷をこのフォトダイオードＤ10自身
の接合容量Ｃ10に蓄積する。そしてブロッキングダイオ
ードＤ11に蓄積された電荷を取り出すには、外部の駆動
回路から負のドライビングパルスをブロッキングダイオ
ードＤ11に入れる。これにより、ブロッキングダイオー
ドＤ11が順方向バイアスとなり、光量に応じた電荷が電
流として、増幅回路などの外部回路に流れ、受光回路と
して動作する。2. Description of the Related Art Conventionally, a pi using hydrogenated amorphous silicon as a photosensitive element formed on a transparent glass substrate in the visible light region of 400 nm to 800 nm.
Photodiodes of -n structure have been reported. Figure 5
, Technical Report of the Television Society (VOL.12 p.55-60,1988)
2 shows a light receiving circuit of the amorphous silicon pin photodiode for the two-dimensional image sensor described in FIG. In FIG. 5, an amorphous silicon pin photodiode D 10 and a blocking diode D 11 are connected in series with opposite polarities. C 10 and C 11 are junction capacitances of the respective diodes. In this light receiving circuit, charges generated in the amorphous silicon p-i-n photodiode D 10 during light irradiation are accumulated in the junction capacitance C 10 of the photodiode D 10 itself. Then, in order to take out the electric charge accumulated in the blocking diode D 11 , a negative driving pulse is applied to the blocking diode D 11 from an external drive circuit. As a result, the blocking diode D 11 is forward-biased, and a charge according to the amount of light flows as a current to an external circuit such as an amplifier circuit and operates as a light receiving circuit.
【０００３】上述した従来の受光回路では、光を照射し
た明状態の出力電流は印加電圧に対して急激に立ち上り
増加するが、逆方向電流が高く、光入射時のＳ／Ｎ比
（信号雑音比）は低い。In the conventional light receiving circuit described above, the output current in the bright state irradiated with light rises sharply with respect to the applied voltage, but the reverse current is high and the S / N ratio (signal noise) at the time of light incidence is high. Ratio) is low.
【０００４】一般に、ガラスなどの絶縁体基板上に形成
したｐ−ｉ−ｎフォトダイオードの逆電流は、フォトダ
イオードのパターニングの際のドライエッチングによっ
て膜が損傷を受けることにより、逆方向電流の増加傾向
にある。従って、このようなｐ−ｉ−ｎフォトダイオー
ドでイメージセンシングを行った場合、フォトダイオー
ドの暗電流のばらつきが大きいため、読み取り誤差が生
じてしまうことになる。また、２次元アレイを構成する
場合は、フォトダイオードの暗電流とＳ／Ｎ比によって
アレイ化ができる並列度に限界があり、特に、入射光強
度が弱い場合は高並列度が困難である。Generally, the reverse current of a pin photodiode formed on an insulating substrate such as glass is increased due to the damage of the film caused by dry etching during patterning of the photodiode. There is a tendency. Therefore, when image sensing is performed with such a p-i-n photodiode, a large variation in the dark current of the photodiode causes a read error. Further, when a two-dimensional array is formed, there is a limit to the degree of parallelism that can be arrayed depending on the dark current of the photodiode and the S / N ratio, and particularly when the incident light intensity is weak, it is difficult to achieve a high degree of parallelism.
【０００５】[0005]
【発明が解決しようとする課題】光感応素子のＳ／Ｎ比
を向上させるには、光感応素子の暗状態時の出力を低減
させることが必要である。また、出力を常に安定に得る
には、光感応素子の温度変化や時間的変化を打ち消す必
要がある。更に、微弱な入射光に対して大きな出力を得
るためには、光感応素子の出力を増幅する機能が必要で
ある。In order to improve the S / N ratio of the photosensitive element, it is necessary to reduce the output of the photosensitive element in the dark state. Further, in order to obtain a stable output, it is necessary to cancel the temperature change and the time change of the photosensitive element. Furthermore, in order to obtain a large output with respect to weak incident light, a function of amplifying the output of the photosensitive element is required.
【０００６】本発明の目的は、上述した必要性に鑑み、
光感応素子の出力のＳ／Ｎ比を向上し、また光感応素子
の温度変化や時間的変化を打ち消し、更に高感度な光検
出が可能な受光回路を提供することにある。The object of the present invention is to solve the above-mentioned need.
An object of the present invention is to provide a light receiving circuit capable of improving the S / N ratio of the output of the photosensitive element, canceling the temperature change and the temporal change of the photosensitive element, and further capable of highly sensitive light detection.
【０００７】[0007]
【課題を解決するための手段】上記目的を達成するた
め、請求項１の受光回路は、２個の光感応素子と２個以
上の抵抗素子とが組み合わされてブリッジ回路が構成さ
れ、前記２個の光感応素子のうち一方に入射される光の
光路中に遮光部材が設けられていることを特徴とするも
のである。In order to achieve the above object, a light receiving circuit according to a first aspect of the invention is a bridge circuit constructed by combining two photosensitive elements and two or more resistance elements. It is characterized in that a light shielding member is provided in the optical path of the light incident on one of the individual light sensitive elements.
【０００８】請求項２の受光回路は、請求項１におい
て、前記光感応素子と抵抗素子が入射される光を透過す
る同一の基板上に形成されており、前記２個の光感応素
子と２個以上の抵抗素子がシリコン及びゲルマニウムの
うちいずれか又は両方の元素を構成元素とする薄膜デバ
イスであることを特徴とするものである。According to a second aspect of the present invention, in the light receiving circuit according to the first aspect, the light sensitive element and the resistance element are formed on the same substrate that transmits incident light, and the two light sensitive elements and One or more resistance elements is a thin film device having one or both elements of silicon and germanium as constituent elements.
【０００９】請求項３の受光回路は、請求項１におい
て、前記光感応素子と抵抗素子が入射される光を透過す
る同一の基板上に形成されており、前記光感応素子がア
モルファスシリコンｐ−ｉ−ｎフォトダイオードである
ことを特徴とするものである。According to a third aspect of the present invention, in the light receiving circuit according to the first aspect, the light sensitive element and the resistance element are formed on the same substrate that transmits incident light, and the light sensitive element is made of amorphous silicon p-. It is characterized by being an in photodiode.
【００１０】請求項４の受光回路は、請求項１におい
て、前記光感応素子と抵抗素子が入射される光を透過す
る同一の基板上に形成されており、前記抵抗素子が、ポ
リシリコンを用いた薄膜トランジスタ、アモルファスシ
リコンｐ−ｉ−ｎフォトダイオード及び薄膜抵抗のうち
のいずれかまたは複数の組み合わせにより構成されてい
ることを特徴とするものである。According to a fourth aspect of the present invention, in the light receiving circuit according to the first aspect, the photosensitive element and the resistance element are formed on the same substrate that transmits incident light, and the resistance element is made of polysilicon. The thin film transistor, the amorphous silicon pin photodiode, and the thin film resistor, or a combination of a plurality of the thin film transistors, are used.
【００１１】[0011]
【作用】請求項１では、２つの光感応素子のうち遮光し
た方が常時暗状態となり、この光感応素子の出力を基準
にして、ブリッジ回路により、遮光しない方の光感応素
子の暗電流を相殺するため、暗状態での出力が低減し、
Ｓ／Ｎ比が高まる。また、同じ理由により、遮光した光
感応素子の出力が基準となり、ブリッジ回路により、遮
光しない方の光感応素子出力の温度変化や時間的変化を
打ち消す。更に、ブリッジ回路なので、光感応素子また
は抵抗素子のインピーダンスを高く設定することにより
高感度となり、入射光が微弱な場合でも高感度に出力を
得ることができる。According to the present invention, one of the two light-sensitive elements which is shielded is always in a dark state, and the dark current of the light-sensitive element which is not shielded is set by the bridge circuit based on the output of this light-sensitive element. Because of the cancellation, the output in the dark state is reduced,
S / N ratio increases. Further, for the same reason, the output of the light-sensitive element that is shielded becomes a reference, and the bridge circuit cancels the temperature change and the temporal change of the output of the light-sensitive element that is not shielded. Further, since it is a bridge circuit, high sensitivity can be obtained by setting the impedance of the photosensitive element or the resistance element to be high, and an output can be obtained with high sensitivity even when the incident light is weak.
【００１２】請求項２の発明では、シリコン、ゲルマニ
ウムのいずれか又は両方を構成元素とする薄膜の光感応
素子及び抵抗素子は高並列受光素子アレイの構成に有利
であり、これらの光感応素子と抵抗素子を同一基板上に
複数形成する。According to the second aspect of the present invention, the thin film light-sensitive element and the resistance element having silicon or germanium or both as constituent elements are advantageous in the construction of the highly parallel light-receiving element array. A plurality of resistance elements are formed on the same substrate.
【００１３】請求項３の発明では、光感応素子としてア
モルファスシリコンｐ−ｉ−ｎフォトダイオードを用い
ることにより、可視光領域での光検出感度が高い。According to the third aspect of the invention, by using the amorphous silicon pin photodiode as the light sensitive element, the light detection sensitivity in the visible light region is high.
【００１４】請求項４の発明では、抵抗素子として、ポ
リシリコンの薄膜トランジスタ、アモルファスシリコン
ｐ−ｉ−ｎフォトダイオード及び薄膜抵抗のいずれか又
は複数の組み合せとすることにより、受光回路の製作が
容易になる。According to the invention of claim 4, as the resistance element, any one or a combination of a thin film transistor of polysilicon, an amorphous silicon pin photodiode, and a thin film resistor is used, so that the light receiving circuit can be easily manufactured. Become.
【００１５】[0015]
【実施例】以下、実施例を示す図面を参照して本発明を
詳細に説明する。図１は本発明の受光回路の第１実施例
を示す。図１に示す実施例では、２つの光感応素子とし
てアモルファスシリコンｐ−ｉ−ｎフォトダイオードＤ
１，Ｄ２を用い、２つの抵抗素子としてポリシリコンの
薄膜トランジスタ（ＴＦＴ）Ｔｒ１，Ｔｒ２を用い、こ
れらでブリッジ回路を構成してある。但し、一方のアモ
ルファスシリコンｐ−ｉ−ｎフォトダイオードＤ２は膜
状の遮光部材（以下、遮光膜という）１を設け、このｐ
−ｉ−ｎフォトダイオードＤ２に入射する光の光路を遮
って常時暗状態にしている。また、２つのｐ−ｉ−ｎフ
ォトダイオードＤ１，Ｄ２はブリッジ中の一方の互いに
隣接するアームに配置し、これに対向する他方の互いに
隣接するアームに２つの薄膜トランジスタＴｒ１，Ｔｒ
２を配置してある。更に、ブリッジ回路の４つの端子と
して、電極２，３，４，５を設けてある。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the drawings showing the embodiments. FIG. 1 shows a first embodiment of the light receiving circuit of the present invention. In the embodiment shown in FIG. 1, an amorphous silicon pin photodiode D is used as two photosensitive elements.
1, D2 are used, and polysilicon thin film transistors (TFTs) Tr1 and Tr2 are used as two resistance elements, and a bridge circuit is configured by these. However, one of the amorphous silicon pin photodiodes D2 is provided with a film-shaped light shielding member (hereinafter referred to as a light shielding film) 1, and this p
The optical path of the light that enters the -i-n photodiode D2 is blocked to keep it in the dark state at all times. Further, the two p-i-n photodiodes D1 and D2 are arranged in one of the arms adjacent to each other in the bridge, and the two thin film transistors Tr1 and Tr are arranged in the other adjacent arm facing each other.
2 are arranged. Further, electrodes 2, 3, 4, and 5 are provided as four terminals of the bridge circuit.
【００１６】図１に示した受光回路を以下の工程により
作製した。図２に示す受光回路の模式的な断面構造を参
照して、受光回路の作製工程を説明する。 （１）透明基板として、厚さ１ｍｍの石英基板６を用い
た。 （２）まず、石英基板６上に、チャンネル長１０μｍの
ｎチャンネルのポリシリコン薄膜トランジスタＴｒ１，
Ｔｒ２を作製して、２つの抵抗素子を形成した。 （３）次に、透明電極７，８を形成し、一方の透明電極
８上にＭｏ（モリブデン）膜を形成して遮光膜１とし
た。 （４）次に、プラズマＣＶＤ法を用いて、透明電極７及
びＭｏ遮光膜１上にそれぞれｎ型，ｉ型，ｐ型のアモル
ファスシリコン膜を順次堆積して、アモルファスシリコ
ンｐ−ｉ−ｎフォトダイオードＤ１，Ｄ２を作成し、２
つの光感応素子を形成した。 （５）次に、層間絶縁膜を形成した後、最後に金属電極
２，３，４，５を形成し、受光回路の作製を終了した。The light receiving circuit shown in FIG. 1 was manufactured by the following steps. The manufacturing process of the light receiving circuit will be described with reference to the schematic cross-sectional structure of the light receiving circuit shown in FIG. (1) As the transparent substrate, a quartz substrate 6 having a thickness of 1 mm was used. (2) First, on the quartz substrate 6, an n-channel polysilicon thin film transistor Tr1 having a channel length of 10 μm is formed.
Tr2 was produced to form two resistance elements. (3) Next, the transparent electrodes 7 and 8 were formed, and a Mo (molybdenum) film was formed on one transparent electrode 8 to form the light shielding film 1. (4) Next, an amorphous silicon film of n-type, i-type, and p-type is sequentially deposited on the transparent electrode 7 and the Mo light-shielding film 1 by plasma CVD, respectively, and amorphous silicon pin photo Create diodes D1 and D2, and
Two photosensitive elements were formed. (5) Next, after forming the interlayer insulating film, the metal electrodes 2, 3, 4, and 5 were finally formed, and the fabrication of the light receiving circuit was completed.
【００１７】上記（１）〜（５）の工程で作製した受光
回路の受光特性は以下に述べる通りであった。図１又は
図２に示す電極２に１５Ｖの直流電圧を印加し、これに
対向する電極３を接地し、他の電極４の電位と電極５の
電位との差を出力電圧とする。この時、図２に示す如く
透明基板６の裏面から光９を入射し、入射光強度と出力
電圧の関係を調べた。得られた特性を図３に示す。具体
的には、波長６３３ｎｍの光の入射光強度が４０μＷ／
cm2 以上で約１５Ｖの出力電圧が得られており、高感度
な受光検出を確認できた。また、この実施例の受光回路
の消費電力は、６０μＷ／cm2 と極めて低く、高並列受
光素子アレイ化した場合でも特別な冷却機構を必要とし
ない。The light receiving characteristics of the light receiving circuit manufactured in the steps (1) to (5) are as described below. A DC voltage of 15 V is applied to the electrode 2 shown in FIG. 1 or 2, the electrode 3 facing it is grounded, and the difference between the potential of the other electrode 4 and the potential of the electrode 5 is used as the output voltage. At this time, as shown in FIG. 2, light 9 was made incident from the back surface of the transparent substrate 6, and the relationship between the incident light intensity and the output voltage was investigated. The obtained characteristics are shown in FIG. Specifically, the incident light intensity of light with a wavelength of 633 nm is 40 μW /
An output voltage of about 15 V was obtained at cm 2 or higher, which confirmed highly sensitive detection of received light. Moreover, the power consumption of the light receiving circuit of this embodiment is extremely low at 60 μW / cm 2, and no special cooling mechanism is required even when a highly parallel light receiving element array is formed.
【００１８】図４に本発明の受光回路の第２実施例を示
す。この実施例の受光回路では、２個のアモルファスシ
リコンｐ−ｉ−ｎフォトダイオードＤ１，Ｄ２と、４個
の抵抗素子としてポリシリコン薄膜トランジスタＴｒ
３，Ｔｒ４，Ｔｒ５，Ｔｒ６とを用い、これらでブリッ
ジ回路を構成してある。但し、フォトダイオードＤ２に
は遮光膜１を設け、Ｄ２に入射する光の光路を遮断して
いる。これら各素子Ｄ１，Ｄ２，Ｔｒ３〜Ｔｒ６及び１
は同一の透明基板上に形成してある。FIG. 4 shows a second embodiment of the light receiving circuit of the present invention. In the light receiving circuit of this embodiment, two amorphous silicon p-i-n photodiodes D1 and D2 and a polysilicon thin film transistor Tr as four resistance elements are used.
3, Tr4, Tr5, Tr6 are used to form a bridge circuit. However, the light-shielding film 1 is provided on the photodiode D2 to block the optical path of light incident on D2. These elements D1, D2, Tr3 to Tr6 and 1
Are formed on the same transparent substrate.
【００１９】更に、第２の実施例では、受光回路の透明
基板上に６個の薄膜トランジスタＴｒ７，Ｔｒ８，Ｔｒ
９，Ｔｒ１０，Ｔｒ１１及びＴｒ１２により差動増幅回
路を構成しており、ブリッジ回路の出力電圧を増幅して
一層高感度な光検出を実現している。図４中、２，３，
１０，１１は電極である。Further, in the second embodiment, six thin film transistors Tr7, Tr8, Tr are provided on the transparent substrate of the light receiving circuit.
A differential amplifier circuit is configured by 9, Tr10, Tr11, and Tr12, and the output voltage of the bridge circuit is amplified to realize more highly sensitive light detection. 2, 3, 3 in FIG.
Reference numerals 10 and 11 are electrodes.
【００２０】上述した第１及び第２実施例では、抵抗素
子として薄膜トランジスタＴｒ１〜Ｔｒ６を用いたが、
アモルファスシリコンｐ−ｉ−ｎフォトダイオード又は
／及び薄膜抵抗など抵抗を呈するものを用いることもで
き、構成元素としてもシリコンの他、ゲルマニウや、シ
リコンとゲルマニウムの合金などを使用できる。同様
に、光感応素子としてもアモルファスシリコンｐ−ｉ−
ｎフォトダイオードに限らず、構成元素としてもシリコ
ンの他に、ゲルマニウムや、シリコンとゲルマニウムの
合金などを用いることもできる。更に、遮光膜１もＭｏ
に限らず、透明基板６も石英に限らず、適宜な材料を使
用することができる。Although the thin film transistors Tr1 to Tr6 are used as the resistance elements in the above-described first and second embodiments,
Amorphous silicon p-i-n photodiodes and / or those exhibiting resistance such as thin film resistance can also be used, and as the constituent element, besides silicon, germanium or an alloy of silicon and germanium can be used. Similarly, as a light sensitive element, amorphous silicon p-i-
Not only the n photodiode but also silicon, germanium, an alloy of silicon and germanium, or the like can be used as a constituent element in addition to silicon. Furthermore, the light-shielding film 1 is also made of Mo.
However, the transparent substrate 6 is not limited to quartz, and an appropriate material can be used.
【００２１】[0021]
【発明の効果】以上説明したように、本発明の受光回路
は、以下の効果を奏する。 （１）ブリッジ回路により、遮光した常時暗状態の光感
応素子の出力を基準にしているため、暗状態での受光回
路の出力が低減し、Ｓ／Ｎ比を増大することができる。 （２）同じく、遮光した常時暗状態の光感応素子の出力
を基準にしているため、光感応素子の温度変化や時間的
変化を打ち消すことができ、受光回路の出力が安定化す
る。 （３）光感応素子または抵抗素子のインピーダンスを高
く設定することにより、入射光が微弱な場合でも、高感
度に出力を得ることができる。 （４）従って、本発明の受光回路の適用により、高感度
な受光素子アレイを透明基板上に形成することができ
る。 （５）特に、請求項２の発明の如くシリコン、ゲルマニ
ウムのいずれか又は両方を構成元素とする薄膜の光感応
素子及び抵抗素子を用いることにより、高並列受光素子
アレイを構成することができる。 （６）また、請求項３の発明の如く、光感応素子として
アモルファスシリコンｐ−ｉ−ｎフォトダイオードを用
いることにより、可視光領域での光検出感度を高くする
ことができる。 （７）更に、請求項４の発明の如く抵抗素子として、ポ
リシリコンの薄膜トランジスタ、アモルファスシリコン
ｐ−ｉ−ｎフォトダイオード及び薄膜抵抗のいずれか又
は複数の組み合せとすることにより、受光回路の製作が
容易になる。 （８）本発明の受光回路は、高度な機能を有する様々な
光電子機能回路に適用することができる。As described above, the light receiving circuit of the present invention has the following effects. (1) The output of the light receiving circuit in the dark state is reduced and the S / N ratio can be increased because the output of the light sensitive element in the dark state which is shielded by the bridge circuit is used as a reference. (2) Similarly, since the output of the light sensitive element in the normally dark state which is shielded from light is used as a reference, it is possible to cancel the temperature change and the time change of the light sensitive element, and the output of the light receiving circuit is stabilized. (3) By setting the impedance of the photosensitive element or the resistive element to be high, it is possible to obtain an output with high sensitivity even when the incident light is weak. (4) Therefore, by applying the light receiving circuit of the present invention, a highly sensitive light receiving element array can be formed on the transparent substrate. (5) In particular, the highly parallel light receiving element array can be constructed by using the thin film photosensitive element and the resistive element having silicon or germanium or both as constituent elements as in the invention of claim 2. (6) Further, as in the third aspect of the invention, by using the amorphous silicon pin photodiode as the light sensitive element, it is possible to increase the light detection sensitivity in the visible light region. (7) Further, as the resistance element according to the invention of claim 4, any one of or a combination of a thin film transistor of polysilicon, an amorphous silicon pin photodiode, and a thin film resistor is used as a resistance element, thereby manufacturing a light receiving circuit. It will be easier. (8) The light receiving circuit of the present invention can be applied to various optoelectronic functional circuits having advanced functions.
【図１】本発明の受光回路の第１実施例の回路構成を示
す図。FIG. 1 is a diagram showing a circuit configuration of a first embodiment of a light receiving circuit of the present invention.
【図２】第１実施例の受光回路の断面構造を模式的に示
す図。FIG. 2 is a diagram schematically showing a cross-sectional structure of the light receiving circuit of the first embodiment.
【図３】第１実施例の受光回路の出力電圧−印加電圧特
性を示す図。FIG. 3 is a diagram showing an output voltage-applied voltage characteristic of the light receiving circuit of the first embodiment.
【図４】本発明の受光回路の第２実施例の回路構成を示
す図。FIG. 4 is a diagram showing a circuit configuration of a second embodiment of a light receiving circuit of the present invention.
【図５】従来の受光回路の回路構成を示す図。FIG. 5 is a diagram showing a circuit configuration of a conventional light receiving circuit.
Ｄ１，Ｄ２ 光感応素子（アモルファスシリコンｐ−ｉ
−ｎフォトダイオード） Ｔｒ１，Ｔｒ２，Ｔｒ３，Ｔｒ４，Ｔｒ５，Ｔｒ６ 抵
抗素子（ポリシリコン薄膜トランジスタ） Ｔｒ７，Ｔｒ８，Ｔｒ９，Ｔｒ１０，Ｔｒ１１，Ｔｒ１
２ 薄膜トランジスタ１ 遮光膜 ２，３，４，５，１０，１１ 電極 ６ 基板 ７，８ 透明電極 ９ 入射光D1, D2 photosensitive element (amorphous silicon p-i
-N photodiode) Tr1, Tr2, Tr3, Tr4, Tr5, Tr6 resistance element (polysilicon thin film transistor) Tr7, Tr8, Tr9, Tr10, Tr11, Tr1
2 Thin-film transistor 1 Light-shielding film 2, 3, 4, 5, 10, 11 Electrode 6 Substrate 7,8 Transparent electrode 9 Incident light
Claims (4)
とが組み合わされてブリッジ回路が構成され、前記２個
の光感応素子のうち一方に入射される光の光路中に遮光
部材が設けられていることを特徴とする受光回路。1. A light-shielding member in the optical path of light incident on one of the two photosensitive elements, the bridge circuit being formed by combining two photosensitive elements and two or more resistive elements. A light receiving circuit characterized by being provided.
光を透過する同一の基板上に形成されており、前記２個
の光感応素子と２個以上の抵抗素子がシリコン及びゲル
マニウムのうちいずれか又は両方の元素を構成元素とす
る薄膜デバイスであることを特徴とする請求項１記載の
受光回路。2. The photosensitive element and the resistive element are formed on the same substrate that transmits incident light, and the two photosensitive elements and the two or more resistive elements are made of silicon or germanium. The light receiving circuit according to claim 1, wherein the light receiving circuit is a thin film device having one or both of the elements as constituent elements.
光を透過する同一の基板上に形成されており、前記光感
応素子がアモルファスシリコンｐ−ｉ−ｎフォトダイオ
ードであることを特徴とする請求項１記載の受光回路。3. The photosensitive element and the resistance element are formed on the same substrate that transmits incident light, and the photosensitive element is an amorphous silicon pin photodiode. The light receiving circuit according to claim 1.
光を透過する同一の基板上に形成されており、前記抵抗
素子が、ポリシリコンを用いた薄膜トランジスタ、アモ
ルファスシリコンｐ−ｉ−ｎフォトダイオード及び薄膜
抵抗のうちのいずれかまたは複数の組み合わせにより構
成されていることを特徴とする請求項１記載の受光回
路。4. The photosensitive element and the resistance element are formed on the same substrate that transmits incident light, and the resistance element is a thin film transistor using polysilicon, amorphous silicon pin photo. The light receiving circuit according to claim 1, wherein the light receiving circuit is configured by any one or a combination of a diode and a thin film resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4184969A JPH0629567A (en) | 1992-07-13 | 1992-07-13 | Light-receiving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4184969A JPH0629567A (en) | 1992-07-13 | 1992-07-13 | Light-receiving circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0629567A true JPH0629567A (en) | 1994-02-04 |
Family
ID=16162526
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4184969A Withdrawn JPH0629567A (en) | 1992-07-13 | 1992-07-13 | Light-receiving circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0629567A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005129909A (en) * | 2003-09-19 | 2005-05-19 | Semiconductor Energy Lab Co Ltd | Optical sensor device and electronic apparatus |
| JP2005136392A (en) * | 2003-10-06 | 2005-05-26 | Semiconductor Energy Lab Co Ltd | Semiconductor device and its manufacturing method |
| EP2109895A1 (en) * | 2007-02-07 | 2009-10-21 | Sharp Kabushiki Kaisha | A light sensing system |
| JP2010153915A (en) * | 2006-05-30 | 2010-07-08 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| US8779348B2 (en) | 2008-03-21 | 2014-07-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising photodiode and transistor circuit |
| US11353360B2 (en) | 2017-03-22 | 2022-06-07 | Mitsubishi Electric Corporation | Electromagnetic wave detector, electromagnetic wave detector array, and electromagnetic wave detection method |
-
1992
- 1992-07-13 JP JP4184969A patent/JPH0629567A/en not_active Withdrawn
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005129909A (en) * | 2003-09-19 | 2005-05-19 | Semiconductor Energy Lab Co Ltd | Optical sensor device and electronic apparatus |
| JP2005136392A (en) * | 2003-10-06 | 2005-05-26 | Semiconductor Energy Lab Co Ltd | Semiconductor device and its manufacturing method |
| JP2010153915A (en) * | 2006-05-30 | 2010-07-08 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| EP2109895A1 (en) * | 2007-02-07 | 2009-10-21 | Sharp Kabushiki Kaisha | A light sensing system |
| EP2109895A4 (en) * | 2007-02-07 | 2011-05-25 | Sharp Kk | A light sensing system |
| US8779348B2 (en) | 2008-03-21 | 2014-07-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising photodiode and transistor circuit |
| US11353360B2 (en) | 2017-03-22 | 2022-06-07 | Mitsubishi Electric Corporation | Electromagnetic wave detector, electromagnetic wave detector array, and electromagnetic wave detection method |
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