JPH0629168A - Manufacture of lsi substrate - Google Patents

Abstract

PURPOSE:To freely and respectively control thickness of a buried oxide layer and surface silicon single crystal film in the SOI structure of LSI substrate. CONSTITUTION:A buried amorphous layer 3 is formed by simultaneously or alternately conducting implantation of oxygen ions and vacuum deposition of silicon atoms to an LSI substrate 8a made of a single crystal silicon wafer 1. Thereafter, high temperature annealing is carried out at a time to convert the buried amorphous layer 3 into the buried oxide layer 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a silicon LSI (Large
Scale integrated circuit A method of processing a silicon substrate for forming a large scale integrated circuit, particularly SOI (S
The present invention relates to a method for manufacturing an LSI substrate for forming an (ilicon on insulator) structure.

[0002]

2. Description of the Related Art Conventionally, a method of using a silicon single crystal thin film formed on an insulator as a substrate for LSI has been known. This structure is called SOI and is used for forming high breakdown voltage devices, radiation resistant devices, and ultra-high speed devices.
Oxygen ion implantation is a promising method for forming this SOI structure. Figure 1 shows a schematic diagram of a conventional oxygen ion implantation method.
0 and FIG. FIG. 10 shows the structure immediately after ion implantation. In FIG. 10, when the oxygen ions 2 accelerated to high energy are implanted into the surface of the silicon wafer 1, the implanted oxygen concentrates in a region having a depth depending on the acceleration voltage. For example, when the accelerating voltage is 200 KV, the oxygen concentration becomes high at about 400 nm from the surface, and the amorphous layer 3 of SiOx (X ≦ 2) composition in which silicon is oxidized appears.

FIG. 11 shows a structure obtained by high-temperature thermal annealing the silicon wafer 1 after oxygen ion implantation shown in FIG. In FIG. 11, a buried oxide layer 5 of composition SiO ₂ is formed inside the silicon wafer 1 while leaving the thin silicon single crystal film 4 on the surface portion. A research presentation has already been made on the depth distribution of implanted oxygen, and the results are described in J. F. ZIEGLE
R), J. P. BIERSACK, U.S. Litmark
(LITTMARK) 's book `` The Stopping and Range of Ions i
n Solids "(Pergamon Press) Vol. 1, p. 192. According to the result, the average depth of implanted oxygen is uniquely determined by the implantation energy, and the width of the depth distribution is also determined by the implantation energy. Further, both the average depth of oxygen and the width of distribution have larger values as the implantation energy is higher.

[0004]

Therefore, as described above, in the conventional oxygen ion implantation method, the thicknesses of the surface silicon single crystal film 4 and the buried oxide layer 5 are both determined by the implantation energy of oxygen ions. There is a drawback that the surface silicon single crystal film 4 and the buried oxide layer 5 having an arbitrary thickness cannot be formed. Conventionally, in order to solve this problem, a series of operations of implantation of oxygen ions 2 and high temperature annealing is performed to form an SOI structure, and then the acceleration voltage of oxygen ions is changed again to perform implantation of oxygen ions 2 and high temperature annealing. The method has been taken. However, it is complicated to change the condition setting accompanying the change of the acceleration voltage of the ion source, and it is necessary to control the implantation amount of the oxygen ions 2 extremely precisely. Further, since the oxygen ion 2 is implanted again after being taken out from the ion implantation apparatus and subjected to high-temperature annealing, there is a drawback that it is difficult to form an SOI structure due to surface contamination.

As another method for solving the drawback of the conventional method, the thickness of the surface silicon single crystal film 4 is increased by single crystal growth of silicon on the surface of the silicon wafer 1 on which the SOI structure is formed by high temperature annealing. The method of controlling was adopted. In that case, it is necessary to clean the surface after high-temperature annealing before single crystal growth, and therefore, wet etching with acid and 8 in vacuum are required.
It was complicated because a step of heating at a high temperature of 00 ° C. or higher was required. Furthermore, in the conventional oxygen ion 2 implantation method, the acceleration voltage is as high as 100 to 200 KV, so that the oxygen distribution depth obtained is as deep as several hundred nm. Therefore, the thickness of the surface silicon single crystal film 4 is several hundreds n.
Since it is limited to m, it is not possible to form a thin film SOI structure having a thin embedded oxide layer 5 of 100 nm or less and a thin surface silicon single crystal film 4 which is indispensable for manufacturing an ultra high speed LSI recently. was there. Further, when the amorphous buried oxide layer 5 is formed by the conventional method using high energy oxygen ions 2 of 100 to 200 KV, a large amount of oxygen ion implantation of about 10 ¹⁸ per cm ² is required. Since the number of passing oxygen ions is large, there is a drawback that many serious defects are left in the surface silicon single crystal film 4. Therefore, the object of the present invention is to eliminate the above-mentioned drawbacks of the conventional example and to make it possible to control the film thicknesses of the buried oxide layer 5 and the surface silicon single crystal film 4 of the SOI structure, respectively.
A method of manufacturing an LSI substrate having a structure is provided.

[0006]

SUMMARY OF THE INVENTION To achieve the above object, therefore, the present invention provides an LS having a buried oxide layer by implanting oxygen ions into a single crystal silicon wafer.
The method for producing a substrate for I has a first step of simultaneously or alternately implanting oxygen ions and vapor deposition of silicon atoms, and a second step of performing high temperature annealing treatment after the completion of the first step. This is a method for manufacturing an LSI substrate.
Furthermore, the acceleration energy range of the implanted oxygen ions may be 10 to 100 KV.

[0007]

In the method of manufacturing the LSI substrate having the above structure,
By implanting oxygen ions and vapor-depositing silicon atoms into a single crystal silicon wafer simultaneously or alternately, SO
The embedded amorphous layer having the I structure and the thickness of the surface silicon single crystal film are arbitrarily controlled, and finally, the high temperature annealing process is collectively performed to make the amorphous layer a buried oxide layer and the entire single crystal silicon wafer. Stabilize it. By setting the acceleration energy range of the implanted oxygen ions to 10 to 100 KV, the distribution region of the implanted oxygen becomes narrow and steep.

[0008]

Embodiments of the present invention will now be described with reference to the drawings. 1 to 5 are explanatory views of the first embodiment of the present invention. In the first embodiment, implantation of oxygen ions and vapor deposition of silicon atoms are carried out at the same time, followed by high temperature annealing treatment. FIG. 1 shows the peak position 6 of the oxygen ion distribution injected immediately after the start of simultaneous formation, while FIG. 2 shows the peak position 6a of the oxygen ion distribution injected immediately before the end of simultaneous formation. FIG. 3 shows the structure at the end of the simultaneous formation, FIG. 4 shows the structure after the ion implantation is stopped and the silicon single crystal is grown, and finally FIG. 5 shows the structure after the high temperature annealing. 1 and 2, oxygen ions are implanted into the silicon wafer 1, and the peak positions 6.6a of the distribution are determined. At the end of the simultaneous formation, as shown in FIG. 3, an amorphous layer 3 having a high oxygen concentration and being amorphized in the silicon wafer 1 and a thin silicon single crystal film 4 are formed on the upper side of the amorphous layer 3 in the figure. Next, the oxygen ion implantation is stopped and the silicon single crystal growth layer 7 is formed as shown in FIG. Finally, when a high temperature annealing process is performed, as shown in FIG. 5, a substrate 8a for an LSI having an SOI structure is formed in which a buried oxide layer 5 is formed in a silicon wafer 1 and a silicon single crystal film 4 is formed on the upper side in the figure.

As described in the above-mentioned conventional example, oxygen ions are implanted into the silicon wafer 1, and the surface of the wafer is maintained in a silicon single crystal state at the time of implantation. For this reason,
When silicon is vapor-deposited at the same time as the oxygen ion implantation, the silicon single crystal growth layer 7 can be formed by keeping the temperature of the silicon wafer 1 at a high temperature of about several hundreds of degrees Celsius or higher. At this time, it is necessary to set the silicon deposition rate to a value higher than the rate at which the surface silicon single crystal growth layer 7 is sputtered by oxygen ions. If the silicon deposition rate is twice the sputtering rate, theoretical calculation of oxygen distribution during ion implantation becomes easy. During the oxygen ion implantation and the silicon single crystal growth, it is possible to continue the growth of the amorphous layer 3 inside the silicon wafer 1 while leaving the silicon single crystal growth layer 7 on the surface of the silicon wafer 1. it can. When the thickness of the amorphous layer 3 reaches a predetermined value, oxygen ion implantation is stopped, and thereafter, only the growth of the silicon single crystal growth layer 7 is continued until it reaches a predetermined thickness. After completion of such a series of operations, the silicon wafer 1 is taken out from the apparatus and subjected to a high temperature annealing treatment in a nitrogen atmosphere to reduce the thickness of the buried oxide layer 5 and the surface silicon single crystal film 4 as shown in FIG. The separately controlled SOI substrate 8a for LSI is formed.

Next, each of the above steps will be described based on specific numerical values. First, the silicon wafer 1 is heated to 800 ° C. or higher in a high vacuum ion implantation chamber for about 30 minutes to remove the oxide layer and impurities on the surface, and then the temperature is lowered to 550 ° C. to accelerate the oxygen ions to an accelerating voltage of 25 KV. At the same time as injecting with a current density of 250 μA, silicon deposition is continued by electron beam deposition at about 2 nm / s for about 1200 seconds. In this case, since the deposition rate of silicon is twice the sputtering rate, the silicon single crystal film 4 on the surface grows. When the simultaneous formation is completed, the structure shown in FIG. 3 is obtained, and the surface silicon single crystal film 4 has a thickness of 70 nm and the amorphous layer 3 has a thickness of 300 nm. Only the single crystal growth of silicon was continued on the sample in this state, and the growth was completed when about 230 nm was deposited (the silicon single crystal growth layer 7 shown in FIG. 4).
After lowering the temperature of this sample to room temperature, it was taken out into the atmosphere and annealed at a high temperature of 1200 ° C. or higher in a nitrogen atmosphere for about 6 hours. As a result, the structure formed is as shown in FIG. 5 in which the single crystal silicon film 4 / buried oxide layer 5 /
The SOI structure was composed of a single crystal silicon wafer 1. The surface silicon single crystal film 4 had a thickness of 300 nm, and the buried oxide layer 5 had a thickness of 300 nm.

Next, a second embodiment of the present invention will be described with reference to FIGS.
I will explain based on. The second embodiment is a method in which implantation of oxygen ions and vapor deposition of silicon atoms are alternately performed, and then high temperature annealing is performed. 6 shows a structure immediately after the first ion implantation, FIG. 7 shows a structure when a single crystal of silicon is grown after the first ion implantation, and FIG. 8 shows a structure when oxygen ion implantation is further performed. Finally, FIG. 9 shows the structure after high temperature annealing. First, the first oxygen ion implantation is performed to form a thin amorphous layer 3 inside the silicon wafer 1. Next, the silicon single crystal film 4 is grown. The film thickness at this time is set to the extent of the film thickness of the silicon single crystal film 4 sputtered by the second oxygen ion implantation described later and the thickness of the amorphous layer 3 formed by the second oxygen ion implantation. After that, the second oxygen ion implantation is performed. As a result, the thickness of the amorphous layer 3 increases as shown in FIG. At this time, due to the sputtering effect, the surface silicon single crystal film 4 of FIG. 8 is shaved and thinned, and its thickness becomes substantially equal to the thickness of the surface silicon single crystal film 4 after the first oxygen ion implantation. By repeating this series of operations, the oxygen ion implantation is stopped when the amorphous layer 3 reaches a predetermined thickness. After that, silicon single crystal growth is continued until the surface silicon single crystal film 4 has a predetermined film thickness. By taking out this sample from the apparatus and applying high-temperature annealing, an LSI substrate 8b having an SOI structure in which the embedded oxide layer 5 as an insulating layer and the surface silicon single crystal film 4 are separately controlled in thickness as shown in FIG. It is formed.

Next, each step of the above-mentioned second embodiment will be explained based on concrete numerical values. First, the silicon wafer 1 is heated to 800 ° C. or higher in a high vacuum ion implantation chamber for about 30 minutes to remove the oxide layer and impurities on the surface, and then the temperature is lowered to 550 ° C. to accelerate the oxygen ions to an accelerating voltage of 25.
Inject 2 × 10 ¹⁷ cells / cm ^{2 with} KV. In the structure formed at that time, as shown in FIG. 6, the thickness of the silicon single crystal film 4 is about 70 nm, and the thickness of the amorphous layer 3 is about 30 nm.
Is. Silicon is added to this by electron beam evaporation method.
A 0 nm single crystal was grown. When oxygen ions were further injected into this sample at an acceleration voltage of 25 KV at 2 × 10 ¹⁷ ions / cm ² ,
As shown in FIG. 8, the thickness of the surface silicon single crystal film 4 is about 7
The thickness of the amorphous layer 3 became 0 nm and became about 60 nm. This operation is repeated, the oxygen ion implantation is repeated 10 times, the silicon single crystal growth is repeated 9 times, and then the silicon single crystal growth is performed to 40 nm. After the temperature of this sample was lowered to room temperature, it was taken out from the ion implantation chamber into the atmosphere and annealed at a high temperature of 1200 ° C. or higher in a nitrogen atmosphere for about 6 hours.
In the resulting SOI structure shown in FIG. 9, the surface silicon single crystal film 4 had a thickness of 100 nm, and the buried oxide layer 5 had a thickness of 30 nm.

The above-mentioned first and second embodiments are characterized in that the high temperature annealing treatment is performed after the ion implantation and the single crystal growth of silicon are completed in the vacuum container. It is possible to remove the defects caused by the repeated annealing treatment and the defects caused by the growth of the silicon single crystal after the high temperature annealing, and the process is simplified as compared with the conventional example. Further, in the first and second embodiments described above, the acceleration voltage of the implanted oxygen ions is 10 to 100.
It is extremely effective to use an acceleration voltage of KV, which is lower than the conventional method. As a result of lowering the implantation energy, the oxygen distribution region becomes narrow and steep, and film thickness control can be performed more precisely than in high voltage acceleration. Further, the minimum thickness of the controllable buried oxide layer 5 and the surface silicon single crystal film 4 is about 10 nm, which is a significant improvement over the conventional method. Further, as a result of narrowing the oxygen distribution region, the amount of oxygen ion implantation required for forming the buried oxide layer 5 can be reduced from about 10 ^{18 of the} conventional method to about 1/10 per 1 cm ^{2 of} the surface. The defects of the crystal film 4 can be reduced.

[0014]

As described above in detail, the LS of the present invention
According to the method for manufacturing the I substrate, the thicknesses of the buried oxide layer having the SOI structure and the surface silicon single crystal film can be controlled arbitrarily and precisely. Further, since the high temperature annealing process is performed collectively at the end, the process can be simplified. Therefore,
By using the method for manufacturing an LSI substrate of the present invention, it becomes possible to easily realize an SOI structure according to the required performance of a target device. For example, if a high breakdown voltage device is required, a thick buried oxide layer is formed. For high speed, a thin surface silicon film is formed. Further, if miniaturization is intended, a thin silicon layer and a thin buried oxide layer will be formed. Furthermore, when the acceleration energy range of the implanted oxygen is set to 10 to 100 KV, the film thickness of the buried oxide layer can be precisely controlled, and the required oxygen ion implantation amount can be significantly reduced. The defects can be reduced. Thus, the LS of the present invention
The manufacturing method of the I substrate can significantly improve the performance, stability, integration, and speed of the LSI.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a first embodiment of the present invention.

FIG. 2 is an explanatory diagram of the first embodiment of the present invention, showing the continuation of FIG.

FIG. 3 is an explanatory diagram of the first embodiment of the present invention, showing the continuation of FIG. 2;

FIG. 4 is an explanatory diagram of the first embodiment of the present invention, showing the continuation of FIG. 3;

FIG. 5 is an explanatory diagram of the first embodiment of the present invention, showing the continuation of FIG. 4;

FIG. 6 is an explanatory diagram of a second embodiment of the present invention.

FIG. 7 is an explanatory diagram of the second embodiment of the present invention, showing the continuation of FIG. 6;

FIG. 8 is an explanatory diagram of the second embodiment of the present invention, showing the continuation of FIG. 7;

FIG. 9 is an explanatory diagram of the second embodiment of the present invention, showing the continuation of FIG. 8;

FIG. 10 is an explanatory diagram of a conventional example.

11 is an explanatory diagram of a conventional example, showing the continuation of FIG.

[Explanation of symbols]

 1 Silicon wafer 3 Amorphous layer 5 Embedded oxide layer 6 Peak position of oxygen ion distribution 6a Peak position of oxygen ion distribution 8a LSI substrate 8b LSI substrate

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Noriyoshi Shibata 2-4-1 Rokuno, Atsuta-ku, Nagoya-shi, Aichi Prefectural Fine Ceramics Center Testing Laboratory

Claims (2)

[Claims] 1. A method of manufacturing an LSI substrate having a buried oxide layer by implanting oxygen ions into a single crystal silicon wafer, the first step of simultaneously or alternately implanting oxygen ions and depositing silicon atoms. When,
And a second step of performing a high temperature annealing treatment after the completion of the first step. 2. The method for manufacturing an LSI substrate according to claim 1, wherein the acceleration energy of the implanted oxygen ions is in the range of 10 to 100 KV.