JPH06291243A - Semiconductor device package, manufacture thereof, and semiconductor device - Google Patents

Abstract

PURPOSE:To easily manufacture a package which is easily enhanced in number of pins, surface-mounted, and lessened in size. CONSTITUTION:Inner leads 2a connected to a semiconductor chip 22 and conductor patterns 20 such as external connecting outer leads are formed on a base board 10 where the semiconductor chip 22 is mounted, the conductor pattern 20 is so gathered together with the base board 10 as to enable the part of the base board 10 where the semiconductor chip 22 is bonded to recede from the peripheral part of the base board 10 where the outer lead is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device package, a method of manufacturing the same, and a semiconductor device.

[0002]

2. Description of the Related Art FIG. 6 shows a resin-sealed type semiconductor device having the most basic structure, in which a semiconductor chip 4 is mounted on a stage 3 of a lead frame 2 and resin-sealed with a molding resin 5. This resin-encapsulated semiconductor device is not suitable for mounting a semiconductor chip that has a low heat dissipation and a large amount of heat generation. Therefore, a metal core type semiconductor device as shown in FIG. 7 has been studied as a package excellent in heat dissipation. In this metal core type semiconductor device, a metal substrate 6 is used for the package body, and a conductor pattern 7 is formed on one or both sides of the metal substrate 6 so as to be electrically insulated from the metal substrate 6.

In the metal core type semiconductor device, the metal substrate 6 on which the semiconductor chip 4 is mounted is counterbored to reduce the thickness of the package, and the dam portion 8 is formed in a frame shape to prevent the mold resin from flowing. I am pasting it. Since the dam portion 8 protrudes from the surface of the substrate, surface mounting using bumps cannot be performed in this type of package, and lead pins 9 are mounted as shown in the figure. When the conductor pattern 7 is formed in multiple layers, conductor patterns are provided on both surfaces of the metal substrate 6 via insulating layers, and the conductor pattern and the lead pin 9 are connected using vias or the like.

[0004]

As described above, in the conventional metal core type semiconductor device, it is necessary to perform the spot facing process on the metal substrate 6, and the operation for connecting the conductor pattern 7 and the lead pin 9 is complicated. However, there is a problem in that surface mounting cannot be performed by using the lead pin 9. Further, in a general resin-sealed type semiconductor device as shown in FIG. 6, the thickness of the mold resin differs depending on the thickness of the semiconductor chip 4 on the side on which the semiconductor chip is mounted and on the opposite side, and the difference in the thickness of the resin causes There was a problem that the package warped.

The present invention has been made to solve the problems in such a metal core type semiconductor device or a resin-sealed type semiconductor device, and its object is to make the package thin and compact. It is intended to provide a lead frame, a method of manufacturing the same, and a semiconductor device, which can be formed on a substrate, can be surface-mounted, can save space on a mounting substrate, and can be easily manufactured. .

[0006]

The present invention has the following constitution in order to achieve the above object. That is, as a semiconductor device package, conductor patterns such as inner leads connected to the semiconductor chip and outer leads for external connection are formed on a base substrate on which a semiconductor chip is mounted, and the conductor pattern is integrated with the base substrate. It is drawn, and a joint portion of the semiconductor chip is formed indented with respect to the peripheral portion of the base substrate on which the outer lead is provided, and the semiconductor chip is connected to the semiconductor chip on the base substrate. A conductor pattern such as an inner lead and an outer lead for external connection is formed, the conductor pattern is integrally drawn together with the base substrate, and a semiconductor chip is formed on a peripheral portion of the base substrate on which the outer lead is provided. The joint part of the The supporting lead frame formed by the above is joined, and the peripheral portion of the base substrate is formed on a flat surface with a predetermined width, and the outer leads extending on the flat surface have bumps for surface mounting. It is characterized by being formed. In addition, the base substrate is a metal plate, and a conductor pattern is provided on an electrically insulating layer provided on the metal plate, and the base substrate is an electrically insulating substrate, A conductive pattern is formed on the insulating substrate.

Further, as a method of manufacturing a semiconductor device package, an insulating coating having an electrical insulating property is provided on a metal plate as a base substrate, a conductor layer is formed on the insulating coating, and then the conductor layer is etched. A conductor pattern such as an inner lead for connecting to a semiconductor chip and an outer lead for external connection is formed, and the outer lead is provided by integrally drawing the metal plate, the insulating coating and the conductor pattern. It is characterized in that the bonding portion of the semiconductor chip is formed in a recess with respect to the peripheral portion of the base substrate. In addition, a long metal plate is used, the metal plate is processed to form metal plates to be a base substrate at predetermined intervals, and an insulating coating and a conductor layer are provided on the metal plate for production. It is characterized by

Further, as a semiconductor device, a semiconductor chip is mounted on the semiconductor device package, the semiconductor chip and an inner lead are electrically connected, and the semiconductor chip is sealed. A semiconductor chip is mounted on a semiconductor device package, the semiconductor chip and an inner lead are electrically connected, and a recessed portion of a base substrate is filled with a sealing resin to seal the semiconductor chip. .

[0009]

The semiconductor device package according to the present invention can be provided as a compact semiconductor device because the base substrate and the conductor pattern are integrally drawn, and the mounting portion of the semiconductor chip is recessed. In the case where bumps for external connection are formed, surface mounting is possible and space can be saved. In the case where the base substrate is joined to the supporting lead frame, the resin thickness can be made uniform on the side opposite to the side on which the semiconductor chip is mounted and the resin can be sealed, and the warp of the semiconductor device can be prevented. The semiconductor device package can be easily manufactured by forming the conductor pattern on the base substrate and then integrally drawing the base substrate and the conductor pattern. Efficient manufacturing is possible by using a long metal plate for processing the base substrate.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described in detail below with reference to the accompanying drawings. Unlike the conventional semiconductor device package, the semiconductor device package according to the present invention is provided with a mounting portion for a semiconductor chip on a base substrate that finally becomes the main body of the package, and simultaneously connects with the semiconductor chip on the base substrate. It is characterized in that a conductor pattern such as an inner lead is provided. 1 (a), (b),
(c) is an explanatory view showing a method for manufacturing a semiconductor device package using a metal plate as a base substrate.

When manufacturing a package for a semiconductor device, first, as shown in FIG. 1 (a), a long metal plate material is press-pressed or etched to form a base substrate 1.
0s are continuously arranged at a constant pitch. In the embodiment, the base substrate 10
Is connected and supported by the support bars 14 and 14 to the rail portions 12 and 12 on the side edges of the thin plate material as shown in the figure, but adjacent base substrates 10 may be connected by the support bars.
A section bar may be provided at the boundary between adjacent base substrates 10 to support the base substrate 10 with the section bar.

The semiconductor device package having the base substrate 10 can be formed by continuously processing a long metal plate as shown in FIG. 1 (a). Since the metal plate material forming the base substrate 10 is squeezed in a later step, a material and a thickness suitable for the squeezing are selected. Further, since the base substrate 10 also affects the heat dissipation property as a base of the package, the metal plate material is appropriately selected by considering these conditions. As the metal plate material, for example, copper, aluminum or the like is preferably used.

After forming the base substrate 10 as described above, an insulating film 16 having an electrically insulating property is attached to the surface of the base substrate 10 to form an insulating coating. Figure 1
(a) is a state in which the insulating film 16 is attached to the base substrate 10. The insulating film 16 may be individually attached to the base substrate 10 as in the embodiment, or the strip-shaped insulating film 16 may be continuously attached before processing the metal plate material. Further, instead of the insulating film, an insulating material having an electrically insulating property may be coated to form the insulating film.

After the insulating film 16 is attached, a copper foil 18 is attached as a conductor layer on the upper surface of the insulating film 16. FIG. 2 is a sectional view showing a state in which the copper foil 18 is attached. After sticking the copper foil 18,
A resist 19 is applied on the copper foil 18, a resist is patterned, and the copper foil 18 is etched to form a conductor pattern 20.
To form. FIG. 1B shows a state in which the conductor pattern 20 is thus formed on the base substrate 10. A space for mounting a semiconductor chip is provided in the central portion, an inner lead connected to the semiconductor chip as a conductor pattern 20 is provided around the space, and an outer lead for external connection is provided outside the inner lead. Instead of attaching the copper foil to form the conductor pattern 20, the conductor layer may be formed by a sputtering method. In addition, in order to simplify the operation of attaching the copper foil, an insulating film having a copper foil provided in advance on the surface layer may be used and attached, and the conductor pattern may be formed by the same method as described above. .

Next, the base substrate 10 is subjected to a drawing process so that the central portion on which the semiconductor chip is mounted is made more concave than the peripheral portion. FIG. 1 (c) shows a state in which the base substrate 10 is drawn. In the embodiment, the leading end of the inner lead and two intermediate positions from the inner lead to the bump forming portion for connecting the external wiring are drawn. 10a, 1
0b is a bending step formed by drawing. In this drawing process, the insulating film 16 and the conductor pattern 20 are integrally drawn together with the base substrate 10 to form a step shape. Therefore, it is necessary to prevent the insulating film 16 from cracking and the conductor pattern 20 from breaking during the drawing process.

As a method for improving the workability of the insulating film 16, a method of heating the insulating film 16 during drawing to make it easier to process, or a method before the insulating film 16 is completely cured is used. It is conceivable to use a material having flexibility and good workability. Regarding the workability of the conductor pattern 20, the material and material thickness may be selected in consideration of the extensibility of the material. In addition, the amount of dents actually formed by drawing is about 1 mm. Therefore, 2
When performing step drawing, draw 0.5 mm each.

FIG. 3 is a sectional view of a semiconductor device in which the semiconductor chip 22 is mounted on the semiconductor device package formed by the above method. Insulating film 1 on base substrate 10
6 and the conductor pattern 20 are layered, and bending step portions are formed in 10a and 10b by drawing. The inner lead 20a of the conductor pattern 20 is formed continuously on the flat portion and the step portion on the step formed by the drawing process, and the bump 24 of the conductor pattern 20 is pulled out to the flat surface at the outer peripheral edge portion of the base substrate 10. It is formed on the edge. The bumps 24 are formed on the bump forming portions of the conductor pattern 20 in a convex shape with solder or gold.

The semiconductor chip 22 is bonded to the inner bottom surface of the base substrate 10 and is connected to the inner leads 20a by wire bonding. 26 is a sealing resin 26 for sealing the semiconductor chip 22. The sealing resin 26 is filled in the recess of the base substrate 10 and seals the semiconductor chip 22. Instead of filling the sealing resin 26, the recess may be covered in the base substrate 10 and a cap may be joined to the opening side for cap sealing.

The semiconductor device of the embodiment shown in FIG. 3 can be surface-mounted by providing the bumps 24 on the lower surface of the peripheral portion of the base substrate 10 as described above. The insulating film 16 is provided from the inner lead 20a to the bump 24.
Since the conductor pattern 20 is formed on the surface of and is extracted, the conductor pattern 20 is exposed on the surface where the bumps 24 are formed. In the embodiment, the conductor pattern 20 on the surface on which the bumps 24 are formed
The protective film covering the conductor pattern 20 is formed by removing the bumps 24 so as not to come into contact with the mounting substrate.
In addition, although the outer surface side of the base substrate 10 is exposed as it is in the embodiment, an insulating resin layer may be provided on the outer surface of the base substrate 10 for protection in order to prevent oxidation of the base substrate 10 or handleability during mounting.

In manufacturing a semiconductor device as shown in FIG. 3, a plurality of base substrates 20 can be handled in a row as shown in FIG. 1 (c). That is, the semiconductor chips 22 are sequentially mounted on each base substrate 20,
A semiconductor device can be continuously manufactured by sequentially performing an operation of wire bonding the semiconductor chip 22 and the inner lead 20a and an operation of filling the sealing resin 26. Of course, an operation such as mounting the semiconductor chip 22 on the base substrate 10 separated from the metal plate material into a single body may be performed.

The semiconductor device package according to the present invention comprises:
As described above, it is basically based on the structure in which the conductor pattern 20 is formed on the base substrate 10 via the electrically insulating layer, but the manufacturing method thereof is not limited to the above-mentioned method, and its form is not limited thereto. Is not limited to the above embodiment. For example, in the above-described method for manufacturing a semiconductor device package, the base substrate 10 is first formed by press punching or the like on the metal plate material forming the base substrate 10. However, the insulating film 16 is adhered to the metal plate material to form a conductor. After forming the pattern 20, the base substrate 10 may be formed by press punching or the like. Further, although the insulating film 16 is provided on only one surface of the base substrate 10 in the above-described embodiment, an insulator may be provided on both surfaces of the base substrate 10. Further, in processing, as described above, it is possible not to process the long body but to process the individual body.

Further, in the above-mentioned embodiment, the metal is used as the base substrate, but it is also possible to use an insulating substrate having electric insulation such as synthetic resin. In this case, after forming a conductor layer on the surface of the insulating substrate, the conductor layer is etched to form a conductor pattern, and the insulating substrate is formed by drawing. When an insulating substrate is used, a synthetic resin material that can be drawn is used, or even when a synthetic resin base substrate is used by processing at a relatively high temperature using a thermoplastic material, it is shown in FIG. You can get such products. When a synthetic resin material is used, there is an advantage that the conductor pattern can be directly formed on the base substrate.

In the semiconductor device of the above-described embodiment, the bumps 24 are formed by providing the flat portion on the peripheral portion of the base substrate 10. However, as shown in FIG. 4, the outer leads 20b extended from the inner leads 20a are used as the base. The outer lead 20b may be extended outward from the peripheral edge of the substrate 10 and connected to the mounting substrate. In this case, the connecting portion of the outer lead 20b is thickly plated to form the outer lead 2
The strength of 0b may be increased to allow bending.
When the outer leads 20b are extended from the peripheral portion of the base substrate 10, for example, in the embodiment shown in FIG. 1, the insulating film 16 is attached to the entire long metal plate material including the space between the adjacent base substrates 10. Then, the conductor pattern may be formed.

As for the form of the base substrate 10, as shown in FIG. 4, a heat radiating body 28 is formed as a separate body by forming a through hole in a portion of the base substrate 10 where the semiconductor chip 22 is mounted.
The semiconductor chip 22 may be mounted on the heat radiator 28 by bonding to the base substrate 10. In this case, it is possible to reduce the number of drawing steps, and the base substrate 10
Even if a synthetic resin base plate is used instead, a semiconductor device package with good heat dissipation can be obtained.

The semiconductor device according to the present invention is characterized by being formed by drawing the base substrate together with the conductor pattern as described above. This drawing process allows the semiconductor chip 22 to be housed in the package. In addition, the height position of the inner lead 20a is adjusted so that the semiconductor chip 22 and the inner lead 20a of the conductor pattern can be reliably connected. Therefore, the number of stages of drawing and the portion to be processed are set as appropriate according to the product. Although the semiconductor chip 22 and the inner lead 20a are connected to each other by wire bonding in the above-mentioned embodiment, the height T of the inner lead 20a and the semiconductor chip 22 is adjusted so that the T
A connection method by collective bonding using an AB tape is also possible.

According to the method of forming a package for a semiconductor device by drawing as in this embodiment, it is possible to reduce the overall thickness of the package to make it compact and to form a base substrate by spot-working. Compared with other products, it is easier to process, the strength of the package can be increased by drawing even when a thin plate material is used for the base substrate, and it can be provided as a package with excellent heat dissipation characteristics by heat dissipation from the base substrate. The pattern has an advantage that it can be formed in an arbitrary pattern on the base substrate.

Further, when forming the conductor pattern, the back surface potential of the semiconductor chip 22 can be obtained by providing the conductor layer on the portion where the semiconductor chip 22 is mounted, and only the insulating film 16 can be provided without providing the conductor layer. In this case, the bondability of the semiconductor chip 22 to the substrate can be improved. Further, when the semiconductor chip 22 is directly bonded to the base substrate 20 without providing the conductor layer and the insulating film 16 at the bonding portion of the semiconductor chip 22, heat dissipation can be improved.

The embodiment shown in FIGS. 3 and 4 is a base substrate 10.
It is an example in which is configured as a casing of a semiconductor device,
As shown in FIG. 5, the base substrate obtained by providing the conductor pattern 20 on the base substrate 10 and drawing the same can be used for a conventional resin-sealed semiconductor device. That is, in this embodiment, the base substrate 10 provided with the conductor pattern 20 on the base substrate 10 and drawn is connected to a supporting lead frame 30 formed separately to form a semiconductor device package, and the semiconductor chip 22 is mounted. After that, the whole is resin-molded and sealed.

In this example, the conductor pattern 20 is formed on the base substrate 10 and then drawn to form the mounting portion of the semiconductor chip 22 in a slightly concave shape. Further, in order to connect the conductor pattern 20 to the supporting lead frame 30, the peripheral portion of the base substrate 10 is extended outward in a flat shape, and the outer lead 20b connected to the supporting lead frame 30 is patterned to form the outer lead 20b. And the supporting lead frame 30 are connected. The outer leads 20b and the supporting lead frame 30 can be connected by joining by thermocompression bonding of gold-gold, gold-tin, gold-silver or the like.

As in the present embodiment, the base substrate is connected to the supporting lead frame 30 so that the resin portion on the side opposite to the thickness of the resin portion on which the semiconductor chip 22 is mounted when resin-molded is formed. The thickness of the semiconductor device can be made uniform to prevent the semiconductor device from warping after the resin molding, and the reliability of the semiconductor device can be improved.

[0031]

According to the semiconductor device package and the semiconductor device of the present invention, the package can be made thin and compact as described above. Further, by providing bumps for external connection, surface mounting becomes possible and space saving can be achieved. Further, since the conductor pattern is formed on the base substrate, it is possible to form the conductor pattern with high density and easily cope with the increase in the number of pins. In addition, the heat dissipation of the package can be improved by using the metal base substrate. Further, according to the method for manufacturing a semiconductor device package of the present invention, since the base substrate is drawn, the manufacturing of the semiconductor device package is facilitated, and the long metal plate is used for efficient manufacturing. It has a remarkable effect such as being possible.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a method for manufacturing a semiconductor device package.

FIG. 2 is an explanatory diagram showing a method of forming a conductor pattern on a base substrate.

FIG. 3 is a cross-sectional view showing the configuration of an example of a semiconductor device.

FIG. 4 is a cross-sectional view showing the configuration of another embodiment of the semiconductor device.

FIG. 5 is a cross-sectional view showing the configuration of still another embodiment of the semiconductor device.

FIG. 6 is a cross-sectional view showing a configuration of a conventional example of a semiconductor device.

FIG. 7 is a cross-sectional view showing a configuration of a conventional example of a metal core type semiconductor device.

[Explanation of symbols]

 5 Mold Resin 10 Base Substrate 10a, 10b Bending Step Part 12 Rail Part 14 Support Bar 16 Insulating Film 18 Copper Foil 20 Conductor Pattern 20a Inner Lead 20b Outer Lead 22 Semiconductor Chip 24 Bump 26 Sealing Resin 28 Radiator 30 Supporting Lead Frame

Claims (9)

[Claims] 1. A conductor pattern such as an inner lead connected to the semiconductor chip and an outer lead for external connection is formed on a base substrate on which the semiconductor chip is mounted, and the conductor pattern is integrally drawn together with the base substrate. The semiconductor device package is characterized in that a joint portion of the semiconductor chip is formed in a recess with respect to a peripheral portion of the base substrate on which the outer lead is provided. 2. A conductor pattern such as an inner lead connected to the semiconductor chip and an outer lead for external connection is formed on a base substrate on which a semiconductor chip is mounted, and the conductor pattern is integrally drawn together with the base substrate. A joint portion of the semiconductor chip is recessed in the peripheral portion of the base substrate on which the outer lead is provided, and a supporting lead frame formed separately is joined to the outer lead. Package for semiconductor device. 3. The surface of the base substrate is formed on a flat surface with a predetermined width, and bumps for surface mounting are formed on the outer leads extending on the flat surface.
The semiconductor device package described. 4. The semiconductor device package according to claim 1, wherein the base substrate is a metal plate, and a conductor pattern is provided on an electrically insulating layer provided on the metal plate. 5. The package for a semiconductor device according to claim 1, wherein the base substrate is an insulating substrate having electrical insulation, and a conductor pattern is formed on the insulating substrate. 6. An inner lead for connecting a semiconductor chip by providing an insulating coating having electrical insulation property on a metal plate as a base substrate, forming a conductor layer on the insulating coating, and connecting the conductor layer to a semiconductor chip. A conductor pattern such as an outer lead for external connection is formed, and the metal plate, the insulating coating, and the conductor pattern are integrally drawn, and a semiconductor is formed on the peripheral portion of the base substrate on which the outer lead is provided. A method of manufacturing a package for a semiconductor device, characterized in that a bonding portion of a chip is formed in a recess. 7. An elongated metal plate is used, the metal plate is processed to form metal plates to be base substrates at predetermined intervals, and an insulating coating and a conductor layer are provided on the metal plate. 7. The method for manufacturing a semiconductor device package according to claim 6, wherein the manufacturing method is a semiconductor device package. 8. A semiconductor chip is mounted on the semiconductor device package according to claim 1, the semiconductor chip and an inner lead are electrically connected, and the semiconductor chip is sealed. A semiconductor device characterized by the above. 9. A semiconductor chip is mounted on the semiconductor device package according to claim 1, the semiconductor chip and an inner lead are electrically connected, and a sealing resin is provided in a recess of the base substrate. A semiconductor device comprising a semiconductor chip filled and sealed with a semiconductor chip.