JPH08213545A - Semiconductor device - Google Patents

Abstract

PURPOSE: To mount a second semiconductor chip on a lead frame with a shorter bonding wire by a method wherein the semiconductor chip is connected to the lead frame through the intermediary of a circuit pattern. CONSTITUTION: All the surface of a first semiconductor chip 4 is coated with an insulating film 14 through a screen printing method, and a circuit pattern 8 is formed on the periphery of the chip 4. Then, a second semiconductor chip 7 is mounted on the semiconductor chip 4 through the intermediary of an insulating paste 6. The semiconductor chips 4 and 7 are bonded with a first bonding wire 9b and a second bonding wire 9c respectively and then sealed up with sealing resin 11. The second bonding wire 9c is connected between the edge of the circuit pattern or the bonding pad BP of the semiconductor chip 4 and an inner lead 3. Lastly, a tie bar is cut off, and outer leads 12 are formed. As semiconductor chips are mounted on the one side of a lead frame, a semiconductor device of this constitution is easily sealed up with resin.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a laminated type semiconductor device structure in which another semiconductor chip is laminated on a semiconductor chip.

[0002]

2. Description of the Related Art Generally, a semiconductor device has a semiconductor chip mounted on a die pad (semiconductor chip mounting portion) of a lead frame, and has a bonding pad of the semiconductor chip and an inner lead of a lead frame. It is completed by connecting with a bonding wire or the like, further sealing them with a sealing material such as resin or ceramic, cutting the tie bar or the side bar, and bending the outer lead into a desired shape.

By the way, in recent years, the demand for higher density and thinner semiconductor devices is increasing, and in preparation for this demand,
It has been proposed that semiconductor chips are mounted on both front and back surfaces of a lead frame (for example, Japanese Patent Laid-Open No. 5-121462).
issue). As described above, in the case where the semiconductor chips are mounted on both sides, the number of input / output pins can be increased, but the inner leads of the lead frame to be connected are fine in width and pitch and are easily deformed, which may cause a short circuit. There is. In this semiconductor device, semiconductor chips of the same size are usually mounted on the front surface and the back surface of the die pad.

Further, since the bonding wire is used from both sides of the pad, it is difficult to shorten the bonding wire, and there are problems such as increase in impedance and regulation of high speed signal transmission.

Further, in a semiconductor device having semiconductor chips mounted on both sides of the pad, resin encapsulation must be performed on each side in order to prevent cutting of the bonding wires and damage to the chips, which increases the number of steps and the like. I have a problem.

[0006]

By the way, as the demand for multi-functionalization and multi-use of semiconductor devices increases,
In order to meet this demand, it is necessary to stack semiconductor chips having different degrees of integration and semiconductor chips having different functions. Further, semiconductor chips having different degrees of integration and functions often have different sizes. When semiconductor chips of different sizes are mounted on both sides of the same die pad in this way, the smaller semiconductor chip has a larger distance from the tip of the inner lead, which lengthens the bonding wire, making the bonding operation difficult and making the bonding wire difficult. It causes problems such as short circuit. Furthermore, if the bonding wire becomes long, the signal transfer time becomes long, and there is a problem that high-speed processing is difficult.

Furthermore, as described above, as the degree of integration of semiconductor chips increases, the number of pins increases, and the tips of the inner leads are particularly fine and easily deformed in terms of lead width and lead spacing, resulting in short circuits and poor connection. Is likely to occur, which may cause a decrease in reliability.

The present invention has been made in view of the above circumstances, and the bonding wire can be mounted with a short length, the inner lead can be prevented from being deformed, the number of pins can be increased, and the resin sealing can be easily performed. An object is to provide a semiconductor device structure.

[0009]

Therefore, the first semiconductor device of the present invention is characterized by a semiconductor chip mounting portion, a first semiconductor chip mounted on the semiconductor chip mounting portion, and the first semiconductor chip. A second semiconductor chip laminated on the surface of the first semiconductor chip via an insulating film so as to expose a part of the surface of the semiconductor chip; and a circuit pattern formed on the region via the insulating film. A lead frame having a plurality of inner leads connected to the first semiconductor chip and an outer lead connected to each inner lead, and the second frame The semiconductor chip is connected to the lead frame through the circuit pattern.

Preferably, the semiconductor chip mounting portion is
Consists of a heat sink.

Preferably, the second semiconductor chip is smaller than the first semiconductor chip, and the tip of the circuit pattern extends to the vicinity of the peripheral edge of the second semiconductor chip.

Preferably, the tip of the circuit pattern is formed so as to extend right below the peripheral portion of the second semiconductor chip, and the second semiconductor chip is formed on the element formation surface on the tip of the circuit pattern. Direct connection is performed by face-down so that the side surfaces face each other.

The second semiconductor device of the present invention is characterized in that a lead frame having a plurality of inner leads and an outer lead connected to each inner lead, and the inner frame are provided. Direct bonding face down on the tip of the lead so that the surface on which the element is formed faces.
A first semiconductor chip that is directly connected and has a circuit pattern formed on the peripheral portion on the non-element formation surface side, and the first semiconductor chip so as to expose the circuit pattern of the first semiconductor chip. A second semiconductor chip stacked on the surface on the non-element formation surface side, the second semiconductor chip being connected to the lead frame via the circuit pattern.

Preferably, the tip of the circuit pattern is formed so as to extend right below the peripheral portion of the second semiconductor chip, and the second semiconductor chip is formed on the element formation surface on the tip of the circuit pattern. They are directly connected by face-down direct bonding so that their side surfaces face each other.

[0015]

According to the above structure, the semiconductor chip can be laminated on one side of the lead frame and the bonding wire can be shortened. Therefore, even if the resin sealing is performed at one time, the bonding wire is cut or the chip is broken. Since no damage is caused, resin sealing is easy and mounting workability is high. Further, since the circuit pattern is provided close to the peripheral edge of the second semiconductor chip, there is no possibility that the bonding wire becomes long and a short circuit or connection failure due to sagging occurs.

Further, if the semiconductor chip mounting portion is composed of a heat dissipation plate, heat dissipation is improved. It is also possible to expose the back surface of this heat dissipation plate from the sealing resin to enhance heat dissipation.

Further preferably, the second semiconductor chip is smaller than the first semiconductor chip, and the tip of the circuit pattern is configured to extend to the vicinity of the peripheral edge of the second semiconductor chip. Even if the second semiconductor chip is significantly smaller than the first semiconductor chip, the length of the bonding wire can be minimized.

Preferably, the second semiconductor chip is
Direct connection by face-down direct bonding on the tip of the circuit pattern eliminates the need for wire bonding between the second semiconductor chip and the circuit pattern, further simplifies the mounting process, and prevents resin encapsulation. It will be easy.

According to the second semiconductor device of the present invention,
Since the first semiconductor chip is also connected to the lead frame by the fade-down, the back surface side, that is, the non-element formation surface side is the upper side, and the circuit design is free when the circuit pattern is formed through the insulating film. In particular, since heat and pressure are applied to the position of the bonding pad, it is necessary to consider such as avoiding the element formation region. However, if face down, these restrictions are eliminated and extremely flexible circuit design is possible. It is also possible to form the first semiconductor chip from the front surface side to the lead frame by a method such as forming a deep diffusion layer so as to reach from the front surface side to the back surface side of the first semiconductor chip. . in this case,
If the second semiconductor chip is also mounted face down on the first semiconductor chip by direct bonding, connection without wire bonding can be achieved.

On the other hand, in the structure of the second semiconductor device, the second semiconductor chip is connected through an adhesive having good thermal conductivity so that the non-element forming surface side is on the first semiconductor chip side. In this case, since the first semiconductor chip and the second semiconductor chip are mounted in a state where the back surfaces are in thermal contact with each other, the temperatures of the first and second semiconductor chips are maintained at the same temperature during use. be able to. Therefore, when the temperature characteristics of the first and second semiconductor chips greatly change, both can be maintained at the same temperature, and the characteristics can be made uniform.

[0021]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 shows a sectional view of this semiconductor device, and FIG. 2 shows a top view thereof (state before resin sealing). This semiconductor device includes a lead frame 2 having a die pad 1 supported by a support bar 10 and a plurality of inner leads 3 extending radially outwardly around the die pad 1.
And a first semiconductor chip 4 serving as a memory chip mounted on the surface of the die pad 1 and connected to the first semiconductor chip 4 via an insulating polyimide film 6. A second semiconductor chip 7 as a logic chip smaller than 4;
The first semiconductor chip 4 has a first bonding wire 9c.
The second semiconductor chip 7 is connected to the inner lead 3 via the circuit pattern 8 formed on the peripheral portion of the first semiconductor chip via the insulating film 14 via the bonding wire 9b. The outer end of the pattern 8 is connected to the inner lead 3 via the bonding wire 9c to achieve electrical connection. Further, resin sealing is performed by the sealing resin 11. Here, although the first semiconductor chip 4 is larger than the second semiconductor chip 7 mounted thereon, the circuit pattern 8 extends to the peripheral edge of the second semiconductor chip 7, and the second semiconductor chip 7 is It is formed so as to be closer. Here, the inner lead 3 is connected to the outer lead 12 and is integrally supported by the tie bar 13. The first semiconductor chip has the entire surface covered with the insulating film 14. Note that the circuit pattern 8 is omitted in FIG. 2 for the sake of clarity, and FIG.

Next, a method of manufacturing this semiconductor device will be described.

First, a strip material or the like made of 4-2 alloy is used as a starting material, shape processing is performed by an ordinary press processing method, and then a lead frame is formed through a plating step if necessary.

The first and second semiconductor chips are formed by a usual method. Among them, the first semiconductor chip has an insulating film 14 formed on the entire surface by screen printing as shown in an explanatory view of FIG. And the circuit pattern 8 is formed on the peripheral portion.

Next, the die pad 1 of this lead frame
The first semiconductor chip 4 is mounted on the surface of the via the insulating paste 5.

Subsequently, the second semiconductor chip 7 is mounted on the first semiconductor chip with the insulating paste 6 interposed therebetween.

First and second bonding wires 9
After bonding is performed through b and 9c, the resin 11 for sealing is used for sealing. In this example, the second bonding wire 9c is the edge of the circuit pattern 8 or the first bonding wire 9c.
The bonding pads BP of the semiconductor chip and the inner leads 3 are alternately connected.

Finally, the tie bar 13 is cut off and the outer leads 12 are molded to complete the semiconductor device of the present invention.

According to this semiconductor device, the circuit pattern 8 formed on the surface of the first semiconductor chip 4 via the insulating film 14 extends to the vicinity of the second semiconductor chip 7, and thus the second semiconductor chip 4 is formed. The bonding wire 9b connected to the semiconductor chip 7 becomes short,
Since the chip is not damaged, resin sealing is easy and mounting workability is high. Further, since the semiconductor chips are laminated on one side of the lead frame, resin sealing is easy.

Further, if the semiconductor chip mounting portion is composed of a heat dissipation plate made of alumina ceramic, copper or the like, heat dissipation is further improved. It is also possible to expose the back surface of this heat dissipation plate from the sealing resin to enhance heat dissipation.

As described above, according to the present invention, the semiconductor device can be protected well without being deformed even if the lead width and the lead interval are miniaturized in response to the higher integration of the semiconductor device. Further, the bonding wire can be further shortened, and neither short circuit nor poor connection will occur. In addition, it is possible to provide a highly reliable semiconductor device without being deformed by the weight of the resin even when the resin is sealed.

As a starting material for the lead frame, 4
-Although 2 alloy was used, it goes without saying that other materials such as a copper material may be used, and the molding method is not limited to the pressing method and other methods such as an etching method may be used. .

Although the second semiconductor chip is formed smaller than the first semiconductor chip in the above-described embodiment, the second semiconductor chip located at the same level or at the upper side is the first semiconductor chip located at the lower side. If it is larger than the semiconductor chip, the second semiconductor chip may be placed on the first semiconductor chip with a shift so as to leave the circuit pattern forming region, and the second semiconductor chip may be similarly connected.

Although the second semiconductor chip is connected to the circuit pattern 8 by wire bonding in the first embodiment, as shown in FIG. 4 as the second embodiment of the present invention, the tip of the circuit pattern 8 is formed. Is formed so as to extend directly under the peripheral edge of the second semiconductor chip 7, and the second semiconductor chip 7 is directly face down on the tip of the circuit pattern so that the element formation surface side surface faces it. You may make it connect directly by bonding.

Further, as shown in FIG. 5 as a third embodiment of the present invention, the first semiconductor chip 4 is also directly bonded on the tip of the inner lead 3 so that the surface on the element forming surface faces. Therefore, the connection may be made directly. In this case, the circuit pattern 8 is formed on the back surface of the first semiconductor chip 4, that is, the peripheral portion on the non-element formation surface side via the insulating film 14, and the second semiconductor chip 7 is covered with the insulating paste 6 on the circuit pattern 8. And is connected to the circuit pattern 8 via the bonding wire 9b. Further, the connection between the other end of the circuit pattern 8 and the lead frame is achieved via the bonding wire 9c.

In this structure, the first and second semiconductor chips can be mounted so that their back surfaces are in thermal contact with each other, so that they can be always maintained at the same temperature, and the first and second semiconductor chips can be maintained. It is effective when the thermal characteristics of are different. Here, the insulating film 14 is formed only in the circuit pattern formation region, and the region in which the second semiconductor chip is in contact is in direct contact with the first and second semiconductor chips, and is connected to the ground line and is good. To achieve good thermal contact.

Further, as shown in FIG. 6 as a fourth embodiment of the present invention, the first semiconductor chip 4 is connected face down and the tip of the circuit pattern 8 is connected to the peripheral portion of the second semiconductor chip 7. Formed to extend just below the
The semiconductor chip may be directly connected to the circuit pattern 8 by face-down direct bonding so that the surfaces on the element formation surface face each other. Here, the other end of the circuit pattern 8 and the lead frame are connected via a bonding wire 9c.

Further, in the third embodiment shown in FIG. 5 and the fourth embodiment shown in FIG. 6, the other end of the circuit pattern 8 and the lead frame are connected via the bonding wire 9c. However, a diffusion layer or the like reaching from the circuit pattern 8 side to the first semiconductor chip front surface side is formed,
If the bonding pad connected to the circuit pattern 8 is formed on the front surface side, the bonding wire becomes unnecessary.

In addition to the method of forming the circuit pattern by screen printing, a method of forming by a thin film method or a method of sandwiching a thin film pattern formed on a polyimide film is also applicable.

Further, in the above embodiment, the mounting using the lead frame has been described, but it is also possible to mount using a so-called TAB substrate in which a circuit pattern is formed on an insulating film such as a polyimide film. There is no end.

Further, it is desirable to form bumps on the lead frame side, the circuit pattern side, or the semiconductor chip side where direct bonding is to be performed.

[0043]

As described above, according to the present invention, it is possible to provide a laminated semiconductor device having a large number of pins, high speed, easy mounting, and excellent reliability.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is an explanatory top view of a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a partially enlarged explanatory view of the semiconductor device.

FIG. 4 is a sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.

[Explanation of symbols]

 1 Die Pad 2 Lead Frame 3 Inner Lead 4 First Semiconductor Chip 5 Insulating Adhesive 6 Insulating Adhesive 7 Second Semiconductor Chip 8 Circuit Pattern 9b Bonding Wire 9c Bonding Wire 10 Support Bar 11 Sealing Resin 12 Outer Lead 13 Tie Bar 14 Insulating film

Claims (6)

[Claims] 1. A semiconductor chip mounting portion, a first semiconductor chip mounted on the semiconductor chip mounting portion, and the first semiconductor chip so as to expose a partial region of a surface of the first semiconductor chip. A second semiconductor chip laminated on the surface of the semiconductor chip via an insulating film, a circuit pattern formed on the region via an insulating film, and a plurality of inner layers connected to the first semiconductor chip. -And an outer connected to each inner lead
And a lead frame including a lead, wherein the second semiconductor chip is connected to the lead frame through the circuit pattern. 2. The semiconductor device according to claim 1, wherein the semiconductor chip mounting portion is a heat dissipation plate. 3. The second semiconductor chip is smaller than the first semiconductor chip, and the tip of the circuit pattern is configured to extend to the vicinity of the peripheral edge of the second semiconductor chip. The semiconductor device according to claim 1. 4. The tip of the circuit pattern is formed so as to extend right below the peripheral edge of the second semiconductor chip, and the second semiconductor chip is on the tip of the circuit pattern on the element formation surface side. 2. The semiconductor device according to claim 1, wherein the semiconductor devices are directly connected by face-down direct bonding so that their surfaces face each other. 5. A lead frame provided with a plurality of inner leads and an outer lead connected to each inner lead, and an element forming surface side on the tips of the inner leads. A first semiconductor chip which is directly connected by face-down direct bonding so that the surfaces are opposed to each other, and a circuit pattern is formed on the peripheral portion on the non-element formation surface side; and the circuit pattern of the first semiconductor chip. A second semiconductor chip stacked on the non-element forming surface side surface of the first semiconductor chip so as to expose the second semiconductor chip to the lead frame via the circuit pattern. A semiconductor device which is connected. 6. The tip of the circuit pattern is formed so as to extend to just below the peripheral edge of the second semiconductor chip, and the second semiconductor chip is on the tip of the circuit pattern on the element formation surface side. The semiconductor device according to claim 5, wherein the semiconductor devices are directly connected by face-down direct bonding so that their surfaces face each other.