JPH06291174A - Electrostatic chuck, and method for adhering and holding semiconductor wafer to electrostatic chuck - Google Patents

Electrostatic chuck, and method for adhering and holding semiconductor wafer to electrostatic chuck

Info

Publication number
JPH06291174A
JPH06291174A JP7838193A JP7838193A JPH06291174A JP H06291174 A JPH06291174 A JP H06291174A JP 7838193 A JP7838193 A JP 7838193A JP 7838193 A JP7838193 A JP 7838193A JP H06291174 A JPH06291174 A JP H06291174A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
electrostatic chuck
wafer
power supply
holding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7838193A
Other languages
Japanese (ja)
Inventor
Akio Shimizu
明夫 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP7838193A priority Critical patent/JPH06291174A/en
Publication of JPH06291174A publication Critical patent/JPH06291174A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide a structure of an electrostatic chuck whereby the yield of non-defective can be improved in the case of the etching of the surface of a semiconductor wafer or the processing for forming its film, and to provide a method for adhering and holding semiconductor wafer to electrostatic chuck using the structure. CONSTITUTION:A power supply 4 of an electrostatic chuck 1 whereby an electrostatic force is applied to a semiconductor wafer 5 via an insulator 2 is formed as a variable voltage power supply. When the semiconductor wafer 5 is attracted by the electrostatic chuck 1, the voltage of the power supply 4 is lowered, and the number of particles which are stuck on the semiconductor wafer 5 from the surroundings thereof is reduced. When the semiconductor wafer 5 is processed after chucked, the voltage of the power supply 4 is increased to enhance the cooling of the electrostatic chuck 1 to be improved and the processing of the semiconductor wafer 4 which is performed at a suitable temperature is made easy.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、半導体集積回路、特
にLSI等の微細加工によるDRAMの製造装置に用い
られる静電チャックの構成ならびにその構成による静電
チャックに半導体ウエハを吸着,保持させる方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of an electrostatic chuck used in a manufacturing apparatus of a semiconductor integrated circuit, particularly a DRAM by fine processing of LSI and the like, and a method of adsorbing and holding a semiconductor wafer on the electrostatic chuck having the structure. Regarding

【0002】[0002]

【従来の技術】周知のように、半導体製造装置に用いら
れる静電チャックは、半導体ウエハに絶縁体を介して静
電気力を作用させることにより絶縁体表面に半導体ウエ
ハを吸着し、これを半導体ウエハ処理面への薄膜形成あ
るいは食刻等の表面処理のために高温ガスあるいはプラ
ズマ化されたガス中に保持するものである。その構造
は、通常、Al2 3 等の耐熱セラミックスからなる円
板状絶縁体中の表面近くに同一平面内に並べて埋め込ま
れた2枚もしくは2組の箔状あるいは膜状電極をそれぞ
れ直流電源の両極に接続してなるもので、この2枚もし
くは2組の電極間に直流電圧を印加するとともに絶縁体
表面に絶縁体に近い直径を有する半導体ウエハを密着状
態に当接させることにより、2枚もしくは2組の電極と
半導体ウエハとの間に静電気力を作用させ、半導体ウエ
ハを絶縁体表面に吸着してウエハが離脱しないように吸
着状態に保持する。
2. Description of the Related Art As is well known, in an electrostatic chuck used in a semiconductor manufacturing apparatus, an electrostatic force is applied to a semiconductor wafer via an insulator so that the semiconductor wafer is attracted to the surface of the insulator. It is held in a high-temperature gas or a gas that has been turned into plasma for surface treatment such as thin film formation or etching on the treated surface. The structure is usually two or two sets of foil-shaped or film-shaped electrodes embedded side by side in the same plane in the disk-shaped insulator made of heat-resistant ceramics such as Al 2 O 3 for DC power supply. By applying a DC voltage between the two electrodes or two sets of electrodes and bringing a semiconductor wafer having a diameter close to that of the insulator into close contact with the surface of the insulator. An electrostatic force is applied between one or two sets of electrodes and the semiconductor wafer to hold the semiconductor wafer in an attracted state so that the semiconductor wafer is attracted to the surface of the insulator and the wafer is not separated.

【0003】また、このように構成される静電チャック
は、半導体ウエハを絶縁体表面に全面密着状態に吸着,
保持することから、0.1mTorr〜数Torr範囲
の真空圧中での表面処理中、ウエハを適温に保つための
冷却手段として用いられ、このために、静電チャック
を、熱媒体の通流可能に形成された静電チャックホール
ダの伝熱面に固定して使用している。
In addition, the electrostatic chuck constructed in this manner attracts the semiconductor wafer to the surface of the insulator in a state of being in close contact with the entire surface of the insulator.
Since it is held, it is used as a cooling means for keeping the wafer at an appropriate temperature during the surface treatment in the vacuum pressure range of 0.1 mTorr to several Torr. Therefore, the electrostatic chuck can flow the heat medium. It is used by fixing it to the heat transfer surface of the electrostatic chuck holder formed on.

【0004】[0004]

【発明が解決しようとする課題】従来、この種の静電チ
ャックを半導体ウエハを装着もしくは載置する半導体基
板台としてその冷却作用を利用するには、冷却が真空圧
中で行われ、真空状態のガスのもつ熱伝達作用が極めて
小さいために、表面が微視的に凹凸状態を呈する静電チ
ャック絶縁体表面と半導体ウエハとの実接触面積の増加
による伝熱面積の増加を図る必要から、接触圧力が10
g/cm2 程度以上となる吸着電圧が必要であった。
Conventionally, in order to utilize the cooling action of this type of electrostatic chuck as a semiconductor substrate table on which a semiconductor wafer is mounted or mounted, cooling is performed in a vacuum pressure and a vacuum state is applied. Since the heat transfer effect of the gas is extremely small, it is necessary to increase the heat transfer area by increasing the actual contact area between the electrostatic chuck insulator surface whose surface is microscopically uneven and the semiconductor wafer. Contact pressure is 10
An adsorption voltage of about g / cm 2 or more was required.

【0005】しかしながら、ウエハを吸着する際に、こ
のような高電圧を絶縁体中の電極間に印加すると、ウエ
ハの吸着時に同時にウエハ処理面に多数のパーティクル
を吸着することがしばしばあった。パーティクルがウエ
ハ処理面に付着すると、以下の問題が生じた。 (1)ウエハ表面の処理がエッチング処理の場合:レジ
スト以外の部位にパーティクルが付着した場合、パーテ
ィクルとウエハとの接触点まわりのエッチング速度がお
そくなり、この部分のエッチングを所定通りに行おうと
するとほかの部分のエッチングが過剰となってエッチン
グに不均一が生じ、オーバエッチ部の増加による歩留り
率の低下として問題となる。
However, when such a high voltage is applied between the electrodes in the insulator when the wafer is attracted, many particles are often attracted to the wafer processing surface at the same time when the wafer is attracted. When particles adhere to the wafer processing surface, the following problems occur. (1) When the wafer surface is treated by etching: When particles adhere to a portion other than the resist, the etching rate around the contact point between the particles and the wafer becomes slower, and when this portion is etched, the etching is performed in a predetermined manner. Etching of other portions becomes excessive, resulting in non-uniform etching, which causes a problem that the yield rate decreases due to an increase in over-etched portions.

【0006】(2)ウエハ表面の処理がCVDによる成
膜処理の場合:処理後にパーティクル部が大きな突起と
なったり、パーティクル部が一様に成膜されないために
部分的に欠陥が生じ、良品の歩留り率が低下する。 この発明の目的は、静電チャックの絶縁体表面に半導体
ウエハを吸着する際にウエハ処理面へのパーティクル付
着数が少なくなり、これにより良品の歩留り率を向上さ
せることができる静電チャックの構成と、この構成によ
る静電チャックによる半導体ウエハの吸着,保持方法と
を提供することである。
(2) When the wafer surface treatment is a film formation process by CVD: After the treatment, the particle portion becomes a large protrusion, or the particle portion is not uniformly formed, so that a defect partially occurs, and thus it is a non-defective product. The yield rate decreases. An object of the present invention is to reduce the number of particles adhering to a wafer processing surface when a semiconductor wafer is attracted to an insulator surface of an electrostatic chuck, thereby improving the yield rate of non-defective products. And a method for attracting and holding a semiconductor wafer by an electrostatic chuck having this configuration.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
に、本発明においては、絶縁体表面に半導体ウエハを吸
着,保持させる静電気力を発生する静電チャックの電源
を可変電圧電源として構成する。そして、可変電圧電源
を備えた静電チャックによる半導体ウエハの吸着,保持
は、半導体ウエハを吸着させるための電源電圧と、吸着
された半導体ウエハを処理工程中吸着状態に保持するた
めの電源電圧とを異ならせ、吸着時の電源電圧を低く、
処理工程中の電源電圧を高くして行うものとする。
In order to solve the above problems, in the present invention, the power source of the electrostatic chuck for generating an electrostatic force for attracting and holding the semiconductor wafer on the surface of the insulator is constituted as a variable voltage power source. . Then, the attraction and holding of the semiconductor wafer by the electrostatic chuck provided with the variable voltage power source is performed by using the power source voltage for attracting the semiconductor wafer and the power source voltage for holding the attracted semiconductor wafer in the attraction state during the processing step. To lower the power supply voltage during adsorption,
It is assumed that the power supply voltage during the treatment process is increased.

【0008】そして、半導体ウエハの吸着時の電源電圧
から処理工程中吸着状態に保持するための電源電圧への
電圧上昇は、半導体ウエハがウエハ搬送手段により静電
チャックの絶縁体表面にもたらされる場合には、半導体
ウエハの吸着後、ウエハ搬送手段が実質的に静電チャッ
ク電源による静電気力が及ばない位置まで移動してから
行うようにするのがよい。
When the semiconductor wafer is brought to the insulator surface of the electrostatic chuck by the wafer transfer means, the voltage rise from the power supply voltage at the time of attracting the semiconductor wafer to the power supply voltage for holding the semiconductor wafer in the attraction state during the processing step. For this purpose, it is preferable that after the semiconductor wafer is adsorbed, the wafer transfer means is moved to a position where the electrostatic force by the electrostatic chuck power supply is substantially not applied.

【0009】また、半導体ウエハを静電チャックの絶縁
体表面にもたらすウエハ搬送手段が、ウエハの処理面を
鉛直下方へ向けて搬送するとともにウエハ処理面を鉛直
下方へ向けたまま静電チャックの絶縁体表面に吸着,保
持させる搬送手段である場合には、半導体ウエハ吸着後
の電源電圧の上昇を、ウエハ搬送手段が半導体ウエハの
面積範囲の直下に存在しなくなってから行うようにする
とよい。
Further, the wafer transfer means for bringing the semiconductor wafer to the surface of the insulator of the electrostatic chuck transfers the wafer processing surface vertically downward and insulates the electrostatic chuck while keeping the wafer processing surface vertically downward. In the case of the transfer means for adsorbing and holding onto the body surface, it is preferable to raise the power supply voltage after the semiconductor wafer is adsorbed after the wafer transfer means is no longer directly below the area range of the semiconductor wafer.

【0010】[0010]

【作用】このように、静電チャックの電源を可変電圧電
源として構成すると、半導体ウエハを静電チャックの絶
縁体表面に吸着させる際の電圧と、半導体ウエハの処理
時にウエハを吸着状態に保持する電圧と、等、各段階ご
との目的を最も効果的に達成させることのできる電圧を
容易に得ることができる。
When the electrostatic chuck power supply is configured as a variable voltage power supply as described above, the voltage for adsorbing the semiconductor wafer on the insulator surface of the electrostatic chuck and the adsorption state of the semiconductor wafer during the processing are held. It is possible to easily obtain a voltage that can most effectively achieve the purpose of each step, such as the voltage.

【0011】そこで、可変電圧電源を備えた静電チャッ
クに半導体ウエハを吸着,保持させる方法として、吸着
時には電源電圧も低くし、具体的にはウエハの自重が1
g/cm2 であることから、吸着に必要,十分な電圧と
して例えば600Vとすることにより、電源に接続され
た静電チャックの一方もしくは一方の組の電極から出て
半導体ウエハ中を通る電気力線のウエハ外部への洩れ量
が少なくなり、ウエハまわりからウエハ処理面へ吸引さ
れるパーティクルの数が少なくなる。
Therefore, as a method of adsorbing and holding a semiconductor wafer on an electrostatic chuck equipped with a variable voltage power supply, the power supply voltage is lowered at the time of adsorption, and more specifically, the weight of the wafer is 1 or less.
Since it is g / cm 2 , the voltage necessary and sufficient for adsorption is set to, for example, 600 V, so that the electric force that passes through the semiconductor wafer from the electrode of one or the other set of the electrostatic chuck connected to the power source is passed. The amount of lines leaking to the outside of the wafer is reduced, and the number of particles sucked from around the wafer to the wafer processing surface is reduced.

【0012】一方、半導体ウエハを吸着後、静電チャッ
クの絶縁体を伝熱媒体として利用する際には電源電圧を
高くし、具体的には、半導体ウエハから絶縁体への熱流
抵抗を効果的に低減させるには半導体ウエハと絶縁体表
面との接触圧力として10g/cm2 程度が必要なこと
から、電源電圧を例えば1000〜1500Vとするこ
とにより、半導体ウエハを効果的に冷却して適温に保つ
ことが容易に可能になる。
On the other hand, when the insulator of the electrostatic chuck is used as a heat transfer medium after the semiconductor wafer is attracted, the power supply voltage is increased, and specifically, the heat flow resistance from the semiconductor wafer to the insulator is effective. Since the contact pressure between the semiconductor wafer and the insulator surface needs to be about 10 g / cm 2 in order to reduce the power consumption to a low level, the power supply voltage is set to, for example, 1000 to 1500 V to effectively cool the semiconductor wafer to an appropriate temperature. Easy to keep.

【0013】静電チャックのウエハ冷却手段としての利
用は、半導体ウエハが処理工程に入る直前まで、例えば
10秒程度前まで保留しても十分な冷却作用を得ること
ができるから、半導体ウエハがウエハ搬送手段により静
電チャックの絶縁体表面にもたらされる場合には、ウエ
ハ搬送手段が実質的に静電チャックの電源による静電気
力が及ばない位置まで移動してから電源電圧を上昇させ
るようにすれば、半導体ウエハに入り切れない量の電気
力線が生じても、ウエハ近傍にはもはやパーティクルを
有する搬送手段が存在しないので、ウエハに付着するパ
ーティクルは低電圧による吸着時に吸引された数のみと
なり、パーティクル付着による良品の歩留り低減の問題
が生じなくて済む。
When the electrostatic chuck is used as a wafer cooling means, a sufficient cooling action can be obtained even if the semiconductor wafer is held until just before entering the processing step, for example, about 10 seconds before. In the case where it is brought to the insulator surface of the electrostatic chuck by the transfer means, it is necessary to raise the power supply voltage after the wafer transfer means is moved to a position where the electrostatic force by the power supply of the electrostatic chuck does not substantially reach. , Even if an electric line of force that cannot fit into the semiconductor wafer occurs, since there is no transfer means having particles in the vicinity of the wafer, the number of particles adhering to the wafer is only the number attracted at the time of adsorption by the low voltage, The problem of yield reduction of non-defective products due to particle adhesion does not occur.

【0014】また、半導体ウエハを静電チャックの絶縁
体表面にもたらすウエハ搬送手段が、ウエハの処理面を
鉛直下方へ向けて搬送するとともにウエハ処理面を鉛直
下方へ向けたまま静電チャックの絶縁体表面に吸着,保
持させる搬送手段である場合には、半導体ウエハ吸着後
の電源電圧の上昇を、ウエハ搬送手段が半導体ウエハの
面積範囲の直下に存在しなくなってから行うようにすれ
ば、電源電圧の上昇により半導体ウエハに入り切れず、
半導体ウエハの面を貫通して半導体ウエハの下面側を通
る電気力線に捕捉されるパーティクルは存在せず、ま
た、半導体ウエハを貫通しない,半導体ウエハの面積外
を通過する電気力線に捕捉されたパーティクルは重力に
抗しつつ電気力線に沿って吸い上げられるので、ウエハ
処理面には到達しない。従って、ウエハ搬送手段をウエ
ハ処理に先立ってその都度最大限に移動させることなく
電源電圧上昇が可能となり、半導体製造装置運転操作の
自由度が向上する。
Further, the wafer transfer means for bringing the semiconductor wafer to the insulator surface of the electrostatic chuck transfers the wafer processing surface vertically downward and insulates the electrostatic chuck with the wafer processing surface vertically downward. In the case of a transfer means for adsorbing to and holding on the body surface, if the power supply voltage is raised after the semiconductor wafer is adsorbed after the wafer transfer means does not exist immediately below the area range of the semiconductor wafer, the power supply is increased. Due to the increase in voltage, the semiconductor wafer cannot be completely filled,
There are no particles that are captured by the lines of electric force that pass through the surface of the semiconductor wafer and pass through the lower surface of the semiconductor wafer, and there are no particles that pass through the surface of the semiconductor wafer and that are captured by lines of electric force that pass outside the area of the semiconductor wafer. Since the particles are sucked up along the lines of electric force while resisting gravity, they do not reach the wafer processing surface. Therefore, the power supply voltage can be increased without moving the wafer transfer means to the maximum extent each time prior to the wafer processing, and the degree of freedom in operating the semiconductor manufacturing apparatus is improved.

【0015】[0015]

【実施例】本発明の一実施例を図1に示す。この実施例
では、静電チャック1は、Al23 からなる円板状の
絶縁体2と、絶縁体2中に同一平面内に並んで埋め込ま
れた箔状の平面電極3A,3Bとからなる本体と、電極
3A、3Bがそれぞれ両極に接続される直流電源4とか
らなる。直流電源4は、ここには図示しないが、1次側
が低圧交流電源に接続される変圧器と、この変圧器2次
側の交流高電圧を整流する整流器とを用いて構成され、
変圧器1次側への入力電圧を調整することにより、電極
3A,3B間に印加される直流電圧の大きさを変えるこ
とができる。
FIG. 1 shows an embodiment of the present invention. In this embodiment, the electrostatic chuck 1 comprises a disc-shaped insulator 2 made of Al 2 O 3 and foil-shaped planar electrodes 3A, 3B embedded side by side in the same plane in the insulator 2. And a DC power source 4 to which electrodes 3A and 3B are connected to both electrodes. Although not shown here, the DC power supply 4 is configured by using a transformer whose primary side is connected to a low-voltage AC power supply and a rectifier that rectifies the AC high voltage on the secondary side of the transformer.
By adjusting the input voltage to the primary side of the transformer, the magnitude of the DC voltage applied between the electrodes 3A and 3B can be changed.

【0016】図の符号5は半導体ウエハを示し、ウエハ
搬送手段としてのハンド6により、図示されない待機位
置から図の位置へ搬送される。ハンド6は、この実施例
では、ウエハ処理面を鉛直方向下向きにして搬送を行う
フェースダウン搬送手段として構成され、ディスク状に
形成され周縁に周方向等間隔にガイド穴6Cが形成され
た台6Aと、台6Aを先端に有する腕6Bと、ガイド穴
6Cによって鉛直方向の移動を案内されるとともにウエ
ハ5を台6Aと同軸に位置させるガイドピン8と、ウエ
ハ5を弾性状態に支持するばね7とを用いて構成されて
いる。また、図の符号9は、静電チャック1を半導体製
造装置本体内に保持する静電チャックホールダであり、
静電チャック1との当接面は、内部を循環する熱媒体に
より冷却される。
Reference numeral 5 in the drawing denotes a semiconductor wafer, which is transferred from a standby position (not shown) to a position shown in the drawing by a hand 6 as a wafer transfer means. In this embodiment, the hand 6 is configured as a face-down transfer means for transferring with the wafer processing surface facing downward in the vertical direction, and is formed into a disk shape, and a table 6A having guide holes 6C formed at its peripheral edge at equal intervals in the circumferential direction. An arm 6B having a pedestal 6A at its tip, a guide pin 8 for guiding the movement in the vertical direction by a guide hole 6C and positioning the wafer 5 coaxially with the pedestal 6A, and a spring 7 for elastically supporting the wafer 5. It is constructed using and. Further, reference numeral 9 in the drawing is an electrostatic chuck holder for holding the electrostatic chuck 1 in the semiconductor manufacturing apparatus main body,
The contact surface with the electrostatic chuck 1 is cooled by the heat medium circulating inside.

【0017】静電チャック1によるウエハ5の吸着,保
持は以下のように行われる。まず、ウエハ5をばね7上
に保持して静電チャック1の直下にもたらしたハンド6
を上昇させ、あるいは図示されない駆動機構により静電
チャックホールダ9を降下させ、ガイドピン8をガイド
穴6C内へ押し込みながらウエハ5の上面と静電チャッ
ク1の絶縁体2の下面とう当接させる。当接後も静電チ
ャックホールダ9とハンド6とはなお若干上下方向の相
対移動を継続してウエハ5の上面と絶縁体2の下面との
全面当接を確実にする。しかる後、直流電源4を構成す
る変圧器の1次側に供給する電圧を調整して変圧器2次
側に接続された整流器の出力電圧が約600Vとなるよ
うにする。これにより、ウエハ5は絶縁体2の下面に吸
着され、また、電源電圧が600Vと低いことから、静
電チャック1の電極3Aからウエハ5を介して電極3B
へ向かう電気力線のウエハ下面側への洩れ量は極めて少
なくなり、ハンド6上からのパーティクル吸引数が多く
ならなくて済む。
Adsorption and holding of the wafer 5 by the electrostatic chuck 1 are performed as follows. First, the hand 6 which holds the wafer 5 on the spring 7 and brings it directly below the electrostatic chuck 1.
Or the electrostatic chuck holder 9 is lowered by a driving mechanism (not shown) to push the guide pin 8 into the guide hole 6C and bring the upper surface of the wafer 5 and the lower surface of the insulator 2 of the electrostatic chuck 1 into contact with each other. After the contact, the electrostatic chuck holder 9 and the hand 6 still continue to relatively move in the vertical direction to ensure the entire contact between the upper surface of the wafer 5 and the lower surface of the insulator 2. After that, the voltage supplied to the primary side of the transformer constituting the DC power supply 4 is adjusted so that the output voltage of the rectifier connected to the secondary side of the transformer becomes about 600V. As a result, the wafer 5 is attracted to the lower surface of the insulator 2 and the power supply voltage is as low as 600 V.
The amount of electric force lines leaking toward the lower surface of the wafer is extremely small, and the number of particles sucked from the hand 6 does not need to be large.

【0018】ウエハ5の吸着後、半導体製造装置の操作
シーケンスによりハンド6を下方へ降下させ、あるいは
静電チャックホールダ9を上昇させた後、ハンド6を次
の処理待ちウエハの待機位置へ向けて移動させ、この移
動工程でハンド6がウエハ5の面積範囲の直下に存在し
ない位置まで移動した時点以後に直流電源4の電圧を1
200Vに上昇させる。この電圧上昇の具体的な時点
は、ハンド6がウエハ5の面積範囲直下を外れた直後で
もよければ、静電チャックホールダ9がさらに上下方向
に移動してウエハの処理位置に到達した時点でもよい。
After adsorbing the wafer 5, the hand 6 is lowered or the electrostatic chuck holder 9 is raised according to the operation sequence of the semiconductor manufacturing apparatus, and then the hand 6 is directed to the standby position of the next wafer to be processed. In this moving step, the voltage of the DC power supply 4 is set to 1 after the time when the hand 6 moves to a position that does not exist directly below the area range of the wafer 5 in this moving process.
Increase to 200V. The specific time when the voltage rises may be immediately after the hand 6 moves out of the area under the wafer 5 or when the electrostatic chuck holder 9 further moves in the vertical direction to reach the wafer processing position. .

【0019】以上の吸着,保持方法とすることにより、
ウエハ処理枚数とともにハンド6上のパーティクル数は
増加するも、ウエハ処理面への吸引数は増加せず、ウエ
ハには従来の半分以下のパーティクルしか付着しないこ
とを確認した。
By the above adsorption and holding method,
Although the number of particles on the hand 6 increases with the number of wafers processed, it was confirmed that the number of particles attracted to the wafer processing surface did not increase, and that less than half of the particles adhered to the wafer were adhered to the wafer.

【0020】[0020]

【発明の効果】本発明においては、静電チャックの構成
ならびに静電チャックへの半導体ウエハの吸着,保持方
法を以上のようにしたので、以下に記載する効果が得ら
れる。請求項1の構成では、半導体ウエハの吸着ならび
に処理のための保持の各段階で良品の歩留り率向上のた
めに最も効果的な電源電圧を選択することができる。
According to the present invention, since the structure of the electrostatic chuck and the method for attracting and holding the semiconductor wafer to the electrostatic chuck are as described above, the following effects can be obtained. According to the configuration of claim 1, the most effective power supply voltage can be selected in order to improve the yield rate of non-defective products at each stage of adsorption of a semiconductor wafer and holding for processing.

【0021】請求項2の方法では、ウエハ処理面へのパ
ーティクルの付着数が低減し、静電チャックの冷却作用
が向上して処理中のウエハの適温保持が容易となるの
で、良品の歩留り率が向上し、半導体製造装置の生産性
が向上する。請求項3の方法では、低電源電圧によるウ
エハ吸着後の電源電圧上昇が、静電チャックにおける静
電気力が及ばない位置までウエハ搬送手段が移動した後
に行われるので、ウエハの処理枚数とともにウエハ搬送
手段上のパーティクル数は増しても、電源電圧上昇段階
でウエハに吸引されるパーティクルが存在しないため、
パーティクル付着数が低量に止まり、処理を連続して繰
り返しても良品の歩留り率が低下しない。
According to the method of claim 2, the number of particles adhering to the wafer processing surface is reduced, the cooling effect of the electrostatic chuck is improved, and it becomes easy to maintain the wafer at an appropriate temperature during processing. And the productivity of the semiconductor manufacturing apparatus is improved. According to the third aspect of the present invention, since the power supply voltage after the wafer is attracted by the low power supply voltage is increased after the wafer transfer means is moved to a position where the electrostatic force in the electrostatic chuck does not reach, the wafer transfer means is processed together with the number of processed wafers. Even if the number of particles above increases, there are no particles attracted to the wafer during the power supply voltage rise stage,
The number of adhered particles remains low and the yield rate of non-defective products does not decrease even if the treatment is repeated continuously.

【0022】請求項4の方法では、ウエハ搬送手段がウ
エハの面積範囲直下を外れた時点から電源電圧上昇が可
能となるので、半導体製造装置運転操作の自由度が増
し、装置の生産性が向上する。
According to the method of claim 4, since the power supply voltage can be increased from the time when the wafer transfer means deviates just below the area range of the wafer, the degree of freedom in operating the semiconductor manufacturing apparatus is increased and the productivity of the apparatus is improved. To do.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による静電チャックの構成ならびにこの
構成による静電チャックへの半導体ウエハの吸着,保持
方法とを説明するための説明図
FIG. 1 is an explanatory diagram for explaining a configuration of an electrostatic chuck according to the present invention and a method for adsorbing and holding a semiconductor wafer on the electrostatic chuck according to the configuration.

【符号の説明】[Explanation of symbols]

1 静電チャック 2 絶縁体 4 直流電源(可変電圧電源) 5 ウエハ(半導体ウエハ) 6 ハンド(ウエハ搬送手段) 1 Electrostatic Chuck 2 Insulator 4 DC Power Supply (Variable Voltage Power Supply) 5 Wafer (Semiconductor Wafer) 6 Hand (Wafer Transfer Means)

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】半導体ウエハに絶縁体を介して静電気力を
作用させることにより、絶縁体表面に半導体ウエハを吸
着,保持する静電チャックにおいて、半導体ウエハに静
電気力を作用させるための電源が可変電圧電源として構
成されていることを特徴とする静電チャック。
1. In an electrostatic chuck for attracting and holding a semiconductor wafer on the surface of an insulator by applying an electrostatic force to the semiconductor wafer through the insulator, the power source for applying the electrostatic force to the semiconductor wafer is variable. An electrostatic chuck that is configured as a voltage power supply.
【請求項2】請求項第1項に記載の静電チャックを用い
て該静電チャックの絶縁体表面に半導体ウエハを吸着,
保持させる方法であって、半導体ウエハを吸着させるた
めの電源電圧と、吸着された半導体ウエハを処理工程中
吸着状態に保持するための電源電圧とを異ならせ、吸着
時の電源電圧を低く、処理工程中の電源電圧を高くする
ことを特徴とする静電チャックへの半導体ウエハの吸
着,保持方法。
2. A semiconductor wafer is attracted onto the surface of an insulator of the electrostatic chuck by using the electrostatic chuck according to claim 1.
A method for holding the semiconductor wafer, wherein the power supply voltage for adsorbing the semiconductor wafer and the power supply voltage for holding the adsorbed semiconductor wafer in an adsorbed state during the processing step are made different, and the power supply voltage at the time of adsorption is lowered. A method for adsorbing and holding a semiconductor wafer on an electrostatic chuck, characterized by increasing a power supply voltage during a process.
【請求項3】請求項第2項に記載の吸着,保持方法にお
いて、半導体ウエハの吸着時の電源電圧から処理工程中
吸着状態に保持するための電源電圧への電圧上昇は、半
導体ウエハがウエハ搬送手段により静電チャックの絶縁
体表面にもたらされる場合には、半導体ウエハの吸着
後、ウエハ搬送手段が実質的に静電チャック電源による
静電気力が及ばない位置まで移動してから行うようにす
ることを特徴とする静電チャックへの半導体ウエハの吸
着,保持方法。
3. The adsorption / holding method according to claim 2, wherein the semiconductor wafer is a wafer when the voltage rises from the power supply voltage at the time of adsorption of the semiconductor wafer to the power supply voltage for holding the semiconductor wafer in the adsorption state during the processing step. When the carrier is brought to the insulator surface of the electrostatic chuck, after the semiconductor wafer is attracted, the wafer carrier is moved to a position where the electrostatic chuck power does not substantially exert the electrostatic force. A method of attracting and holding a semiconductor wafer to an electrostatic chuck, which is characterized in that
【請求項4】請求項第3項に記載の吸着、保持方法にお
いて、半導体ウエハを静電チャックの絶縁体表面にもた
らすウエハ搬送手段が、ウエハの処理面を鉛直下方へ向
けて搬送するとともにウエハ処理面を鉛直下方へ向けた
まま静電チャックの絶縁体表面に吸着,保持させる搬送
手段である場合には、半導体ウエハ吸着後の電源電圧の
上昇を、ウエハ搬送手段が半導体ウエハの面積範囲の直
下に存在しなくなってから行うことを特徴とする静電チ
ャックへの半導体ウエハの吸着,保持方法。
4. A method for adsorbing and holding a wafer according to claim 3, wherein the wafer transfer means for bringing the semiconductor wafer to the insulator surface of the electrostatic chuck transfers the processing surface of the wafer vertically downward and the wafer. In the case of a transfer means for adsorbing and holding on the insulator surface of the electrostatic chuck with the processing surface facing vertically downward, the wafer transfer means controls the increase of the power supply voltage after the semiconductor wafer is adsorbed within the area range of the semiconductor wafer. A method for adsorbing and holding a semiconductor wafer on an electrostatic chuck, which is performed after it no longer exists directly below.
JP7838193A 1993-04-06 1993-04-06 Electrostatic chuck, and method for adhering and holding semiconductor wafer to electrostatic chuck Pending JPH06291174A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7838193A JPH06291174A (en) 1993-04-06 1993-04-06 Electrostatic chuck, and method for adhering and holding semiconductor wafer to electrostatic chuck

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7838193A JPH06291174A (en) 1993-04-06 1993-04-06 Electrostatic chuck, and method for adhering and holding semiconductor wafer to electrostatic chuck

Publications (1)

Publication Number Publication Date
JPH06291174A true JPH06291174A (en) 1994-10-18

Family

ID=13660444

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7838193A Pending JPH06291174A (en) 1993-04-06 1993-04-06 Electrostatic chuck, and method for adhering and holding semiconductor wafer to electrostatic chuck

Country Status (1)

Country Link
JP (1) JPH06291174A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8338272B2 (en) 2008-08-29 2012-12-25 Renesas Electronics Corporation Method for manufacturing a semiconductor device
CN107644830A (en) * 2016-07-20 2018-01-30 株式会社迪思科 The absorption confirmation method of chip, depart from confirmation method and decompression processing device
JP2021098885A (en) * 2019-12-23 2021-07-01 キヤノントッキ株式会社 Film deposition device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8338272B2 (en) 2008-08-29 2012-12-25 Renesas Electronics Corporation Method for manufacturing a semiconductor device
CN107644830A (en) * 2016-07-20 2018-01-30 株式会社迪思科 The absorption confirmation method of chip, depart from confirmation method and decompression processing device
CN107644830B (en) * 2016-07-20 2022-12-20 株式会社迪思科 Method for confirming adsorption of wafer, method for confirming detachment of wafer, and vacuum processing apparatus
JP2021098885A (en) * 2019-12-23 2021-07-01 キヤノントッキ株式会社 Film deposition device
CN113088871A (en) * 2019-12-23 2021-07-09 佳能特机株式会社 Film forming apparatus

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