JPH06291148A - Charge transfer element - Google Patents

Abstract

PURPOSE:To suppress the occurrence of potential dip by setting the impurity concentration in a region below a layer for isolating a plurality of transfer electrodes lower than the concentration in a region below an adjacent transfer electrode thereby making uniform the strength of transfer electrode at each transfer stage. CONSTITUTION:In a vertical resistor 21 for a CCD solid state image pickup device 20, P type impurities which are opposite to N type impurities for forming a transfer region 22 are implanted into a region AR2 located below a layer for isolating a plurality of transfer electrodes 15, 16, 17. Impurity concentration in the region AR2 is set lower than that in a region AR1 located below the transfer electrode. Consequently, the potential in the region AR2 can be lowered and the potential at the lower part can be substantially equalized between two adjacent transfer electrodes 15, 16 even when driving pulses PHI1, PHI2 having identical potential are applied thereto and thereby the potential is lowered.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge transfer device, and is suitable for use as a transfer device for sequentially transferring signal charges photoelectrically converted by an image sensor, for example.

[0002]

2. Description of the Related Art Today, an image pickup apparatus has an image pickup optical system including a solid-state image pickup element and a charge coupled device (CCD).
Many things that are composed by ice) are used.
The transfer method based on the interline method is widely adopted for this type of solid-state imaging device and has a configuration as shown in FIG.

The CCD solid-state image pickup device 1 of this system is
Photodiode 2 that photoelectrically converts incident light into signal charge 2
And the vertical register 3 that vertically transfers the converted signal charges constitute the imaging region 4, and the signal charges imaged by the imaging region 4 are transferred to the output end via the horizontal register 5. It is done like this.

Of these, the vertical register 3 used for the vertical transfer of signal charges has a layer structure as shown in FIG. 4A, and is formed on the N-type semiconductor substrate 10 in order by the P-type impurity layer 11.
(Hereinafter, referred to as P well 11) and N-type impurity layer 12 (hereinafter referred to as channel region 12) are formed, and the channel region 12 formed on the front surface side is used to transfer the signal charge.

A large number of transfer electrodes 15, 16, 17 ... Arranged on both sides of the gate insulating film 13 formed on the channel region 12 are used for transferring charges. In the case of this vertical register 3, drive pulses φ1, φ2 and φ3 having the same three-phase waveform are applied to the three sets of transfer electrodes 15, 16 and 17 to drive them (FIG. 4 (B)). . As a result, the signal charges are transferred for three electrodes during one cycle of the drive pulses φ1, φ2 and φ3.

[0006]

By the way, in the case of this type of vertical register 3, both end portions of the transfer electrodes cover the vicinity of the end portions of the transfer electrodes located on both sides so that the distance between the electrodes becomes as small as possible. It has a two-layer structure. In the case of this example, both end portions of the transfer electrode 16 are formed so as to cover the end portions of the adjacent transfer electrodes 15 and 17 via the interlayer insulating film 14.

However, in the region of the interlayer insulating film 14 (that is, the region AR2) that separates the two transfer electrodes from each other, the oxide film is thinner than the region of the transfer electrode (that is, AR1) by the thickness of the interlayer insulating film 14. This area AR becomes thicker
Area A in which the potential of the channel area 12 is adjacent to 2
It is shallower than the potential of the channel region 12 in R1 (FIG. 5).

That is, the potential profile below the interlayer insulating film 14 for separating the transfer electrodes (shown by a broken line in FIG. 5) is deeper than the potential profile below the transfer electrode (shown by a solid line in FIG. 5). ing. For this reason, a potential drop (potential pocket) is generated in the lower region AR2 of the interlayer insulating film 14, and a transfer residue of the signal charge is generated (FIG. 4B).

The present invention has been made in consideration of the above points, and makes it possible to make the strength of the transfer electric field uniform in each transfer stage and to suppress the occurrence of potential depletion in the transfer stage. It is intended to propose a device.

[0010]

In order to solve such a problem, in the present invention, the impurity diffusion layer formed on the surface of the semiconductor substrate 10 is used as a signal charge transfer region 22, and an oxide film is formed on the transfer region 22. By applying drive pulses φ1, φ2, φ3, ... To each of the plurality of transfer electrodes 15, 16, 17, ... Formed between them, the signal charges accumulated under the transfer electrodes are transferred under the adjacent transfer electrodes. In the charge transfer element that sequentially transfers the transfer region 20, the impurity (N) forming the transfer region 22 is formed in the transfer region 20 in the region AR2 located below the separation layer that separates the transfer electrodes 15, 16, 17 ... Type) and the opposite type of impurity (P type)
Are implanted to lower the impurity concentration in the region AR2 compared to the concentration in the region AR1 below the transfer electrode.

[0011]

By lowering the impurity concentration in the region AR2 located under the separation layer 14 for separating the plurality of transfer electrodes 15, 16, 17 ... As compared with the concentration in the region AR1 below the transfer electrode, the region concerned is reduced. The potential of AR2 can be made shallower than the conventional one, and two adjacent transfer electrodes 15 can be provided.
Even when the drive pulses φ1 and φ2 having the same potential are applied to the control terminals 16 and 16, and the potentials become shallow, the potentials under the two transfer electrodes 15 and 16 can be made substantially the same between the two potentials. As a result, when transferring signal charges, it is possible to eliminate the potential depth that has conventionally occurred between the transfer electrodes, and it is possible to further improve the transfer efficiency of signal charges.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

In FIG. 1 in which parts corresponding to those in FIG. 4 are designated by the same reference numerals, numeral 20 generally indicates a vertical register 21 in a CCD solid-state image pickup device, and an interlayer insulating film 14 for separating transfer electrodes in a channel region 22. It has the same configuration except that an N-type impurity region 22A having a lower concentration than that of the region AR1 under the transfer electrode is formed by ion-implanting a P-type impurity into a region AR2 located below the region AR2. There is.

In the case of this embodiment, the N-type impurity region 22A is formed.
Boron B is selectively ion-implanted as a P-type impurity using the photolithography technique. As a result, the impurity structure in the thickness direction of the semiconductor substrate in the region AR2 separating the transfer electrodes becomes N−, P +, N from the transfer channel layer 22 to the semiconductor substrate 10 in order.

Therefore, the potential profile in the lower region separating the transfer electrodes is the potential profile (shown by the solid line in FIG. 2) in the conventional structure (N +, P +, N) as shown by the broken line in FIG. It becomes shallower than that of the transfer electrode and has the same characteristics as the potential profile under the transfer electrode.

In the above structure, the drive pulse φ1 of "H" level (here, 0 [V]) is applied to the transfer electrode 15, and the other two transfer electrodes 16 and 17 are at "L" level (here: -9 [V]) drive pulse φ2
The transfer process of the signal charges will be described with the state in which φ and φ3 are given as the initial state.

At this time, the potential profile under the transfer electrode to which the driving pulse of "H" level is given becomes the lowermost layer curve L1 among the ten characteristic curves L1 to L10 of FIG. 1B. Signal charges are accumulated in the potential well.

When the potential of the drive pulse φ2 applied to the transfer electrode 16 is gradually lowered from the "H" level to the "L" level in this state, the potential well formed under the transfer electrode 16 becomes gradually shallower ( L1 → L2 → ……).
As a result, the signal charge accumulated under the transfer electrode 16 is sequentially moved to the transfer electrode 17 side where a deep well is formed.

In the case of this embodiment, boron B is used.
Is formed so that the apparent oxide film thickness in the region AR2 between the transfer electrodes is approximately the same as the oxide film thickness under the transfer electrodes.
Even when the "L" level drive pulses .phi.1 and .phi.2 are applied to the two electrodes, no depletion occurs between the two electrodes. As a result, all the signal charges accumulated in the lower portion of the transfer electrode 16 are transferred to the lower portion of the right adjacent transfer electrode 17.

According to the above structure, the region AR2 of the channel region 22 is arranged so that the impurity concentration of the region AR2 between the transfer electrodes is lower than the impurity concentration below the transfer electrodes.
By implanting P-type impurities only in this region, the apparent oxide film thickness in this region can be made substantially equal to the oxide film thickness under the transfer electrode, and the occurrence of potentiometric dip due to the existence of the interlayer insulating film can be suppressed. You can As a result, the transfer efficiency of signal charges by the vertical register 21 can be further improved as compared with the conventional case.

In the above embodiment, the case where the P well 11 and the channel region 22 made of the N type impurity layer are formed on the N type semiconductor substrate 10 has been described, but the present invention is not limited to this. It can also be applied to the case where the substrate, the well and the channel region 22 are formed by using a semiconductor material having an inverse shape to that of the embodiment.

Further, in the above-mentioned embodiment, the case where boron B is ion-implanted as the P-type impurity by utilizing the photolithographic technique to reduce the impurity concentration in the channel region 22 corresponding to the transfer electrodes has been described. The invention is not limited to this, and boron B is ion-implanted obliquely in the opposite direction to the transfer direction before the oxidation of polycincon.
After the oxidation of polysilicon, phosphorus P or arsenic As may be obliquely ion-implanted to reduce only the impurity concentration in a specific region of the channel region 22.

Further, in the above-described embodiment, the impurity concentration of the N-type impurity forming the channel region 22 is boron B.
However, the present invention is not limited to this, and the impurity concentration of the channel region 22 may be lowered by implanting P-type impurities other than boron B.

Further, in the above-mentioned embodiment, the case where the present invention is applied to the vertical register for transferring the signal charge photoelectrically converted by the CCD solid-state image pickup element has been described, but the present invention is not limited to this, and the present invention is not limited to this. It can also be applied to the case of a register.

Further, in the above-described embodiment, the case where the present invention is applied to the case where the vertical register 21 is driven in three phases has been described, but the present invention is not limited to this, and according to another driving method, for example, 4 It can also be applied to the case of phase drive.

Further, in the above-described embodiment, the drive pulses φ1 and φ2 applied to the transfer electrodes 15, 16 and 17 are used.
The case where the “H” level of φ3 and φ3 are set to 0 [V] and the “L” level is set to −9 [V] has been described, but the present invention is not limited to this, and the drive pulse voltage may be another voltage. .

Further, in the above-mentioned embodiment, the case where the polysilicon electrode has a structure in which two layers are superposed has been described, but the present invention is not limited to this, and is applied to a CCD having a structure in which three or more layers are superposed. obtain.

Further, in the above-mentioned embodiment, the case where the CCD having the structure shown in FIG. 1 is used as the signal transfer stage of the CCD solid-state image pickup element has been described, but the present invention is not limited to this, and other two-dimensional area is imaged. It can also be applied to the case of being used in the signal transfer stage in the two-dimensional image sensor of. The CCD having the structure shown in FIG. 1 may be used as a signal transfer stage in a one-dimensional image sensor such as a facsimile or electronic copying machine, or may be used as a delay line for analog data.

[0029]

As described above, according to the present invention, the impurity concentration of the region located under the separation layer that separates each of the plurality of transfer electrodes is made lower than the concentration of the region under the adjacent transfer electrode. As a result, the potential of the area can be made shallower than in the conventional case, the drive pulse of the same potential is applied to two adjacent transfer electrodes, and the potentiometer in the case where the potential is shallow becomes Can be almost the same. As a result, when transferring signal charges, it is possible to eliminate the potential depth that has conventionally occurred between the transfer electrodes, and it is possible to further improve the transfer efficiency of signal charges.

[Brief description of drawings]

FIG. 1 is a partial cross-sectional view and a potential diagram showing an embodiment of a charge transfer device according to the present invention.

FIG. 2 is a potential diagram showing a potential profile in a depth direction in a lower portion of an interlayer insulating film separating a transfer electrode.

FIG. 3 is a schematic plan view for explaining a two-dimensional image sensor using an interline transfer system.

FIG. 4 is a partial sectional view and a potential diagram thereof for explaining a conventional charge transfer device.

FIG. 5 is a potential diagram showing a potential profile in a depth direction in a lower portion of an interlayer insulating film separating the transfer electrode.

[Explanation of symbols]

1, 20 ... CCD solid-state image sensor, 2 ... Photodiode, 3, 21 ... Vertical register, 4 ... Imaging area, 5
... Horizontal register, 10 ... Semiconductor substrate, 11 ... P well, 12 ... Channel region, 13 ... Gate insulating film,
14 ... Interlayer insulating film, 15, 16, 17 ... Transfer electrodes.

Claims (3)

[Claims] 1. A drive pulse is applied to each of a plurality of transfer electrodes formed on the surface of a semiconductor substrate by using an impurity diffusion layer as a signal charge transfer region and sandwiching an oxide film on the transfer region. In the charge transfer element for sequentially transferring the signal charges accumulated under the transfer electrodes to the adjacent transfer electrodes by doing so, in the transfer region, a region located under the separation layer that separates the plurality of transfer electrodes from each other. A charge transfer element characterized in that an impurity having an inverse shape to the impurity forming the transfer region is injected into the portion, and the impurity concentration in the region is made lower than the concentration in the region below the transfer electrode. 2. The charge transfer device according to claim 1, wherein charges photoelectrically converted by a one-dimensional or two-dimensional image sensor are sequentially transferred as the signal charges. 3. The charge transfer device according to claim 1, wherein an input signal input to an analog signal processing circuit is used as the signal charge, and the signal charge is delayed by an arbitrary time and transferred.