JP2812003B2 - Solid-state imaging device and driving method thereof - Google Patents

Solid-state imaging device and driving method thereof

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Publication number
JP2812003B2
JP2812003B2 JP3180645A JP18064591A JP2812003B2 JP 2812003 B2 JP2812003 B2 JP 2812003B2 JP 3180645 A JP3180645 A JP 3180645A JP 18064591 A JP18064591 A JP 18064591A JP 2812003 B2 JP2812003 B2 JP 2812003B2
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JP
Japan
Prior art keywords
channel
coupled device
charge
impurity concentration
vertical charge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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JP3180645A
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Japanese (ja)
Other versions
JPH0529599A (en
Inventor
和夫 小沼
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NEC Corp
Original Assignee
NEC Corp
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Publication of JPH0529599A publication Critical patent/JPH0529599A/en
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Publication of JP2812003B2 publication Critical patent/JP2812003B2/en
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Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、2次元情報を時系列電
気信号に変換する固体撮像素子とその製造方法及び駆動
方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device for converting two-dimensional information into a time-series electric signal, and a method of manufacturing and driving the same.

【0002】[0002]

【従来の技術】従来の固体撮像素子においては、垂直電
荷結合素子のチャネル下方のウェルの不純物濃度と水平
電荷結合素子の少なくとも蓄積領域となるチャネル下方
のウェルの不純物濃度とが同一になっていた。
2. Description of the Related Art In a conventional solid-state imaging device, the impurity concentration of a well below a channel of a vertical charge-coupled device is equal to the impurity concentration of a well below a channel serving as at least a storage region of a horizontal charge-coupled device. .

【0003】[0003]

【発明が解決しようとする課題】電荷結合素子の単位面
積当りの最大電荷蓄積量は、前記電荷結合素子の電荷蓄
積容量と、前記電荷結合素子のチャネルを障壁領域とし
て働かせた場合の最浅チャネル電位深さと、蓄積領域と
して働かせた場合の最深チャネル電位深さとのチャネル
電位差である最大チャネル電位差との積により得られ
る。電荷蓄積容量はチャネルの不純物濃度に依存し、例
えば、N型チャネル領域を有する埋め込み型電荷結合素
子の場合、チャネルを構成するN型不純物濃度が高濃度
になるほど大きくなる。外部駆動条件からの制約を受け
ない場合、最大チャネル電位差とは、例えば、N型チャ
ネル領域を有する埋め込み型電荷結合素子の場合、前記
電荷結合素子が周辺領域から電気的に分離状態を保つこ
とが出来る最大ゲート電圧で与えられる最深チャネル電
位と電荷結合素子のピニング電位により決る最浅チャネ
ル電位との差で与えられる。
The maximum charge storage capacity per unit area of the charge-coupled device is determined by the charge storage capacity of the charge-coupled device and the shallowest channel when the channel of the charge-coupled device acts as a barrier region. It is obtained by the product of the maximum channel potential difference, which is the channel potential difference between the potential depth and the deepest channel potential depth when acting as a storage region. Charge storage capacitor is dependent on the non-net concentration of the channel, for example, in the case of the embedded type charge-coupled device having a N-type channel region, the larger N-type impurity concentration constituting the channel is in a high concentration. When there is no restriction from external driving conditions, the maximum channel potential difference is, for example, in the case of a buried charge-coupled device having an N-type channel region, that the charge-coupled device keeps an electrically separated state from a peripheral region. It is given by the difference between the deepest channel potential given by the maximum possible gate voltage and the shallowest channel potential determined by the pinning potential of the charge coupled device.

【0004】一方、添加不純物のイオン化が100%と
見なせなくなる温度において転送効率の劣化現象が生じ
るが、この劣化現象はチャネルの不純物濃度が高濃度に
なるほど、また、電荷結合素子の駆動周波数が高くなる
ほど顕著になる。
On the other hand, at a temperature at which the ionization of the added impurity cannot be regarded as 100%, the transfer efficiency deteriorates. This deterioration occurs as the impurity concentration of the channel becomes higher and the driving frequency of the charge-coupled device becomes higher. The higher the value, the more noticeable.

【0005】2次元固体撮像素子には、ダイナミックレ
ンジが大きいことが要求され、従って、電荷結合素子で
扱い得る信号電荷量が多いことが望ましい。2次元固体
撮像素子における垂直電荷結合素子は面積的制約がある
ので、上記ダイナミックレンジ増大のためには、単位面
積当りの最大電荷蓄積量を大きくしなければならない。
垂直電荷結合素子においては、上述した転送効率の劣化
が検知されるほど駆動周波数が高くないので、例えば、
N型チャネル領域を有する埋め込み型電荷結合素子の場
合、チャネルのN型不純物濃度を高濃度にして電荷蓄積
容量を高めれば良い。
[0005] A two-dimensional solid-state imaging device is required to have a large dynamic range. Therefore, it is desirable that a large amount of signal charges can be handled by a charge-coupled device. Since the vertical charge-coupled device in the two-dimensional solid-state imaging device has an area limitation, the maximum charge storage amount per unit area must be increased in order to increase the dynamic range.
In the vertical charge-coupled device, the driving frequency is not high enough to detect the above-described deterioration of the transfer efficiency.
In the case of a buried charge-coupled device having an N-type channel region, the charge storage capacity may be increased by increasing the N-type impurity concentration of the channel.

【0006】一方、水平電荷結合素子は、垂直電荷結合
素子のような面積的制約がないうえ、水平電荷結合素子
全段の転送期間が垂直電荷結合素子1段の転送期間に当
るほど駆動周波数が高く、転送効率の劣化現象が生じや
すいので、チャネルの不純物濃度を低濃度にし、チャネ
ル幅を大きく取り扱った方が有利である。
On the other hand, the horizontal charge-coupled device has no area limitation unlike the vertical charge-coupled device, and has a drive frequency such that the transfer period of all stages of the horizontal charge-coupled device corresponds to the transfer period of one stage of the vertical charge-coupled device. Since it is high and the transfer efficiency is likely to deteriorate, it is advantageous to reduce the impurity concentration of the channel and to handle the channel wide.

【0007】このように、垂直電荷結合素子と水平電荷
結合素子とではチャネルの不純物濃度の適正量が異なる
にもかかわらず、上述した従来の固体撮像素子では垂直
電荷結合素子と水平電荷結合素子のチャネル不純物濃度
が同一であるため、チャネル不純物濃度を高くした場合
にはダイナミックレンジは大きく出来るが冷却したとき
には水平電荷結合素子において信号転送不良が生じると
いう問題が生じ、逆にチャネル不純物濃度を低くした場
合には冷却しても水平電荷結合素子における信号電荷転
送不良は生じないがダイナミックレンジを大きく出来な
いという問題が生じた。
As described above, in the above-described conventional solid-state image pickup device, the vertical charge-coupled device and the horizontal charge-coupled device are different in the appropriate amount of the impurity concentration of the channel between the vertical charge-coupled device and the horizontal charge-coupled device. Since the channel impurity concentration is the same, when the channel impurity concentration is increased, the dynamic range can be increased. However, when the channel impurity concentration is cooled, a problem that signal transfer failure occurs in the horizontal charge-coupled device occurs, and conversely, the channel impurity concentration is decreased. In this case, the signal charge transfer failure in the horizontal charge-coupled device does not occur even if the cooling is performed, but the dynamic range cannot be increased.

【0008】さらに、上述した問題を解決するために考
案された、従来の、垂直電荷結合素子と水平電荷結合素
子のチャネル不純物濃度が異なるだけの固体撮像素子
(参考文献:特願平2−294184)では、垂直電荷
結合素子から水平電荷結合素子への信号電荷の転送の
際、転送経路に生じる障壁を防ぎ、チャネル電位の整合
をとるために、電荷結合素子のゲート印加電圧を制約
条件が増え、垂直電荷結合素子と水平電荷結合素子の
両電荷結合素子の最適条件、特に、十分な最大チャネル
電位差を得ることが出来なかった。
Further, a conventional solid-state image pickup device in which the channel impurity concentration of the vertical charge coupled device and that of the horizontal charge coupled device are different from each other has been devised to solve the above-mentioned problem (refer to Japanese Patent Application No. 2-294184). In (2), when transferring signal charges from the vertical charge-coupled device to the horizontal charge-coupled device, the gate applied voltage of the charge-coupled device is restricted in order to prevent a barrier generated in the transfer path and to match the channel potential .
As a result, the optimum conditions for both the vertical charge-coupled device and the horizontal charge-coupled device, in particular, a sufficient maximum channel potential difference could not be obtained.

【0009】[0009]

【課題を解決するための手段】上述した問題を解決する
ための発明が2つある。
There are two inventions for solving the above-mentioned problems .

【0010】第1は、垂直電荷結合素子と水平電荷結合
素子の組み合せにより、2次元情報の光信号を時系列信
号として出力する固体撮像素子において、前記垂直電荷
結合素子と前期水平電荷結合素子の少なくとも蓄積領域
が、信号電荷を転送するチャネルとチャネル直下のウェ
ルとの不純物の導電型が異る埋め込みチャネル型であ
り、前記垂直電荷結合素子埋め込みチャネルの不純物濃
度が前記水平電荷結合素子の蓄積領域となるチャネルの
不純物濃度よりも高く、かつ、前記垂直電荷結合素子の
ウェルの不純物濃度が前記水平電荷結合素子蓄積領域の
ウェルの不純物濃度よりも高く、垂直電荷結合素子と水
平電荷結合素子との結合部に、前記垂直電荷結合素子が
前記水平電荷結合素子との間のゲート電極とは別に、独
立に電圧印加が可能な転送電極を1個具備し、その独立
した転送電極下のチャネル及びウェルの不純物濃度が前
記水平電荷結合素子のチャネルおよびウェルの不純物濃
度とそれぞれ同一であることを特徴とする。
First, vertical charge-coupled devices and horizontal charge-coupled devices
By combining the elements, the optical signal of the two-dimensional information
The solid-state imaging device that outputs the vertical charge
Coupling device and at least the storage region of the horizontal charge coupled device
Is the channel that transfers signal charges and the wafer immediately below the channel.
Channel type with different conductivity type
The impurity concentration in the channel embedded in the vertical charge-coupled device.
Degree of the channel that becomes the storage region of the horizontal charge-coupled device.
Higher than the impurity concentration, and of the vertical charge-coupled device.
The impurity concentration of the well is lower than that of the horizontal charge-coupled device accumulation region.
Higher than the impurity concentration of the well , a voltage can be applied independently to the junction between the vertical charge-coupled device and the horizontal charge-coupled device separately from the gate electrode between the vertical charge-coupled device and the horizontal charge-coupled device And the impurity concentration of the channel and the well under the independent transfer electrode is the same as the impurity concentration of the channel and the well of the horizontal charge-coupled device, respectively.

【0011】上記の特徴を有する固体撮像素子は、垂直
電荷結合素子及び水平電荷結合素子のチャネル部分に、
前記水平電荷結合素子のウェルに適した量および深さ方
向分布の不純物を添加し、次に、前記水平電荷結合素子
チャネルに、前記水平電荷結合素子チャネルに適した量
および深さ方向分布の不純物を添加した後、垂直電荷結
合素子に、前述したウェルへの不純物添加と併せた不純
物量および深さ方向分布が前記垂直電荷結合素子のウェ
ルに適する不純物添加を行い、次に、前述したチャネル
への不純物添加と併せた不純物量および深さ方向分布が
前記垂直電荷結合素子チャネルに適する不純物添加を前
記垂直電荷結合素子に行うことで製造できる。
[0011] The solid-state image pickup device having the above-described features is provided at the channel portions of the vertical charge coupled device and the horizontal charge coupled device.
Adding a suitable amount and depth distribution of impurities to the wells of the horizontal charge-coupled device, and then adding an amount of impurities suitable for the horizontal charge-coupled device channel to the horizontal charge-coupled device channel; Is added to the vertical charge-coupled device, the impurity amount and the depth distribution in addition to the impurity addition to the well described above are subjected to impurity addition suitable for the well of the vertical charge-coupled device, and then to the above-described channel. The vertical charge-coupled device can be manufactured by adding an impurity suitable for the channel of the vertical charge-coupled device to the vertical charge-coupled device so that the impurity amount and the distribution in the depth direction together with the addition of the impurity are suitable .

【0012】[0012]

【0013】[0013]

【0014】第2は、第1の特徴を有する固体撮像素子
の駆動方法であり、垂直電荷結合素子の独立した転送電
極下のチャネルを障壁領域として働かせる場合に、その
独立した転送電極下のチャネル電位深さが前記垂直電荷
結合素子の他の転送電極のチャネルを障壁領域として働
かせる場合のチャネル電位深さより少なくとも浅くなら
ないレベルの電圧で、且つ、フリンジ電界の大きさ及び
その及ぶ範囲を広げて、不純物濃度変化により生じる障
壁を減少させるに足るレベルの電圧を前記独立した転送
電極に印加することを特徴とする。
The second is a driving method of the solid-state image pickup device having the first feature. When the channel under the independent transfer electrode of the vertical charge coupled device acts as a barrier region, the channel under the independent transfer electrode is used. The potential depth is a voltage at a level that does not become at least shallower than the channel potential depth when the channel of the other transfer electrode of the vertical charge-coupled device acts as a barrier region , and the magnitude of the fringe electric field and
By expanding the range, obstacles caused by changes in impurity concentration
A voltage of a level sufficient to reduce the wall is applied to the independent transfer electrode.

【0015】[0015]

【作用】本発明の固体撮像素子では、垂直電荷結合素子
と水平電荷結合素子のチャネルおよびウェルの不純物濃
度が異なり、垂直電荷結合素子のチャネルおよびウェル
の不純物濃度が少なくとも水平電荷結合素子の蓄積領域
のチャネルおよびウェルよりもそれぞれ高くなっている
ので垂直電荷結合素子において単位面積当たりの最大電
荷蓄積量を大きく出来ると同時に、水平電荷結合素子に
おける冷却時の転送効率劣化の問題を取り除くことが出
来る。最大電荷蓄積量は、単位面積当たりの電荷蓄積容
量と最大チャネル電位差との積で与えられる。単位面積
当たりの電荷蓄積量はチャネルの不純物濃度を高めるこ
とで、高めることが出来る。水平電荷結合素子の冷却時
の転送効率の劣化は、チャネルを構成する不純物、例え
ば、N型チャネル領域を有する埋め込み型電荷結合素子
の場合、リン等のN型不純物が電荷転送の際のトラップ
として振舞うことに起因している。水平電荷転送素子の
チャネルを構成する不純物の濃度を低くすることで、前
記転送効率を向上することができる。垂直電荷結合素子
と水平電荷結合素子のウェルの不純物濃度を独立に最適
化することで、チャネルの不純物濃度が異る垂直電荷結
合素子と水平電荷結合素子とのチャネル電位の整合性を
とることができる。このことにより、前記最大チャネル
電位差を大きくでき、垂直電荷結合素子の最大電荷蓄積
量の増加、水平電荷結合素子の転送効率の向上、およ
び、ゲート印加電圧の低電圧化が達成される。
In the solid-state imaging device according to the present invention, the impurity concentration of the channel and the well of the vertical charge-coupled device and the horizontal charge-coupled device are different, and the impurity concentration of the channel and the well of the vertical charge-coupled device is at least the accumulation region of the horizontal charge-coupled device , The maximum charge accumulation per unit area can be increased in the vertical charge-coupled device, and the problem of the transfer efficiency deterioration during cooling in the horizontal charge-coupled device can be eliminated. The maximum charge storage amount is given by the product of the charge storage capacity per unit area and the maximum channel potential difference. The charge storage amount per unit area can be increased by increasing the impurity concentration of the channel. The deterioration of the transfer efficiency during cooling of the horizontal charge-coupled device is caused by the fact that impurities constituting the channel, for example, in the case of a buried charge-coupled device having an N-type channel region, an N-type impurity such as phosphorus is trapped as a charge transfer. Due to behavior. The transfer efficiency can be improved by lowering the concentration of impurities constituting the channel of the horizontal charge transfer element. By independently optimizing the impurity concentration in the wells of the vertical charge-coupled device and the horizontal charge-coupled device, the channel potential of the vertical charge-coupled device and the horizontal charge-coupled device having different channel impurity concentrations can be matched. it can. As a result, the maximum channel potential difference can be increased, and the maximum charge accumulation amount of the vertical charge-coupled device can be increased, the transfer efficiency of the horizontal charge-coupled device can be improved, and the voltage applied to the gate can be reduced.

【0016】[0016]

【実施例】次に、本発明の実施例について図面を用いて
詳細に説明する。図1は本発明の請求項1記載の固体撮
像素子に関する一実施例の模式的構成図である。本実施
例はインターライン転送方式の電荷結合素子型固体撮像
素子である。
Next, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic configuration diagram of one embodiment of a solid-state imaging device according to claim 1 of the present invention. This embodiment is a charge coupled device type solid-state imaging device of an interline transfer system.

【0017】半導体チップ上に光電変換素子1が二次元
に配置されており、それぞれの列にチャネル不純物濃度
およびウェル不純物濃度が高い垂直電荷結合素子2が1
本ずつ対応して設けられている。これら2次元に配置さ
れた光電変換素子1と列に並べられた垂直電荷結合素子
2とからイメージ領域が構成され、その下にチャネル不
純物濃度とウェル不純物濃度が低い水平電荷結合素子3
が設けられている。垂直電荷結合素子と水平電荷結合素
子の結合部の電極配置とチャネル不純物濃度及びウエル
不純物濃度の関係は図2に示す通りである。垂直電荷結
合素子の独立している転送電極11eであるφV4’電
極と垂直電荷結合素子の独立していない転送電極11d
であるφV3電極との境界部分でチャネルとウエルの両
方の濃度が異なっている。φV3電極が存在する側では
チャネル不純物濃度及びウエル不純物濃度が高い垂直電
荷結合素子であり、φV4’電極、ゲート電極12及び
水平電荷結合素子の転送電極が存在する側はチャネル不
純物濃度及びウエル不純物濃度が低い電荷結合素子であ
る。水平電荷結合素子3の出力端に引き続いて出力部4
が設けられている。
A photoelectric conversion element 1 is two-dimensionally arranged on a semiconductor chip, and a vertical charge-coupled element 2 having a high channel impurity concentration and a high well impurity concentration is provided in each column.
It is provided for each book. An image area is composed of the two-dimensionally arranged photoelectric conversion elements 1 and the vertical charge-coupled elements 2 arranged in a row, under which a horizontal charge-coupled element 3 having a low channel impurity concentration and a low well impurity concentration.
Is provided. Vertical and horizontal charge coupled devices
Configuration, channel impurity concentration and wells at the junction
The relationship between the impurity concentrations is as shown in FIG. Vertical charge
ΦV4 ′ electrode which is the independent transfer electrode 11e of the
Transfer electrode 11d independent of pole and vertical charge-coupled device
Channel and well at the boundary with the φV3 electrode
Are different. On the side where the φV3 electrode exists
Vertical electrodes with high channel impurity concentration and well impurity concentration
A load coupling element, a φV4 ′ electrode, a gate electrode 12 and
The channel on the side of the horizontal charge-coupled device where the transfer electrode is
Charge-coupled device with low concentration of pure substance and well impurity
You. Following the output terminal of the horizontal charge-coupled device 3, the output unit 4
Is provided.

【0018】以上述べた実施例はインターライン転送方
式であるが、本発明はフレーム転送方式の電荷結合素子
型固体撮像素子にも適用できる。
Although the embodiment described above is of the interline transfer system, the present invention can also be applied to a charge transfer device type solid-state image pickup device of a frame transfer system.

【0019】図2は本発明の請求項記載の固体撮像素
子に関する一実施例の模式的断面図である。垂直電荷結
合素子は4相駆動方式で描かれている。
[0019] FIG. 2 is a schematic cross-sectional view of an embodiment relates to a solid-state imaging device according to the first aspect of the present invention. The vertical charge-coupled device is depicted in a four-phase drive scheme.

【0020】Si基板5表面側に不純物濃度が高いP型
ウェル6と不純物濃度が高いN型チャネル7および不純
物濃度が低いP型ウェル8と不純物濃度が低いN型チャ
ネル9が設けられている。それらチャネルと対向して、
SiO2 膜10を介して垂直電荷結合素子の転送電極1
1a〜11e、ゲート電極φVL12及び水平電荷結合
素子の転送電極13が設けられている。独立した転送電
極φV4′11eが、独立していない転送電極φV31
1dとゲート電極φVL12との間に設けられている。
不純物濃度が高いP型ウェル6と不純物濃度が低いP型
ウェル8との境及び不純物濃度が高いN型チャネル7と
不純物濃度が低いN型チャネル9との境が、独立してい
ない転送電極φV311dと独立した転送電極φV4′
11eとの境の位置と一致している。
A P-type well 6 having a high impurity concentration, an N-type channel 7 having a high impurity concentration, a P-type well 8 having a low impurity concentration, and an N-type channel 9 having a low impurity concentration are provided on the surface side of the Si substrate 5. Facing those channels,
Transfer electrode 1 of vertical charge coupled device via SiO 2 film 10
1a to 11e, a gate electrode φVL12 and a transfer electrode 13 of a horizontal charge-coupled device are provided. The independent transfer electrode φV4′11e is connected to the non-independent transfer electrode φV31
1d and the gate electrode φVL12.
The boundary between the P-type well 6 having a high impurity concentration and the P-type well 8 having a low impurity concentration and the boundary between the N-type channel 7 having a high impurity concentration and the N-type channel 9 having a low impurity concentration are not independent transfer electrodes φV311d. And the independent transfer electrode φV4 '
11e.

【0021】図3は本発明の請求項記載の固体撮像素
子の製造方法に関する一実施例を示すための製造工程図
である。この製造方法は、前記固体撮像素子の実施例2
をより高精度に製造するためのものである。
[0021] FIG. 3 is a manufacturing process diagram for showing an embodiment of manufacturing method of a solid-state imaging device according to the first aspect of the present invention. This manufacturing method is similar to the solid-state imaging device according to the second embodiment.
Is manufactured with higher precision.

【0022】Si基板5にP+ 型チャネル阻止領域(図
3には見えない。)や厚いSiO2 膜14などを形成す
る下地形成工程が終了した後、光電変換素子(図3には
見えない。)を被うフォトレジストマスク(図3には見
えない。)を施す。薄いSiO2 膜を介したボロンイオ
ン15の注入により不純物濃度が低いP型ウェル8を形
成する〔図3(a)〕。薄いSiO2 膜を介したリンイ
オン16の注入により不純物濃度が低いN型チャネル7
を形成する〔図3(b)〕。垂直電荷結合素子の中の独
立した転送電極11eおよび水平電荷結合素子の中の1
層目の転送電極13を形成し、光電変換素子(図3には
見えない。)および独立した転送電極11eの途中まで
を覆う新たなフォトレジストマスク17を施す。ここで
追加ボロンイオン18を注入し、不純物濃度の高いP型
ウェル6を形成する〔図3(c)〕。追加リンイオン1
9を注入し、不純物濃度の高いN型チャネル7を形成す
る〔図3(c)〕。追加リンイオン19を注入し、不純
物濃度の高いN型チャネル7を形成する〔図3
(d)〕。その後、垂直電荷結合素子の独立していない
転送電極のうち、垂直電荷結合素子の中の独立した転送
電極11eおよび水平電荷結合素子の中の一層目の転送
電極13と同じ層となる転送電極11a、11cを形成
する〔図3(e)〕。垂直電荷結合素子の中の2層目の
転送電極11b、11d、ゲート電極12及び水平電荷
結合素子の中の2層目の転送電極(図3では見えな
い。)を形成して垂直、水平両電荷結合素子の電極全て
出来上がる〔図3(f)〕。
After a base forming step of forming a P + type channel blocking region (not visible in FIG. 3) and a thick SiO 2 film 14 on the Si substrate 5, the photoelectric conversion element (not visible in FIG. 3) is completed. .) Is applied (not visible in FIG. 3). By implanting boron ions 15 through a thin SiO 2 film, a P-type well 8 having a low impurity concentration is formed (FIG. 3A). N-type channel 7 having a low impurity concentration by implantation of phosphorus ions 16 through a thin SiO 2 film
Is formed (FIG. 3B). Independent transfer electrode 11e in the vertical charge coupled device and one in the horizontal charge coupled device
A transfer electrode 13 of the layer is formed, and a new photoresist mask 17 is applied to cover the photoelectric conversion element (not visible in FIG. 3) and the middle of the independent transfer electrode 11e. Here, additional boron ions 18 are implanted to form a P-type well 6 having a high impurity concentration (FIG. 3C). Additional phosphorus ion 1
9 is implanted to form an N-type channel 7 having a high impurity concentration [FIG. 3 (c)]. An additional phosphorus ion 19 is implanted to form an N-type channel 7 having a high impurity concentration [FIG.
(D)]. Thereafter, of the transfer electrodes that are not independent of the vertical charge-coupled device, the transfer electrode 11a in the same layer as the independent transfer electrode 11e in the vertical charge-coupled device and the first transfer electrode 13 in the horizontal charge-coupled device. , 11c [FIG. 3 (e)]. The transfer electrodes 11b and 11d of the second layer in the vertical charge-coupled device, the gate electrode 12, and the transfer electrode of the second layer in the horizontal charge-coupled device (not shown in FIG. 3) are formed to form both vertical and horizontal electrodes. All the electrodes of the charge-coupled device are completed [FIG. 3 (f)].

【0023】図4は本発明の請求項記載の固体撮像素
子の製造方法に関する第2の実施例を示すための製造工
程図である。この製造方法は、前記固体撮像素子の実施
例1をより高精度に製造するためのものである。
[0023] FIG. 4 is a manufacturing process diagram for illustrating a second embodiment relates to a method for manufacturing a solid-state imaging device according to the first aspect of the present invention. This manufacturing method is for manufacturing the first embodiment of the solid-state imaging device with higher accuracy.

【0024】Si基板5にP+ 型チャネル阻止領域(図
4では見えない。)や厚いSiO2 膜14などを形成す
る下地形成工程が終了した後、光電変換素子(図4では
見えない。)を覆うフォトレジストマスク(図4では見
えない。)を施す。薄いSiO2 膜を介したボロンイオ
ン15の注入により不純物濃度が低いP型ウェル8を形
成する〔図4(a)〕。前記フォトレジストを剥離後、
光電変換素子(図4では見えない。)および、垂直電荷
結合素子と水平電荷結合素子の境の位置の水平電荷結合
素子領域を被うフォトレジストマスク20を施し、前記
薄いSiO2 膜を介した追加ボロンイオン18の注入に
より不純物濃度が高いP型ウェル6を形成する〔図4
(b)〕。光電変換素子(図4では見えない。)を被う
新たなフォトレジストマスク(図4では見えない。)を
施す。リンイオン16を注入し、不純物濃度の低いN型
チャネル9を形成する〔図4(c)〕。前記フォトレジ
ストを剥離する。光電変換素子(図4では見えない。)
および、垂直電荷結合素子と水平電荷結合素子の境の位
置の水平電荷結合素子領域を覆う新たなフォトレジスト
マスク21を施す。追加リンイオン19を注入し、不純
物濃度の高いN型チャネル7を形成する〔図4
(d)〕。垂直電荷結合素子の中の転送電極11a、1
1c、11e、および水平電荷結合素子の中の1層目の
転送電極13を形成し、垂直電荷結合素子の中の2層目
の転送電極11b、11d、ゲート電極12及び水平電
荷結合素子の中の2層目の転送電極(図4では見えな
い。)を形成して垂直、水平両電荷結合素子の電極全て
出来上がる〔図4(e)〕。
After a base forming step of forming a P + type channel blocking region (not visible in FIG. 4) and a thick SiO 2 film 14 on the Si substrate 5, the photoelectric conversion element (not visible in FIG. 4). Is applied (not visible in FIG. 4). By implanting boron ions 15 through a thin SiO 2 film, a P-type well 8 having a low impurity concentration is formed (FIG. 4A). After stripping the photoresist,
A photoresist mask 20 covering the photoelectric conversion element (not visible in FIG. 4) and the horizontal charge-coupled element region at the boundary between the vertical charge-coupled element and the horizontal charge-coupled element is applied, and the thin SiO 2 film is interposed. The P-type well 6 having a high impurity concentration is formed by implanting additional boron ions 18 [FIG.
(B)]. A new photoresist mask (not visible in FIG. 4) covering the photoelectric conversion element (not visible in FIG. 4) is applied. Phosphorus ions 16 are implanted to form an N-type channel 9 having a low impurity concentration (FIG. 4C). The photoresist is stripped. Photoelectric conversion element (not visible in FIG. 4)
Then, a new photoresist mask 21 is applied to cover the horizontal charge-coupled device region at the boundary between the vertical charge-coupled device and the horizontal charge-coupled device. An additional phosphorus ion 19 is implanted to form an N-type channel 7 having a high impurity concentration [FIG.
(D)]. Transfer electrodes 11a, 1 in a vertical charge-coupled device
1c, 11e, and the first-layer transfer electrode 13 in the horizontal charge-coupled device, and the second-layer transfer electrodes 11b, 11d in the vertical charge-coupled device, the gate electrode 12, and the horizontal charge-coupled device. Then, the transfer electrodes (not visible in FIG. 4) of the second layer are formed, and all the electrodes of both the vertical and horizontal charge-coupled devices are completed [FIG. 4 (e)].

【0025】図5は本発明の請求項記載の固体撮像素
子の製造方法に関する第3の実施例を示すための製造工
程図である。この製造方法は、前記固体撮像素子の実施
例1をより高精度に製造するためのものである。
FIG. 5 is a manufacturing process diagram for illustrating a third embodiment relates to a method for manufacturing a solid-state imaging device according to the first aspect of the present invention. This manufacturing method is for manufacturing the first embodiment of the solid-state imaging device with higher accuracy.

【0026】Si基板5にP+ 型チャネル阻止領域(図
5では見えない。)や厚いSiO2 膜14などを形成す
る下地形成工程が終了した後、光電変換素子(図5では
見えない。)および、垂直電荷結合素子と水平電荷結合
素子の境の位置Aの垂直電荷結合素子領域を被うフォト
レジストマスク22を施す。薄いSiO2 膜を介したボ
ロンイオン15の注入により不純物濃度が低いP型ウェ
ル8を形成する〔図5(a)〕。前記フォトレジストを
剥離後、光電変換素子(図5では見えない。)および、
垂直電荷結合素子と水平電荷結合素子の境の位置の水平
電荷結合素子領域を被う新たなフォトレジストマスク2
3を施し、前記薄いSiO2 膜を介した高濃度ボロンイ
オン24の注入により不純物濃度が高いP型ウェル6を
形成する〔図5(b)〕。光電変換素子(図5では見え
ない。)および、垂直電荷結合素子と水平電荷結合素子
の境の位置の垂直電荷結合素子領域を被う新たなフォト
レジストマスク25を施す。リンイオン16を注入し、
不純物濃度の低いN型チャネル9を形成する〔図5
(c)〕。前記フォトレジストを剥離する。光電変換素
子(図5では見れない。)および、垂直電荷結合素子と
水平電荷結合素子の境の位置の水平電荷結合素子領域を
覆う新たなフォトレジストマスク26を施す。高濃度リ
ンイオン27を注入し、不純物濃度の高いN型チャネル
7を形成する〔図5(d)〕。垂直電荷結合素子の中の
転送電極11a、11c、11eおよび水平電荷結合素
子の中の1層目の転送電極13を形成し、垂直電荷結合
素子の中の2層目の転送電極11b、11d、ゲート電
極12及び水平電荷結合素子の中の2層目の転送電極
(図5では見えない。)を形成して垂直、水平両電荷結
合素子の電極全て出来上がる〔図5(e)〕。
After the base forming step of forming a P + type channel blocking region (not visible in FIG. 5) and a thick SiO 2 film 14 on the Si substrate 5, the photoelectric conversion element (not visible in FIG. 5). Then, a photoresist mask 22 covering the vertical charge-coupled device region at the position A at the boundary between the vertical charge-coupled device and the horizontal charge-coupled device is applied. By implanting boron ions 15 through a thin SiO 2 film, a P-type well 8 having a low impurity concentration is formed (FIG. 5A). After removing the photoresist, a photoelectric conversion element (not visible in FIG. 5) and
A new photoresist mask 2 covering the horizontal charge coupled device region at the boundary between the vertical charge coupled device and the horizontal charge coupled device
Then, a P-type well 6 having a high impurity concentration is formed by implanting high-concentration boron ions 24 through the thin SiO 2 film (FIG. 5B). A new photoresist mask 25 covering the photoelectric conversion element (not visible in FIG. 5) and the vertical charge coupled element region at the boundary between the vertical charge coupled element and the horizontal charge coupled element is applied. Implant phosphorus ions 16,
An N-type channel 9 having a low impurity concentration is formed [FIG.
(C)]. The photoresist is stripped. A new photoresist mask 26 covering the photoelectric conversion element (not shown in FIG. 5) and the horizontal charge coupled element region at the boundary between the vertical charge coupled element and the horizontal charge coupled element is applied. High-concentration phosphorus ions 27 are implanted to form an N-type channel 7 having a high impurity concentration (FIG. 5D). The transfer electrodes 11a, 11c, and 11e in the vertical charge-coupled device and the first-layer transfer electrode 13 in the horizontal charge-coupled device are formed, and the second-layer transfer electrodes 11b, 11d, and A gate electrode 12 and a second-layer transfer electrode (not visible in FIG. 5) in the horizontal charge-coupled device are formed, and all the electrodes of the vertical and horizontal charge-coupled devices are completed (FIG. 5E).

【0027】図6(a)〜(d)は、本発明の請求項
記載の固体撮像素子の駆動方法に関する一実施例を説明
するための電位井戸図である。同図には対応する固体撮
像素子の模式的断面図(図6(a))を合わせて示して
ある。
[0027] FIG 6 (a) ~ (d) is a second aspect of the present invention
FIG. 4 is a potential well diagram for explaining an example of a driving method of the solid-state imaging device described above. FIG. 2 also shows a schematic cross-sectional view (FIG. 6A) of a corresponding solid-state imaging device.

【0028】垂直電荷結合素子の電荷の蓄積は常に転送
電極2個分で行う。転送については、蓄積していた転送
電極の水平電荷結合素子側(右側)のバリアとして動作
していた転送電極下のチャネル電位を深くすると同時
に、水平電荷結合素子から遠い側(左側)の蓄積してい
た転送電極下のチャネル電位を浅くすることにより順次
行う。チャネルおよびウェルの不純物濃度は、転送電極
11dと独立した転送電極11eとの境部分で変化して
いる。この不純物濃度変化位置は、フォトマスクの目合
わせずれや不純物の横方向拡散の影響で、転送電極11
dと独立した転送電極11eとの境の位置よりもずれる
危険がある。不純物の境と電極の境の位置がずれている
と、境周辺で同じゲート印加電圧でも電位井戸の深い部
分と浅い部分とが生じ、電荷転送の際の障壁となる可能
性がある。前記障壁はフリンジ電界の効果で減少させる
ことが出来る。本実施例では、イメージエリアでの駆動
制約を受けない独立した転送電極11eに印加する駆動
パルスの振幅を大きくして、フリンジ電界の大きさおよ
び、及ぶ範囲を広げることで前記障壁を減少させる。
The accumulation of charges in the vertical charge coupled device is always performed for two transfer electrodes. As for the transfer, the channel potential under the transfer electrode, which was acting as a barrier on the horizontal charge-coupled device side (right side) of the accumulated transfer electrode, is increased, and the accumulation on the far side (left side) from the horizontal charge-coupled device is performed. This is sequentially performed by lowering the channel potential under the transfer electrode. The impurity concentration of the channel and the well changes at the boundary between the transfer electrode 11d and the independent transfer electrode 11e. This change in the impurity concentration is caused by the misalignment of the photomask and the lateral diffusion of the impurity, and the transfer electrode 11
There is a danger that it will be shifted from the position of the boundary between d and the independent transfer electrode 11e. If the position of the boundary between the impurity and the boundary between the electrodes is displaced, a deep portion and a shallow portion of the potential well may be generated around the boundary even at the same gate applied voltage, which may become a barrier in charge transfer. The barrier can be reduced by the effect of the fringe field. In the present embodiment, the barrier is reduced by increasing the amplitude of the driving pulse applied to the independent transfer electrode 11e which is not subject to the driving restrictions in the image area, thereby increasing the magnitude and range of the fringe electric field.

【0029】[0029]

【発明の効果】以上説明したように、本発明の固体撮像
子及び駆動方法によれば、垂直電荷結合素子に於いて
単位面積当りの最大電荷蓄積容量を大きく出来ると同時
に、水平電荷結合素子における冷却時の転送効率劣化の
問題を取り除くことが出来、加えて、垂直電荷結合素子
のチャネル不純物濃度を水平電荷結合素子のチャネル不
純物濃度より高くしたことに起因する電位障壁を抑制で
き、かつ、垂直電荷結合素子と水平電荷結合素子のチャ
ネル電位特性をそろえることで、ゲート印加電圧及び素
子印加バイアス電圧の低電圧化に効果がある。
As described in the foregoing, according to the solid-state imaging <br/> element and driving the dynamic process of the present invention, when it increases the maximum charge storage capacity per unit area at the vertical charge coupled devices simultaneously In addition, the problem of transfer efficiency degradation during cooling in the horizontal charge-coupled device can be eliminated. In addition, the potential barrier caused by setting the channel impurity concentration of the vertical charge-coupled device higher than that of the horizontal charge-coupled device can be eliminated. By suppressing the voltage and making the channel potential characteristics of the vertical charge-coupled device and the horizontal charge-coupled device uniform, it is effective in reducing the gate applied voltage and the device applied bias voltage.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例の模式的構成図である。FIG. 1 is a schematic configuration diagram of one embodiment of the present invention.

【図2】本発明の一実施例の模式的断面図である。FIG. 2 is a schematic sectional view of one embodiment of the present invention .

【図3】本発明の固体撮像素子の製造方法に関する一実
施例を説明するための製造工程図である。
FIG. 3 is a manufacturing process diagram for describing one embodiment of a method for manufacturing a solid-state imaging device according to the present invention.

【図4】本発明の固体撮像素子の製造方法に関する一実
施例を説明するための製造工程図である。
FIG. 4 is a manufacturing process diagram for explaining one embodiment of the method for manufacturing a solid-state imaging device of the present invention.

【図5】本発明の固体撮像素子の製造方法に関する一実
施例を説明するための製造工程図である。
FIG. 5 is a manufacturing process diagram for explaining one embodiment of the method for manufacturing a solid-state imaging device of the present invention.

【図6】本発明の固体撮像素子の駆動方法に関する一実
施例を説明するための電位井戸図である。
FIG. 6 is a potential well diagram for explaining one embodiment of a method for driving a solid-state imaging device according to the present invention.

【符号の説明】[Explanation of symbols]

1 光電変換素子 2 チャネル不純物濃度およびウェル不純物濃度が高
い垂直電荷結合素子 3 チャネル不純物濃度およびウェル不純物濃度が低
い水平電荷結合素子 4 出力部 5 Si基板 6 不純物濃度が高いN型チャネル 7 不純物濃度が高いP型ウェル 8 不純物濃度が低いN型チャネル 9 不純物濃度が高いP型ウェル 10 SiO2膜 11a,11b,11c,11d 垂直電荷結合素子
の独立していない転送電極 11e 垂直電荷結合素子の独立している転送電極 12 φVL 13 水平電荷結合素子の転送電極 14 厚いSiO2膜 15 ボロンイオン(不純物濃度の低いP型ウェルを
形成) 16 リンイオン(不純物濃度の低いN型チャネルを
形成) 17 フォトレジストマスク 18 追加ボロンイオン(総量で不純物濃度の高いP
型ウェルを形成) 19 追加リンイオン(不純物濃度の高いN型チャネ
ルを形成) 20 フォトレジストマスク 21 フォトレジストマスク 22 フォトレジストマスク 23 フォトレジストマスク 24 高濃度ボロンイオン 25 フォトレジストマスク 26 フォトレジストマスク 27 高濃度リンイオン
REFERENCE SIGNS LIST 1 photoelectric conversion element 2 vertical charge-coupled element with high channel impurity concentration and well impurity concentration 3 horizontal charge-coupled element with low channel impurity concentration and well impurity concentration 4 output unit 5 Si substrate 6 N-type channel with high impurity concentration 7 impurity concentration High P-type well 8 N-type channel with low impurity concentration 9 P-type well with high impurity concentration 10 SiO 2 films 11 a, 11 b, 11 c, 11 d Transfer electrode 11 e independent of vertical charge-coupled device 11 e Independent of vertical charge-coupled device - transfer electrodes 12 φVL 13 transfer electrodes 14 thick SiO 2 film 15, boron ions (forming a low P-type well impurity concentration) 16 phosphorus ions (forming the lower N-type channel impurity concentration) of the horizontal charge-coupled device 17 photoresist mask 18 Additional boron ions (P with high impurity concentration in total)
19) Additional phosphorus ions (forming N-type channel with high impurity concentration) 20 Photoresist mask 21 Photoresist mask 22 Photoresist mask 23 Photoresist mask 24 High concentration boron ions 25 Photoresist mask 26 Photoresist mask 27 High Concentration phosphorus ion

フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 21/339 H01L 27/14 - 27/148 H01L 29/762 - 29/768 H04N 5/335Continuation of the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 21/339 H01L 27/14-27/148 H01L 29/762-29/768 H04N 5/335

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 垂直電荷結合素子と水平電荷結合素子の
組み合せにより、2次元情報の光信号を時系列信号とし
て出力する固体撮像素子において、前記垂直電荷結合素
子と前記水平電荷結合素子の少なくとも蓄積領域が、信
号電荷を転送するチャネルとチャネル直下のウェルとの
不純物の導電型が異る埋め込みチャネル型であり、前記
垂直電荷結合素子埋め込みチャネルの不純物濃度が前記
水平電荷結合素子の蓄積領域となるチャネルの不純物濃
度よりも高く、かつ、前記垂直電荷結合素子のウェルの
不純物濃度が前記水平電荷結合素子蓄積領域のウェルの
不純物濃度よりも高く、前記垂直電荷結合素子と前記水
平電荷結合素子との結合部に、垂直電荷転送素子と水平
電荷転送素子との間のゲート電極に加えて、独立に電圧
印加が可能な1つの転送電極を具備し、前記独立した転
送電極下のチャネル及びウェルの不純物濃度が前記水平
電荷結合素子のチャネルおよびウェルの不純物濃度とそ
れぞれ同一であることを特徴とする固体撮像素子。
1. A solid-state imaging device that outputs a two-dimensional information optical signal as a time-series signal by a combination of a vertical charge-coupled device and a horizontal charge-coupled device. The region is a buried channel type in which the conductivity type of impurities in the channel for transferring signal charges and the well immediately below the channel are different, and the impurity concentration of the buried channel in the vertical charge-coupled device becomes a storage region of the horizontal charge-coupled device. higher than the impurity concentration of the channel, and wherein the impurity concentration of the well of the vertical charge coupled devices rather higher than the impurity concentration of the well of the horizontal charge-coupled device storage area, said water and said vertical charge coupled device
The vertical charge transfer element and the horizontal charge transfer element
In addition to the gate electrode between the charge transfer element and the
A single transfer electrode capable of applying the voltage;
The impurity concentration of the channel and well under the transmission electrode is
Impurity concentration of channel and well of charge coupled device
Solid-state imaging devices, each being identical .
【請求項2】請求項1記載の固体撮像素子の駆動方法に
おいて、垂直電荷結合素子の独立した転送電極下のチャ
ネルを障壁領域として働かせる場合に、その独立した転
送電極下のチャネル電位深さが前記垂直電荷結合素子の
他の転送電極のチャネルを障壁領域として働かせる場合
のチャネル電位深さより少なくとも浅くならないレベル
の電圧で、且つ、フリンジ電界の大きさ及びその及ぶ範
囲を広げて、不純物濃度変化により生じる障壁を減少さ
せるに足るレベルの電圧を前記独立した転送電極に印加
することを特徴とする固体撮像素子の駆動方法。
2. A method for driving a solid-state image sensor according to claim 1.
In the case where the channel under the independent transfer electrode of the vertical charge-coupled device acts as a barrier region, the channel potential depth under the independent transfer electrode sets the channel of the other transfer electrode of the vertical charge-coupled device as the barrier region. Independent transfer of a voltage at a level not at least shallower than the channel potential depth in the case of acting as a channel, and at a level sufficient to reduce the barrier caused by a change in impurity concentration by expanding the magnitude and range of the fringe electric field. A method for driving a solid-state imaging device, wherein the method is applied to an electrode.
JP3180645A 1991-07-22 1991-07-22 Solid-state imaging device and driving method thereof Expired - Lifetime JP2812003B2 (en)

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Application Number Priority Date Filing Date Title
JP3180645A JP2812003B2 (en) 1991-07-22 1991-07-22 Solid-state imaging device and driving method thereof

Publications (2)

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JP2812003B2 true JP2812003B2 (en) 1998-10-15

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JP2697554B2 (en) * 1993-04-15 1998-01-14 日本電気株式会社 Method for manufacturing solid-state imaging device
JP2980196B2 (en) * 1996-02-29 1999-11-22 日本電気株式会社 Solid-state imaging device
JP3963443B2 (en) 2002-07-23 2007-08-22 松下電器産業株式会社 Solid-state imaging device and manufacturing method thereof
WO2013008405A1 (en) * 2011-07-12 2013-01-17 パナソニック株式会社 Solid-state image capture device
CN111787247B (en) * 2020-06-19 2022-09-16 中国电子科技集团公司第四十四研究所 Multiplication register structure and EMCCD (electron-multiplying charge coupled device) comprising same

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