JPH06291006A - Production of semiconductor wafer - Google Patents

Abstract

PURPOSE:To restrain the number of workpieces in process and shorten the lead time of production by attaining a target throughput by raising the operation rate of the manufacturing device on a semiconductor wafer production line and suppressing the number of delays by optimizing the flow of semiconductor wafers. CONSTITUTION:In the production line of a semiconductor wafer composed of a plurality of processing processes K1, K2, and K3, the process completing time A6 of the manufacturing device of the semiconductor wafer to be processed is presumed based on the time (actual results) spent by the process in the past at the time A1 at which the process is started and the semiconductor wafer to be processed is carried A2 to the manufacturing device. At the same time, all preparatory works A5 required before and after the process are completed. In addition, the process A4 of the next semiconductor wafer is performed at the moment the process of the current semiconductor wafer is completed. Thus the flow of semiconductor wafers is optimized on the production line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer production method, and more particularly to a production control method for a semiconductor wafer production line which requires many processing steps.

[0002]

[Prior art]

(1) First, in a semiconductor wafer production line including a plurality of processing steps, the flow of semiconductor wafers between the steps will be described. The semiconductor wafer production line has a very large number of processing steps of 300 to 500, and the manufacturing equipment of each step is very expensive. Therefore, it is not necessary to arrange the equipment in a line according to the processing procedure. Symbols C1 to C8
As shown in the example, the method of advancing the processing is adopted by repeatedly using the apparatus of each process.

Further, the processing conditions in the manufacturing apparatus for each step change according to the progress of the processing steps, and even when processing is performed by the same manufacturing apparatus, the processing conditions are different between the first processing and the second processing. .

In addition, there are a great variety of semiconductor wafers, and the processing conditions vary from product to product, and the number of semiconductor wafers processed per lot also differs.

Here, in the case where the process is centered on the symbol C6 in FIG.
The processes of the symbols C2 and C5, which are called post-processes, include the symbols C2, C3, C4, and C.
Step 7. Since each of these processes is complicatedly entangled and the processing progresses, it is difficult to synchronize the semiconductor wafer processing between the processes. Therefore, each process processes semiconductor wafers in an independent job shop format,
When the processing of the self-process is completed, the semiconductor wafer is sent out without being aware of the work-in-process state of the post-process, and the extrusion method for the post-process is used.

(2) Next, the flow of the semiconductor wafer in each step will be described. The symbol D1 in FIG. 4 is the time required to transfer the semiconductor wafer between the semiconductor wafer storage shelf and the manufacturing apparatus, and the symbol D2 is the preparation and processing of the members necessary for processing the semiconductor wafer. The time required to switch the conditions and install the semiconductor wafer in the manufacturing apparatus is indicated by the symbol D3. The symbol D6 is the time required to remove the semiconductor wafer from the manufacturing apparatus or cool the semiconductor wafer after the semiconductor wafer has been processed.
Is the time required to transfer the semiconductor wafer to the next step. After selecting the lot to be processed with the highest priority from a plurality of lots in the process, and finishing the processing of the lot L6 as shown in FIG. 4 (symbol D4), a person can rely on his intuition and experience. The processing start timing was measured for the lot L7.

[0007]

The above-mentioned conventional production of semiconductor wafers has the following problems.
(1) Each process independently processes semiconductor wafers,
Since the processing of the semiconductor wafer is not synchronized between the steps, it is not possible to know when the semiconductor wafer is transferred from the previous step to its own step, and the manufacturing apparatus becomes empty. Therefore, the operating rate is reduced even though the manufacturing apparatus is expensive. (2) If the processing capacities of the manufacturing equipment in all the processes of the semiconductor production line are equal and the semiconductor wafers can be processed in the same processing time, the in-process state of each process is always constant, so that the in-process processes of the subsequent processes are There is no particular problem even if you do not care about the condition.

However, in reality, the processing capacity of the manufacturing apparatus in each process is not uniform and the processing time is different. In addition, there are manufacturing apparatuses in which the processing time differs depending on the number of semiconductor wafers.

Here, if a semiconductor wafer is transferred to a post-process without being aware of the in-process state of the post-process, the process in the post-process may be performed due to a difference in processing capacity between the self-process and the post-process or a difference in processing time. Even if the capacity is exceeded, semiconductor wafers will be transported in the subsequent process and more work in process will be required.

If the number of work in process continues to increase, this process becomes a neck process of the semiconductor wafer production line, and the semiconductor wafer is not transported to other processes, so that the target production amount cannot be satisfied. (3) Regarding the timing of starting the processing of a plurality of semiconductor wafers in its own process, it is qualitatively performed by human intuition and experience.

Further, one worker carries out post-setup after semiconductor wafer processing, carrying to the next process, carrying from a shelf to a manufacturing apparatus, and pre-processing.

Therefore, as indicated by the symbols D4 to D5 in FIG. 4, a vacant time is generated during the semiconductor wafer processing.

As a measure against the above problem (2), more semiconductor wafers are put on the production line than the required number of production in order to obtain a sufficient number of in-process in each process, and the operating rate of the manufacturing apparatus is maintained. It was

As a result, the number of work in process on the semiconductor wafer production line increases, the processing of the semiconductor wafers takes time, and the lead time from the loading of the semiconductor wafers to the loading of the semiconductor wafers increases.

An object of the present invention is to provide a mechanism for reducing wasteful work-in-process in a semiconductor wafer production line and shortening transportation time and setup time required for semiconductor wafer processing,
It is to improve production efficiency and shorten lead time.

[0016]

A method for producing a semiconductor wafer according to the present invention is designed to quantitatively capture a transfer time, a product processing time, and a setup time from past results, and trigger a request from a subsequent process. At the start of processing, the computer automatically predicts the time at which the semiconductor wafer processing will be completed in the manufacturing equipment, and by the predicted semiconductor wafer processing completion time, the transfer time of the semiconductor wafer to be processed next in the manufacturing equipment to the manufacturing equipment. , The front (outer) setup time and the time required for the pretreatment are calculated back from the predicted end time of the semiconductor wafer treatment to obtain the conveyance start time, and the semiconductor wafer is conveyed during the semiconductor wafer treatment and is processed next. By finishing the transfer and setup of the wafer, the next semiconductor wafer can be processed at the same time as the end of the processing. To so.

[0017]

The present invention will be described below with reference to the drawings. FIG. 1 is a process explanatory view for explaining a method of processing a semiconductor wafer by synchronizing two processes of a symbol K1 process and a symbol K2 process as one embodiment of the present invention. As shown in FIG. 1, the processing end time (symbol A6) of the semiconductor wafer is predicted by the processing start trigger from the processing apparatus K2 at the symbol A1. The calculation of the processing time is performed by the computer based on the time (actual value) required for the past processing.

Next, the symbol K1 which is the pretreatment of the symbol K2 step
A semiconductor wafer that can be processed by the manufacturing apparatus notified of the start of processing in the process is searched. After that, a transfer time from the shelf (symbol A2) necessary for processing the semiconductor wafer in the step K1; a setup before the processing (symbol A3); a processing time (symbol A4); and a transfer time up to the step K2 ( Symbol A
4) Obtain the total time required for the external setup before the processing in step K2.

The computer also calculates the individual times of the transportation, the pre-processing inner setup, the processing and the pre-processing outer setup used at this time based on the time (actual value) required for the past processing. Here, the predicted processing end time (symbol A6)
The value obtained by subtracting the calculated total time from is defined as the transport start time. By starting the transportation at this transportation start time, the symbol K2
During the process, the symbol K2, which is the pretreatment of the process K2, is performed.
Even if there is no extra work in the process K2, the process, transportation, and setup of the process can be completed and the process of the next semiconductor wafer can be started at the processing end time (process A6) of the process K2. Semiconductor wafer production is possible.

Here, the inner setup is a setup in which the manufacturing equipment is occupied, and therefore the inner setup and the semiconductor wafer processing cannot be performed at the same time, and the outer setup is performed without occupying the manufacturing equipment. That is, it can be performed simultaneously with semiconductor wafer processing.

FIG. 2 is a diagram for explaining the flow of the semiconductor wafer when the transfer time is longer than the predicted end as another embodiment of the present invention. The setup time will be omitted in order to simplify the description of the processing contents. The processing end time (symbol B2) is predicted by using the processing start (symbol B1) of the lot L1 as a trigger. At this time, the next lot L2 is determined, but if the processing end time (symbol B2) of the lot L1 is not inquired even if the lot L2 is immediately conveyed (symbol B3), the lot L2 is conveyed as it is and the lot L2 is conveyed. The lot L3 is started to be conveyed (symbol B3) in time for the processing end time of L2 (symbol B2). The processing start time (symbol B2) of the lot L2 is used as a trigger to predict the processing end time (symbol B3) of the lot L3, and the processing end time (symbol B) of the lot L3 is predicted.
Transporting lot L4 in time for 2) (symbol B
3) Do. After that, the semiconductor wafers are transferred one after another triggered by the start of processing, and the next semiconductor wafer can be processed at the same time as the processing end time.

[0022]

As described above, according to the present invention, the following effects can be obtained. (1) The operating rate of the manufacturing apparatus can be improved by transporting the lot that is appropriately processed to the manufacturing apparatus. (2) Since the work in process is not concentrated in a specific process of the semiconductor wafer production line, the semiconductor wafer is not conveyed to the specific process, and the required number of processes in each process can be performed, so that the target production amount can be satisfied. (3) Reducing the waiting time of semiconductor wafers and the number of work in process by optimizing the start timing of the semiconductor wafer processing in the manufacturing apparatus (If the present invention is carried out in all the processes, the number of work in process of each process is reduced to 0. By doing so, the waiting time for processing other semiconductor wafers can be shortened, so that the production lead time of semiconductor wafers can be shortened.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing an example of a case of performing between two steps in an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a coping method in the case where the transport time is longer than the predicted end processing time in another embodiment of the present invention.

FIG. 3 is a diagram showing a connection between respective steps in a conventional semiconductor wafer production line.

FIG. 4 is a diagram showing a flow of a conventional semiconductor wafer through a processing step and completion of processing.

[Explanation of Codes] A1 processing time A2 transfer time A3 pre-processing internal setup time A4 processing time A5 pre-processing external setup time A6 processing end A7 product flow A8 actual time A9 estimated time K1 to K2 process B1 processing start B2 processing end B3 Transport start B4 Transport time B5 Processing time B6 Free time L1 to L5 Lots C1 to C8 Process in1 Input out1 Storage D1 Transport time D2 Processing pre-setup time D3 Processing time D4 Processing end D5 Processing start D6 Processing post-processing D7 To next process Transport time D8 Free time L6 to L7 Semiconductor wafer

Claims (1)

[Claims] 1. In a semiconductor wafer production line comprising a plurality of processing steps, at the start of semiconductor wafer processing, the time at which the semiconductor wafer processing is completed at the present manufacturing apparatus is the time (actual value) required for the past processing. Predict based on
By the predicted semiconductor wafer processing completion time, the semiconductor wafer to be processed next by the manufacturing equipment is transported to the manufacturing equipment, and the necessary setup before and after the processing is completed, and at the same time as the semiconductor wafer processing is completed, the next semiconductor wafer is processed. The method for producing a semiconductor wafer, which is characterized in that the flow of the semiconductor wafer in the semiconductor wafer production line is optimized by performing the process of.