JPH06284005A - Phase synchronizing oscillation circuit - Google Patents

Abstract

PURPOSE:To evade a step-out state even when the oscillation frequency of the phase synchronizing oscillation circuit including a voltage-controlled oscillator generating an output signal of frequency corresponding to the voltage level of an inputted control voltage is switched. CONSTITUTION:Charging and discharging operation is carried out in a pulling-in circuit 10 in response to a command for the switching of the oscillation circuit of this circuit by a channel switch 7. Consequently, this circuit varies the voltage level of the control voltage 8 within a specific voltage level range including a voltage level at which the circuit enters a synchronized state. This circuit, therefore, enters the synchronized state when the voltage level of the control voltage 8 becomes equal to the voltage level at which the circuit enters the synchronized state. The synchronized state is securely entered even when the capture range of a phase comparator 4 is narrow.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase locked oscillator circuit, and more particularly to a phase locked oscillator circuit capable of changing the oscillation output frequency of its own circuit.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 3, a phase locked oscillator circuit of this type includes a voltage controlled oscillator 1 for generating an output signal having a frequency corresponding to the voltage level of an input control voltage. A frequency divider 3 that divides the output signal to the oscillation frequency of the reference oscillator 2, a phase comparator 4 that compares the frequency of the frequency-divided output signal of the frequency divider 3 with the output signal of the reference oscillator 2, and a phase-locked oscillator. Loop filter 5 that determines the loop band of
It is configured to include and.

Furthermore, the conventional phase-locked oscillator circuit has a channel switch 7 for changing the frequency division number of the frequency divider 3 in order to change the output signal frequency at the output terminal 6 of the circuit itself.

As the phase comparator 4, a phase frequency comparator having a wide capture range is usually used. However, in the phase noise characteristic of the phase locked oscillator, the noise component occupied by this phase frequency comparator is large. Therefore, for the purpose of reducing this, the phase comparator 4 has an exclusive OR logic gate in which semiconductors that are noise sources are few and detection sensitivity is high as compared with the phase frequency comparator.
May be used as.

According to this structure, an output signal having a constant frequency is sent out from the output terminal 6.

[0006]

When changing the output frequency of the phase-locked oscillator circuit, the number of divisions of the frequency divider 3 may be changed by the channel switch 7. However, in this case, there is a drawback that phase synchronization is lost when the frequency division number is switched. Furthermore, when an exclusive OR type phase comparator with a narrower capture range than the phase frequency comparator is used, there is a drawback that the phase synchronization cannot be pulled in and the state becomes out of synchronization. .

The present invention has been made to solve the above-mentioned conventional drawbacks, and an object of the present invention is to provide a phase-locked oscillation circuit which does not become out of synchronization even when the output frequency is changed. .

[0008]

A phase-locked oscillator circuit according to the present invention is a phase-locked oscillator circuit having voltage-controlled oscillator means for generating an output signal having a frequency corresponding to the voltage level of an input control voltage. It is characterized by further comprising voltage level changing means for changing the control voltage within a predetermined voltage level range including a voltage level at which the own circuit becomes in a synchronous state in response to a command for switching the oscillation frequency of the own circuit.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 shows a phase-locked oscillator according to an embodiment of the phase-locked oscillator circuit according to the present invention, and the same parts as those in FIG. 3 are designated by the same reference numerals. In the figure, the circuit of the present embodiment is different from the conventional circuit in that a trigger pulse circuit 9 that outputs a pulse signal in response to a switching signal in the channel switch 7 and a voltage in response to this output pulse signal are used. The point is that a pull-in circuit 10 for changing the voltage level of the control voltage 8 input to the controlled oscillator 1 is added.

The pull-in circuit 10 responds to the pulse signal from the trigger pulse circuit 9 and is turned on for a moment, and the switching transistor 11 is charged when the transistor 11 is turned on, and thereafter discharges. A time constant circuit including a capacitor 14 and a resistor 13, a power supply 15 for charging the capacitor 14, and a diode 12 for preventing backflow from the control voltage 8 are included.

The operation of the circuit of this embodiment having such a configuration will be described with reference to FIGS. 1 and 2. The oscillation signal of the voltage controlled oscillator 1 is divided by the frequency divider 3 to the frequency of the reference oscillator 2. The frequency-divided output signal is phase-compared with the oscillation signal of the reference oscillator 2 by the exclusive-OR phase comparator 4. Then, a voltage corresponding to the phase difference is applied as a control voltage 8 to a varactor diode (not shown) in the voltage controlled oscillator 1 via the loop filter 5. As a result, a stable oscillation signal phase-locked with the reference oscillator 2 is output from the output terminal 6.

Next, in order to change the frequency of the output signal from the output terminal 6, the channel switch 7 changes the frequency division number of the frequency divider 3. When the frequency division number is switched, the frequency division output signal has a frequency different from that of the oscillation signal of the reference oscillator 2, so that the phase synchronization is lost. The voltage level characteristic of the control voltage 8 at this time is shown in C of FIG. As shown, the voltage level in the out-of-phase state is Vc.

After that, the trigger pulse circuit 9 outputs a pulse signal in response to the switching signal of the channel switch 7.
This pulse signal turns on the switching transistor 11 in the pull-in circuit 10 at time T. As a result, the voltage level of the control voltage 8 becomes Va via the diode 12. Then, the resistor 1 in the pull-in circuit 10
3 and the time constant of the capacitor 14, the control voltage level changes from the voltage level Va to the voltage level Vd of the power supply 15 with the characteristics of the curves a and d.

However, when the voltage level is changed to the voltage level Vb which is in the phase locked state, the state of the characteristic curve a changes to the state of b and the phase locked state is established. Thus, even when the channel is switched, the pull-in circuit can forcibly pull in the phase locked state.

Therefore, if the exclusive OR phase comparator 4 is used as the phase comparator, it is possible to construct a phase-locked oscillation circuit which is not out of phase synchronization and has less phase noise.

Now, each voltage level in FIG. 2 will be described. In FIG. 2, as described above, the time constant circuit causes a synchronous state while the voltage level changes from Va to Vd as shown by curves a and d, and the control voltage level is stable at Vb. That is, the control voltage level is changed within the voltage level range (the range from Va to Vd) including the voltage level Vb at which the phase locked oscillator circuit itself becomes in the synchronized state.

In short, by oscillating the control voltage of the voltage controlled oscillator before and after the voltage level of the control voltage in which the own circuit is in the synchronized state, even if a phase comparator with a narrow capture range is used, a stable synchronized state is ensured. Is obtained.

The time constant and the voltage value of the power supply 15 are selected according to the value of Vb, and V is within the range from Va to Vd.
It is necessary to include b.

[0020]

As described above, according to the present invention, the voltage level of the control voltage of the voltage controlled oscillator circuit is forced to be the phase synchronization voltage by the pull-in circuit when the channel is switched, so that the output signal frequency is stable. There is an effect that an output signal phase-locked with is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a phase locked oscillator circuit according to an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing a change in control voltage input to the voltage controlled oscillator shown in FIG.

FIG. 3 is a block diagram showing a configuration of a conventional phase locked oscillator circuit.

[Explanation of symbols]

 1 Voltage Controlled Oscillator 2 Reference Oscillator 3 Divider 4 Phase Comparator 5 Loop Filter 7 Channel Switch 9 Trigger Pulse Circuit 10 Pull-in Circuit

Claims (2)

[Claims] 1. A phase-locked oscillating circuit having voltage-controlled oscillating means for generating an output signal having a frequency corresponding to a voltage level of an input control voltage, said self-locking oscillating circuit responding to an oscillation frequency switching command of its own circuit. 2. A phase-locked oscillator circuit comprising a voltage level changing means for changing the control voltage within a predetermined voltage level range including a voltage level at which the circuit is in a synchronized state. 2. The phase according to claim 1, wherein the voltage level changing means includes a time constant circuit for changing the voltage level of the control voltage by performing a charging / discharging operation in response to the switching command. Synchronous oscillator circuit.