JPH06283636A - Lead frame for semiconductor device and manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a lead frame for semiconductor devices which can uniform the thickness of a brazing material between its upper and lower frames and a semiconductor chip without using any exclusively used jig and has excellent mass-productivity. CONSTITUTION:The lead frame has a lower frame 1 having a center bar 5 connected in parallel with a left and right frame bars 2 and 3 with tie bars 4 and a pair of semiconductor chip mounted sections 6 and 7 which are united with the bars 2 and 3 symmetrical with respect to the center bar 5. The lead frame is also provided with a center bar 9 having such a shape that can be put on the center bar 5 and tie bars 4 and upper frame 8 having a plurality of pairs of semiconductor chip connecting terminals 10 and 11 integrally formed with the center bars 9 at positions corresponding to the sections 6 and 7. Since this lead frame is constituted in axial symmetry in such a way, the load of the upper frame 8 is applied to a brazing material in a well balanced state and the thickness of the brazing material becomes uniform after spot welding.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame of a semiconductor device and a method of manufacturing the semiconductor device, and more particularly to a lead frame of a surface mounting type semiconductor device which is excellent in mass productivity and a surface mounting using the lead frame. Type semiconductor device manufacturing method.

[0002]

2. Description of the Related Art A lead frame alignment structure is disclosed in JP-A-58-216448 and JP-A-47-47.
27679, JP-A-63-281451,
JP-A-52-86067, JP-A-55-2765
There are techniques described in Japanese Patent Laid-Open No. 5 and Japanese Patent Laid-Open No. 60-74459. Each of these conventional techniques has a structure in which the lead frame is aligned by the holes, or the holes and the protrusions.

However, there are some which do not correspond to the structure in which the semiconductor chip is sandwiched between the upper and lower lead frames, and even if it corresponds, the consideration for making the thickness of the brazing material uniform was not sufficient. .

[0004]

In a surface mount type semiconductor device having a structure in which a semiconductor chip is sandwiched between upper and lower lead frames, the thickness of the brazing material is such that when the semiconductor device is incorporated into an actual circuit and operated, the power cycle of the semiconductor device is increased. It is directly related to the tolerance. Therefore, in order to manufacture a more uniform and highly reliable surface mount semiconductor device, it is necessary to maintain the space between the upper and lower lead frames and the semiconductor chip within a predetermined range by some method.

In the above prior art, a dedicated jig is used in order to make the thickness of the brazing material between the upper and lower lead frames and the semiconductor chip uniform. This dedicated jig cannot be removed until the semiconductor chip is fixed to the lead frame with a brazing material or the like, which is one of the causes of lowering the mass productivity.

It is an object of the present invention to make the thickness of a brazing filler metal between the upper and lower lead frames and the semiconductor chip uniform without using a dedicated jig, and thus the lead frame and the semiconductor of the semiconductor device excellent in mass productivity. A method of manufacturing a device is provided.

[0007]

In order to achieve the above-mentioned object, the present invention has a first center bar which is partially connected to a frame frame and a tie bar at the center of the left and right frame frames and which is parallel to the frame frame. A lower frame having a pair of semiconductor chip mounting portions which are line-symmetric with respect to the first center bar on an axis perpendicular to the longitudinal direction of the frame frame and which are respectively integrated with the frame frame, and the first center bar and the tie bar of the lower frame. Has a second center bar that fits with
A semiconductor comprising an upper frame having a plurality of pairs of semiconductor chip connection terminals, each of which is arranged at a position corresponding to the semiconductor chip mounting portion of the lower frame on an axis perpendicular to the second center bar and which is integrated with the second center bar. We propose a lead frame for the device.

The longitudinal end portion of the second center bar of the upper frame is cut into a length that abuts against the end surface of the tie bar of the lower frame and determines the longitudinal position of the upper frame.

In order to achieve the above-mentioned object, the present invention further comprises a first center bar which is partially connected to the frame frame at the center of the left and right frame frames by a tie bar and is parallel to the frame frame. First on the axis perpendicular to the longitudinal direction
A lower frame having a pair of semiconductor chip mounting portions which are line-symmetric with respect to the center bar and are each integrated with the frame, and a second frame having a shape to pass over the first center bar and the tie bar of the lower frame and fit with the first center bar and the tie bar. It has a center bar, and has a plurality of pairs of semiconductor chip connection terminals which are arranged on the axis perpendicular to the second center bar at positions corresponding to the semiconductor chip mounting portions of the lower frame and which are each integrated with the second center bar. A lead frame for a semiconductor device including a long upper frame is proposed.

In order to achieve the above-mentioned object, the present invention further has a tie bar that partially connects the left and right frame frames, and the left and right frame frames are respectively provided on the axes perpendicular to the longitudinal direction of the frame frame. A lower frame having a plurality of pairs of semiconductor chip mounting portions, and a second center bar having a shape fitting with a tie bar of the lower frame, and the semiconductor chip of the lower frame on an axis perpendicular to the second center bar. A lead frame for a semiconductor device is proposed, which includes an upper frame having a plurality of pairs of semiconductor chip connection terminals, each of which is arranged at a position corresponding to the mounting portion and is integrated with the second center bar.

In this case as well, the longitudinal end of the second center bar of the upper frame can be cut into a length that contacts the tie bar of the lower frame and determines the longitudinal position of the upper frame.

In order to achieve the above object, the present invention has a tie bar that partially connects the left and right frame frames, and is integrated with the left and right frame frames on the axis perpendicular to the longitudinal direction of the frame frame. A lower frame having a plurality of pairs of semiconductor chip mounting portions, and a second center bar having a shape to fit over the tie bar of the lower frame and to fit the tie bar,
A long upper frame having a pair of a plurality of semiconductor chip connecting terminals, each of which is arranged at a position corresponding to the semiconductor chip mounting portion of the lower frame on the axis perpendicular to the center bar and is integrated with the second center bar. We propose a lead frame for semiconductor devices.

In any of the lead frames of the semiconductor device, the lower frame and the upper frame are provided with at least three semiconductor chip mounting portions and semiconductor chip connection terminals on the axis perpendicular to the longitudinal direction of the left and right frame frames. be able to.

In order to achieve the above object, the present invention also sets a brazing material on the semiconductor chip mounting portion of the lower frame, sets the semiconductor chip, sets the brazing material on the semiconductor chip, and sets the brazing material on the center of the upper frame. Set the upper frame by combining the bar and the center bar of the lower frame and the tie bar or only the tie bar, then point weld the center bar or tie bar of the lower frame to the center bar of the upper frame, melt the brazing material, and melt the semiconductor chip. A method of manufacturing a semiconductor device is proposed in which a mounting portion, a semiconductor chip, and a semiconductor chip connection terminal are soldered together.

If a passive element is arranged between the chip mounting portion of the lead frame and the chip connection terminal instead of the semiconductor element, a surface mount type passive component can be manufactured.

[0016]

In the present invention, the center bar and tie bar of the lower frame are aligned with the center bar of the upper frame, for example, ∩-shaped, and the upper and lower frames are fixed by point welding or the like. As a result, the jig for aligning the upper and lower frames and the semiconductor chip is no longer needed at the stage of brazing the semiconductor chip. Moreover, with respect to the center bar per axis, since the lead frame has a line-symmetric structure, the load of the upper frame is applied in a well-balanced manner and the thickness of the brazing material is made uniform. In addition, it is possible to manufacture at least twice as many semiconductor elements at a time as compared with the conventional case. That is, it is possible to obtain a highly reliable lead frame of a surface mounting type semiconductor device which is excellent in mass productivity and a method of manufacturing a surface mounting type semiconductor device.

[0017]

Embodiments Next, with reference to FIGS. 1 to 12, an embodiment of a method for manufacturing a lead frame of a surface mount type semiconductor device and a surface mount type semiconductor device according to the present invention will be described.

FIG. 1 is a plan view showing an example of the structure of the lower frame of the lead frame of the surface mount semiconductor device according to the present invention. The lower frame 1, which serves as an anode (or cathode) electrode, includes frame frames 2 and 3 and a tie bar 4.
The center bar 5 integrally connected to the frame frames 2 and 3, and the semiconductor chip mounting portions 6 forming a pair with each other.
It consists of 7. The semiconductor chip mounting portions 6 and 7 are arranged so that the frame frames 2 and 3 are arranged in line symmetry with respect to the center bar 5.
It is arranged in a right angle direction.

FIG. 2 is a plan view showing an example of the structure of the upper frame in the lead frame of the surface mount type semiconductor device according to the present invention. The upper frame 8 serving as a cathode (or anode) electrode is used in combination with the lower frame 1 of FIG. The upper frame 8 is a ∩-shaped center bar 9
And semiconductor chip connection terminals 10 and 11 forming a pair with each other. The ∩-shaped center bar 9 is combined with the center bar 5 and the tie bar 4 of the lower frame 1 and plays a role of alignment when manufacturing a semiconductor device. The connection terminals 10 and 11 with the semiconductor chip are arranged at right angles from the ∩-shaped center bar 9 so as to come to positions corresponding to the semiconductor chip mounting portions 6 and 7 of the lower frame 1.

These upper frame 8 and lower frame 1
Is generally manufactured by pressing or the like using a copper plate-based or iron plate-based material having a thickness of about 0.2 mm.

FIG. 3 is a perspective view showing an assembled state of the surface mount type semiconductor device using the lower frame 1 of FIG. 1 and the upper frame 8 of FIG. 2 during manufacturing, and FIG. 4 is a lower view of FIG. FIG. 5 is a plan view showing a state after the frame 1 and the upper frame 8 are aligned with each other, and FIG.
FIG. 6 is a plan view showing an example of the structure of the manufactured surface-mounting semiconductor device, and FIG. 7 is a cross-sectional view taken along the line A in FIG.
It is a figure which shows the cross section which follows the BB line of the surface mount type semiconductor device.

The lower frame 1 of FIG. 1 and the upper frame 8 of FIG.
In order to manufacture a surface-mount type semiconductor device using
As shown in FIG.
The brazing filler metal 13 is set on 7, the semiconductor chip 12 is set, and the paste solder 14 is set thereon. Next, as shown in FIGS. 4 and 5, the upper frame 8 is set by combining the ∩-shaped center bar 9 of the upper frame 8 with the center bar 5 and the tie bar 4 of the lower frame 1.

Further, in order to fix the center bar 5 of the lower frame 1 and the ∩-shaped center bar 9 of the upper frame 8, the center bar 5 and the ∩-shaped center bar 9 are point-welded at two points, for example. After that, let it pass through the heating furnace,
The brazing material 13 and the paste solder 14 are melted, and the semiconductor chip mounting portions 6 and 7, the semiconductor chip 12, and the semiconductor chip connection terminals 10 and 11 are soldered. Next, the periphery of the semiconductor chip 12 is sealed with an epoxy resin 15 or the like.

Finally, the center bar 5 of the lower frame 1
The tie bar 4, the frame frames 2 and 3 are separated, and the ∩-shaped center bar 9 of the upper frame 8 is also separated, and the terminal portion protruding from the semiconductor chip mounting portions 6 and 7 to the outside of the resin 15 is formed into a predetermined shape. Then, as shown in FIGS. 6 and 7, the surface mount semiconductor device according to the present invention is completed.

FIG. 8 is a view showing a modification regarding the shapes of the alignment portions of the center bar 5 and the center bar 9, which are structural features of the lower frame 1 and the upper frame 8 of the embodiment shown in FIG. In this embodiment, the center bar 5 and the center bar 9 have a V-shaped cross section.
Also in this embodiment, the same effects as those of the embodiments of FIGS. 1 to 3 can be obtained with respect to the alignment and the uniformization of the brazing material thickness.

FIG. 9 is a diagram showing a modification of the shapes of the center bar 5 and the alignment portion of the center bar 9, which are structural features of the lower frame 1 and the upper frame 8 of the embodiment shown in FIG. In this embodiment, the center bar 5 and the center bar 9 have a semicircular cross section.
Also in this embodiment, the same effects as those of the embodiments of FIGS. 1 to 3 can be obtained with respect to the alignment and the uniformization of the brazing material thickness.

FIG. 10 is a perspective view showing the structure of the alignment portion between the upper frame 8 and the lower frame 1 of the embodiment in which the upper frame 8 is continuously formed as a long product. The ∩-shaped center bar 9 of the upper frame 8 is the tie bar 4 of the lower frame 1.
The present invention can be applied even when the upper frame 8 is continuously formed as a long object by making only the portion that intersects with the flat surface. Also in this embodiment, the same effects as those of the embodiments of FIGS. 1 to 3 can be obtained with respect to the alignment and the uniformization of the brazing material thickness.

FIG. 11 is a perspective view showing the structure of the alignment portion between the upper frame 8 and the lower frame 1 of another embodiment in which the upper frame 8 is continuously formed as a long product. In this embodiment, the center bar 9 of the upper frame 8 and the tie bar 4 of the lower frame 1 are aligned with each other at a position where they are fitted to each other, and the center bar 5 of the lower frame 1 is omitted. As described above, even if the center bar 5 of the lower frame 1 is not provided, the same effects as those of the embodiments of FIGS. 1 to 3 can be obtained with respect to the alignment and the uniformization of the thickness of the brazing material.

The embodiment of FIG. 11 is a case where the center bar 9 is a long one, but the center bar 9 is cut at the center of the portion intersecting with the tie bar 4, that is, the ∩ character, and the same as the embodiment of FIG. Even if the length is set to, the same effect as that of the embodiment of FIG. 11 can be obtained.

In each of the above examples, 2 per axis is used.
This is an example of manufacturing individual surface mount semiconductor devices. On the other hand, FIG. 12 is a diagram showing an embodiment for manufacturing four surface-mounting type semiconductor devices per axis.

Conventionally, since the lead frame per axis was not line-symmetrical, the load on the upper frame was unbalanced, the thickness of the brazing material was uneven, and it was difficult to secure the flatness as a whole. Therefore, it has not been practically possible to manufacture a plurality of surface mount semiconductor devices per axis.

On the other hand, in this embodiment, the center bar 5 and the tie bar 4 of the lower frame 1 are aligned with the center bar 9 of the upper frame 8 and the upper and lower frames 8 and 1 are fixed by point welding or the like. Therefore, at the stage of brazing the semiconductor chip 12, the upper and lower frames 8
The jigs for aligning 1 and 1 and the semiconductor chip 12 are
It is no longer needed. Moreover, with respect to the center bars 5 and 9 for each axis, since the lead frame has a line-symmetric structure, the load of the upper frame 8 is applied in a well-balanced manner, and the thickness of the brazing material is made uniform. Therefore, a highly reliable surface mount semiconductor device can be mass-produced.

Also in this embodiment, the center bar 5 and ∩
Point welding with the character-shaped center bar 9 provides the same effect as that of the embodiment shown in FIGS. 1 to 3 in terms of alignment and uniformization of the thickness of the brazing material.

From the embodiment shown in FIG. 12, n per axis
A modification for manufacturing a single surface-mount semiconductor device can be easily imagined.

Further, although the above-mentioned embodiment relates to the structure of the surface-mounting type semiconductor device, the surface-mounting type semiconductor device is mounted by mounting passive elements such as resistors and capacitors instead of the semiconductor chip on the semiconductor chip mounting portion. It goes without saying that the present invention is also effective when manufacturing the passive component of 1.

[0036]

According to the present invention, since the center bar and tie bar of the lower frame and the center bar of the upper frame can be aligned and the upper and lower frames can be fixed by point welding or the like, at the stage of brazing the semiconductor chip. The jig for aligning the upper and lower frames and the semiconductor chip is no longer necessary. Moreover, with respect to the center bar per axis, since the lead frame has a line-symmetric structure, the load of the upper frame is applied in a well-balanced manner and the thickness of the brazing material is made uniform. Therefore, it is possible to obtain a highly reliable lead frame of a surface-mounting semiconductor device which is excellent in mass productivity and a method of manufacturing the surface-mounting semiconductor device.

[Brief description of drawings]

FIG. 1 is a plan view showing an example of a structure of a lower frame in a lead frame of a surface mount semiconductor device according to the present invention.

FIG. 2 is a plan view showing an example of a structure of an upper frame in the lead frame of the surface mount semiconductor device according to the present invention.

3 is a perspective view showing an assembled state of a surface mount semiconductor device using the lower frame of FIG. 1 and the upper frame of FIG. 2 during manufacturing.

FIG. 4 is a plan view showing a state after the lower frame and the upper frame in FIG. 3 are aligned.

5 is a view showing a cross section of the lower frame and the upper frame of FIG. 4 taken along the line AA.

FIG. 6 is a plan view showing an example of a structure of a manufactured surface-mount type semiconductor device.

7 is a diagram showing a cross section taken along line BB of the surface-mounted semiconductor device of FIG.

FIG. 8 is a diagram showing a modification regarding the shapes of the center bar and the alignment portion of the center bar, which are structural features of the lower frame and the upper frame of the embodiment of FIG. 1;

FIG. 9 is a diagram showing a modification regarding the shapes of the center bar and the alignment portion of the center bar, which are structural features of the lower frame and the upper frame of the embodiment of FIG. 1;

FIG. 10 is a perspective view showing a structure of an alignment portion between an upper frame and a lower frame of an embodiment in which the upper frame is continuously formed as a long object.

FIG. 11 is a perspective view showing a structure of an alignment portion between an upper frame and a lower frame of another embodiment in which the upper frame is continuously formed as a long product.

FIG. 12 is a diagram showing an example of manufacturing four surface-mounting type semiconductor devices per axis.

[Explanation of symbols]

 1 Lower Frame 2 Frame Frame 3 Frame Frame 4 Tie Bar 5 Center Bar 6 Semiconductor Chip Mounting Area 7 Semiconductor Chip Mounting Area 8 Upper Frame 9 Center Bar 10 Semiconductor Chip Connecting Terminal 11 Semiconductor Chip Connecting Terminal 12 Semiconductor Chip 13 Brazing Material 14 Paste Solder 15 resin

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kazuo Yoneyama 3-10-2 Bentencho, Hitachi-shi, Ibaraki Hitachi Haramachi Electronics Co., Ltd. (72) Inventor Minoru Sugano 3-10-10 Bentencho, Hitachi-shi, Ibaraki No. 2 Inside Hitachi Haramachi Electronics Co., Ltd. (72) Inventor Atsushi Tsuruoka 3-10-2 Bentencho, Hitachi City, Ibaraki Prefecture No. 2 inside Hitachi Haramachi Electronics Co., Ltd. (72) Inventor Tomohide Hashimoto Three Bentencho, Hitachi City, Ibaraki Prefecture 10-2 No. 2 in Hitachi Haramachi Electronics Co., Ltd. (72) Inventor Kazutoyo Narita 3-1-1 1-1 Saiwaicho, Hitachi City, Ibaraki Hitachi Ltd. Hitachi factory

Claims (10)

[Claims] 1. A first center bar, which is partially connected to the frame frame by a tie bar at the center of the left and right frame frames and is parallel to the frame frame, has an axis perpendicular to the longitudinal direction of the frame frame. A lower frame that is line-symmetric with respect to the first center bar and has a plurality of pairs of semiconductor chip mounting portions that are respectively integrated with the frame frame; and a second center having a shape that fits with the first center bar and the tie bar of the lower frame. A pair of a plurality of semiconductor chip connection terminals each having a bar and arranged at a position corresponding to the semiconductor chip mounting portion of the lower frame on an axis perpendicular to the second center bar and being integrated with the second center bar. A lead frame for a semiconductor device, which comprises an upper frame having the same. 2. The lead frame of a semiconductor device according to claim 1, wherein an end portion of the upper frame in the longitudinal direction of the second center bar is in contact with an end surface of the tie bar of the lower frame. A lead frame for a semiconductor device, which is cut into a length that determines a position in a longitudinal direction. 3. A first center bar, which is partially connected to the frame frame by a tie bar at the center of the left and right frame frames and is parallel to the frame frame, and which is on an axis perpendicular to the longitudinal direction of the frame frame. A lower frame having a pair of semiconductor chip mounting portions that are line-symmetric with respect to the first center bar and are respectively integrated with the frame frame; and a first center bar that passes over the first center bar and the tie bar of the lower frame, A second center bar having a shape fitting with the tie bar,
From an elongated upper frame having a pair of semiconductor chip connection terminals, each of which is arranged at a position corresponding to the semiconductor chip mounting portion of the lower frame on an axis perpendicular to the center bar and is integral with the second center bar. Lead frame for semiconductor devices. 4. A pair of a plurality of semiconductor chip mounting portions, each of which has a tie bar that partially connects the left and right frame frames, and is integrated with the left and right frame frames on an axis perpendicular to a longitudinal direction of the frame frame. And a second center bar having a shape fitting with the tie bar of the lower frame, and at a position corresponding to the semiconductor chip mounting portion of the lower frame on an axis perpendicular to the second center bar. A lead frame for a semiconductor device, comprising: an upper frame having a plurality of pairs of semiconductor chip connection terminals, each of which is arranged and integrated with the second center bar. 5. The lead frame of a semiconductor device according to claim 4, wherein an end portion of the second center bar of the upper frame in a longitudinal direction abuts on the tie bar of the lower frame, and a longitudinal direction of the upper frame. A lead frame for a semiconductor device, which is cut into a length that determines the position of the lead frame. 6. A pair of a plurality of semiconductor chip mounting portions each having a tie bar that partially connects the left and right frame frames, and each of which is integrated with the left and right frame frames on an axis perpendicular to the longitudinal direction of the frame frame. And a second center bar having a shape which fits over the tie bar of the lower frame and fits over the tie bar of the lower frame, and is mounted on the semiconductor chip mounting portion of the lower frame on an axis perpendicular to the second center bar. A lead frame of a semiconductor device, comprising: a long upper frame having a plurality of pairs of semiconductor chip connection terminals which are arranged at corresponding positions and are respectively integrated with the second center bar. 7. The lead frame of a semiconductor device according to claim 1, wherein the lower frame and the upper frame are on an axis perpendicular to a longitudinal direction of the left and right frame frames. At least 3
A lead frame for a semiconductor device, comprising: a semiconductor chip mounting portion and a semiconductor chip connection terminal. 8. A method of manufacturing a semiconductor device using a lead frame according to claim 1, wherein a brazing material is set on the semiconductor chip mounting portion of the lower frame, and a semiconductor chip is set. , A brazing material is set thereon, and the center bar of the upper frame and the center bar and tie bar of the lower frame or only the tie bar are combined to set the upper frame, and the center bar of the lower frame is set. Alternatively, a tie bar and the center bar of the upper frame are point-welded, the brazing material is melted, and the semiconductor chip mounting portion, the semiconductor chip, and the semiconductor chip connection terminal are soldered. Manufacturing method. 9. A semiconductor device comprising the lead frame according to claim 1. 10. A passive component formed by disposing a passive element between the chip mounting portion and the chip connection terminal of the lead frame according to claim 1.