JPH06276543A - Video signal processing circuit - Google Patents

Abstract

PURPOSE:To obtain the digital processing circuit in which an actual level not being a fixed level is applied to a pedestal level with respect to a brightness signal and a blanking level to color difference signals in the digital processing of the video signal in a color television receiver or the like. CONSTITUTION:The video signal processing circuit is provided with a 1st A/D converter 2 which converts an analog brightness signal subject to clamp processing and R-Y color difference signals or the like into digital signals, a 2nd A/D converter 6 using a common power supply B to that of the 1st A/D converter 6 converting an analog brightness signal subject to clamp processing and R-Y color difference signals or the like into digital signals and a latch circuit T extracting a pedestal level from the brightness signal from the 2nd A/D converter 6 and a blanking level respectively from the R-Y color difference signal and the B-Y color difference signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a processing circuit for adding a pedestal level to a luminance signal and a blanking level to a color difference signal in digital processing of a video signal in a color television receiver or the like.

[0002]

2. Description of the Related Art Conventionally, in a color television receiver using a digital signal processing technique, in order to save the capacity of an image memory used, only a video signal portion in an input video signal is stored and the other portion (synchronization signal is Blanking period including) there was something that does not memorize. In this case, the pedestal level of the luminance (Y) signal and the color difference (RY, B)
The blanking level data of the (-Y) signal is inserted (added) as a fixed value of the digital data at the final stage of the digital signal processing circuit. A block diagram of this method is shown in FIG. That is, the pedestal level and the blanking level generated by the fixed level generation unit 34 in the level adding circuit 33 in the processing line of the video signal are added to the luminance signal and the color difference signal, respectively.

The method of FIG. 3 has the following drawbacks. Hereinafter, this defect will be described with reference to FIG. The analog input composite video signal is separated into a luminance signal (Y) and a color difference signal (RY, BY) in the input processing unit 31, and then subjected to processing such as pedestal clamp processing and level adjustment and A / D conversion. The digital signal is converted by the device 32.
If the reference voltage (+ B) given to the A / D converter 32 changes for some reason during D conversion, even if the pedestal level of the video signal is stable, A / D converted digital data is obtained. The output will be different from the original one, and the correct image cannot be reproduced. In FIG. 4, when (A) is the input signal (S32) of the A / D converter 32 and (B) is the normal A / D conversion range of the S32, the A / D converter 32 receives the signal as described above. For example, when the applied reference voltage (+ B) drops, the A / D conversion range is A / D converted in a state of being shifted as compared with (B), as shown in (C). Therefore, the pedestal level (FIG. A) is also A / D converted at a level different from the normal level. This is because the voltage drop causes the reference level (OOH
This is because the pedestal level (d1) for) becomes d2 due to the fall of the reference level (OOH) as shown in FIG.

On the other hand, since the pedestal level and the like added by the level adding circuit 33 (FIG. 3) are the levels (level generation unit 34) generated on the assumption of the above-mentioned normal d1, the pedestal relatively different from the original one. You have added a level. Further, the same thing as the above pedestal occurs with respect to the blanking level in the color difference signal (Fig. A-2B).
In the above, the case of A / D conversion is taken as an example. However, even when the pedestal clamp processing in the input processing unit 31 changes, the video signal becomes different from the original one. Such a problem occurs because the level added in the subsequent circuit is fixed.

[0005]

The present invention is based on the above A /
An object of the present invention is to provide a video signal processing circuit which reproduces a correct video even when the reference voltage applied to the D converter changes or when the clamp potential of the input video signal changes.

[0006]

According to a first aspect of the present invention, a clamped analog luminance signal and RY and BY color difference signals are converted into digital signals and output to a subsequent signal processing circuit. In the video signal processing circuit provided with the A / D converter, the clamped analog luminance signal and the R-Y and BY color difference signals are converted into digital signals. Second A / D converter having a common power source with the A / D converter of
A latch circuit for extracting a pedestal level from the luminance signal from the D / D converter, extracting a blanking level from the RY color difference signal, and extracting a blanking level from the BY color difference signal; First A
For each signal digitized by the / D converter,
The pedestal level from the latch circuit is added to the luminance component, the blanking level of the RY color difference signal is added to the RY color difference component, and the blanking level of the BY color difference signal is added to the BY color difference component. A video signal processing circuit configured to do so is provided.

[0007]

The analog luminance signal and color difference signal clamped by the existing first A / D converter and the second A / D converter used as a common power source are converted into digital signals. The latch circuit extracts the pedestal level from the luminance signal from the A / D converter and the blanking level from each of the RY and BY color difference signals. The pedestal level from the latch circuit is added to the luminance component and the blanking level is added to each color difference component to the respective signals obtained by digitizing the clamped analog luminance signal and color difference signal.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A video signal processing circuit according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of essential parts showing an embodiment of a video signal processing circuit according to the present invention, and FIG. 2 is a timing chart and the like for explaining FIG. In FIG. 1, S1 is an analog input composite video signal, and 1 is the video signal S1 which is a luminance signal (Y) and color difference signals (RY, B).
-Y), an input processing unit that performs a clamp process, a level adjustment process, and the like, a first A / D converter that converts an analog signal from the input processing unit 1 into a digital signal, and 3
Is a digital processing unit for performing digital processing (three-dimensional Y / C separation, horizontal scanning frequency conversion, etc.) on the digital video signal converted by the first A / D device 2, and 4 is a pedestal for a signal from the digital processing unit 3. An additional circuit 5 for adding level data and blanking level data D / A for returning a digital signal from the additional circuit to an analog signal
A converter, 6 is a second A / D converter for converting the signal from the input processing unit 1 into a digital signal, and 7 is a second A / D
It is a latch circuit for extracting the pedestal level and the blanking level from the digital video signal converted by the converter 6.

Next, the operation of the present invention will be described. The form of the input video signal S1 and the essential functions of each block from the input processing unit to the D / A converter (reference numerals 1 to 5) are the same as in FIG. In addition, the A / D converter is connected to the first and second 2
The blocks are provided separately because the required performances of both are different. That is, since the first A / D converter 2 is used for processing the video signal itself in the subsequent circuit, high speed is required, while the second A / D converter 6 is for extracting the clamp level. Therefore, the low speed type can be used. The first A / D converter 2 and the second A / D converter 6 have the same power supply (+ B). As a result, even if the power supply fluctuates, the first A / D converter 2 output and the second A / D converter 6 output do not relatively fluctuate. Second A /
A latch circuit 7 extracts a pedestal level and a blanking level from a signal obtained by digitizing the signals in the blacking period and the video period by the D converter 6. Therefore, the latch circuit 7 is specifically composed of three for extracting the pedestal level and for extracting each of the RY and BY color difference signals, each of which is a flip-flop (D type) having the same function. is there. This flip-flop is shown in FIG.

FIG. 2 (A) conceptually shows extraction of the pedestal level, and FIG. 2 (B) conceptually shows extraction of the blanking level. In FIG. A, (a) is an analog video signal (the dotted line portion is a horizontal synchronizing signal but does not actually exist as the output of the second A / D converter), and (b) is (a). The second digital signal of
Which is the output of the A / D converter 6 of FIG. 3 and becomes the D terminal input signal of FIG. C, and (c) is the clock (CLK) signal used for the flip-flop of FIG. It is a pulse that rises inside. As a result, the flip-flop in FIG. C shows the data Dc when the clock pulse is applied.
To the Q terminal and latch the level until the next clock pulse is input. The above is the extraction of the pedestal level.

The blanking level is taken out in the same manner. That is, in FIG. B, (a) is a color difference signal shown in analog, (b) is a digitized signal (a) of the (a) (second A / D converter output), and (c) is a clock pulse, It is a pulse that rises in phase in the blanking period T2 in which no color difference signal exists. The level (blanking level) in the T2 period is the central level of the range for A / D conversion (2.5V level in the case of FIG. 4). As a result, R
From each flip-flop for the -Y and BY color difference signals, data De is output to the Q terminal in the same manner as in (A) above.

Each data of the pedestal level and the blanking level extracted by the latch circuit 7 is input to the additional circuit 4. The specific operation of the additional circuit 4 is switching.
That is, in the case of the luminance signal, the video luminance signal itself is switched to the digital processing unit 3 side, and in the blanking period, it is switched to the latch circuit side 7 to add the Dc to the luminance signal.
As a result, a horizontal 1-cycle luminance signal is completed. Similarly, in the case of each color difference signal, the digital processing unit 3 side and the latch circuit 7 side are switched to add the De corresponding to the color difference signal of RY and BY to each color difference signal. As described above, the luminance and color difference signals themselves and the pedestal and blanking levels are always correct.

[0013]

As described above, according to the present invention, A
Even if the reference voltage applied to the D / D converter fluctuates as in the conventional case, the pedestal level added in the subsequent stage and the blanking level of each color difference signal also fluctuate in the same manner, which means that it does not relatively change. Video can be reproduced. In addition, when the input signal to the A / D converter fluctuates, the clamp potential and the digital data of the video signal fluctuate, but they also fluctuate at the same rate, so they do not relatively change. You can reproduce the correct image.

[Brief description of drawings]

FIG. 1 is a principal block diagram showing an embodiment of a video signal processing circuit according to the present invention.

FIG. 2 is a timing chart and the like for explaining FIG.

FIG. 3 is a principal block diagram showing an example of a conventional video signal processing circuit.

FIG. 4 is a conceptual diagram of A / D conversion for explaining FIG.

[Explanation of symbols]

 1 Input Processor 2 First A / D Converter 3 Digital Processor 4 Additional Circuit 5 D / A Converter 6 Second A / D Converter 7 Latch Circuit S1 Analog Composite Video Signal

Claims (1)

[Claims] 1. A first A / D that converts a clamped analog luminance signal and RY and BY color difference signals into digital signals and outputs the digital signals to a signal processing circuit in a subsequent stage.
In a video signal processing circuit provided with a converter, the clamped analog luminance signal and RY and B-
A second A / D converter for converting the Y color difference signal into a digital signal, the second A / D converter having a common power source with the first A / D converter; and the second A / D converter. A pedestal level from the luminance signal, a blanking level from the RY color difference signal, and a blanking level from the BY color difference signal. For each signal digitized by the D / D converter, the pedestal level from the latch circuit is added to the luminance component, the blanking level of the RY color difference signal is added to the RY color difference component, and BY is used.
A video signal processing circuit, wherein a blanking level of a color difference signal is added to a BY color difference component.