JPH06266306A - Liquid crystal display driving device - Google Patents

Abstract

PURPOSE:To provide the liquid crystal display driving device of a simple constitution which does not require a conventionally used liquid crystal driving circuit and drives a liquid crystal display unit only with a CPU for display operation. CONSTITUTION:The CPU 2 generates and outputs a common electrode signal which is inverted in level at constant intervals of time to the common electrode terminal (h) of the liquid crystal display unit 1. Further, the CPU 2 reads display data out of a RAM 4, exclusively ORs the respective bits of the display data corresponding to respective segment display parts with the logical value of the common electrode signal to generate respective segment electrode signals, and outputs them to the respective segment terminals of the liquid crystal display units 1 to make a display on the liquid crystal display unit 1 with the signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display drive device for driving a liquid crystal display having a display unit of a plurality of segments such as a 7-segment or analog bar segment display.

[0002]

2. Description of the Related Art Conventionally, for example, a liquid crystal display drive circuit for driving a 7-segment display liquid crystal display includes a decoder for decoding input display data, a drive circuit for driving each segment of the display unit, and a display unit. It was composed of a drive circuit including a counter for driving the back plate.

[0003]

When displaying numbers or symbols on the liquid crystal display, the input / output port of the CPU (single-chip CPU provided with ROM, RAM, input / output port, etc. on the same substrate) is used. , The liquid crystal display drive circuit having the above configuration is connected, the liquid crystal display device is connected to the output side of the liquid crystal display drive circuit, the display data is sent from the CPU to the liquid crystal display drive circuit, and the liquid crystal display drive circuit is operated to operate the liquid crystal display device. The numbers and symbols are displayed on the segment display of.

However, in recent years, it has become necessary to reduce the number of electric circuit components to be used as much as possible due to the miniaturization of products and the reduction of manufacturing cost, and there is a demand for simplification of components of a liquid crystal display drive circuit. Had been issued.

The present invention has been made in view of the above points, and does not require a liquid crystal display drive circuit used conventionally, and has a simple structure in which a liquid crystal display can be driven and displayed only by a CPU. An object of the present invention is to provide a liquid crystal display driving device.

[0006]

In order to achieve the above object, a liquid crystal display driving device of the present invention is a liquid crystal driving device for driving a liquid crystal display having a plurality of segment display portions, as shown in the configuration diagram of FIG. In the display driving device, storage means for storing display data, common electrode signal generation means for generating and outputting a common electrode signal whose level is inverted at fixed time intervals with respect to the common electrode terminal of the liquid crystal display, and the storage means The display data is read, each segment electrode signal is generated by taking the exclusive OR of each bit of the display data corresponding to each segment display section and the logical value of the common electrode signal, and these are output to each segment terminal of the liquid crystal display. And segment electrode signal generating means for outputting.

[0007]

In the liquid crystal display driving device having such a configuration, the common electrode signal generating means generates and outputs a common electrode signal whose level is inverted at regular time intervals with respect to the common electrode terminal of the liquid crystal display, Further, the segment electrode signal generating means reads the display data from the storage means and generates each segment electrode signal by taking an exclusive OR between each bit of the display data corresponding to each segment display part and the logical value of the common electrode signal. Then, they are output to the respective segment terminals of the liquid crystal display, so that the display is performed on the liquid crystal display.

Since the storage means, the common electrode signal generating means and the segment electrode signal generating means can be constituted by the CPU, each segment terminal and the common electrode terminal of the liquid crystal display are directly connected to the input / output port of the CPU. Then, the liquid crystal display can be driven and displayed. Therefore, unlike the conventional case, the CP can be used without using the liquid crystal display drive circuit.
Liquid crystal display can be performed only by U.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic block diagram of a liquid crystal display driving device connected to a liquid crystal display device 1. This liquid crystal display driving device is composed of a CPU 2. The CPU 2 is composed of a so-called single-chip CPU, and is configured by providing a ROM 3, a RAM 4, an input / output circuit 5, etc. on the same substrate of a CMOS-LSI, for example.

As shown in FIG. 1, the liquid crystal display 1 is a liquid crystal display having a 7-segment display section, provided with segment terminals a to g corresponding to each segment display section, and connected to a back plate. Common electrode terminal h is provided.

In the CPU 2, among the general-purpose input / output ports provided therein, eight input / output ports P1 to P8 are provided.
Are used for display and their input / output ports P1 to P7
Are connected to the segment terminals a to g corresponding to the respective segment display portions of the liquid crystal display 1, and the input / output port P8 is connected to the common electrode terminal h.

In the ROM 3 of the CPU 2, as will be described later,
Programs for display data determination processing, liquid crystal display drive display processing by timer interruption, and the like are stored in advance.

Next, the operation of the liquid crystal display driving device will be described with reference to the flow charts of FIGS.

As shown in FIG. 2, in the main routine of the CPU 2, first, in step 100, a signal (for example, a temperature detection signal) that is a source of display is input from the outside. Then, in step 110, the display character (for example, the number "7") to be displayed is determined based on the input signal, and the display data is determined.

Next, in step 120, the determined display data is stored in the RAM 4. For example, when the numerical value to be displayed is "7", each bit of the memory is stored in the RAM 4 as "1000111" as shown in FIG.

On the other hand, the CPU 2 is a timer interrupt routine that enters every fixed time interval (for example, 7.8 ms) and executes the following display drive processing. This interrupt time interval is
It is determined based on the liquid crystal driving frequency of the liquid crystal display, and when the liquid crystal driving frequency is 64 Hz, the cycle is 15.6 m.
s becomes s, and the half cycle of 7.8 ms is the time interval of the timer interrupt.

When this timer interrupt processing is started, the CPU
2. First, in step 200, the display data is read from the RAM 4, and then in step 210, the input / output port P is read.
The common electrode signal from 8 is inverted and output. That is, for example, in the previous interrupt processing, if the common electrode signal is low level "0", it is set to high level "1", and if it is high level "1" in the previous processing, it is set to low level "0". To output.

Next, at step 220, the input / output port P1 connected to each segment terminal ag of the liquid crystal display 1
Each segment electrode signal is output to P7. This segment electrode signal is used for each segment a to
The exclusive OR (exclusive OR) of the data of each bit corresponding to g and the logical value of the common electrode signal is output.

That is, as described above, for example, when the display character is "7", the display data corresponding to each segment is
a-1, b-0, c-0, d-0, e-1, f-1, g
Since it becomes -1, the segment electrode signal of the segment a becomes "1" by taking the exclusive OR of "1" and "0" when the common electrode signal this time is "0",
The segment electrode signal “1” is output to the input / output port P1. Further, the segment electrode signal of the segment b becomes "0" by taking the exclusive OR of "0" and "0" when the common electrode signal of this time is "0", and the segment electrode signal "0" is input from the input / output port P2. Is output. Hereinafter, similarly, for the segments c to g, each segment electrode signal is output from each of the input / output ports P3 to P7 by taking exclusive OR with the logical value of the common electrode signal this time.

After step 220 is completed, the above-mentioned processing is repeated from step 200 at regular time intervals, and the processing up to step 220 is repeated. Therefore, in the interrupt process to be executed next, the common electrode signal is inverted to “1”, so that the segment electrode signal of the segment a becomes “0” by taking the exclusive OR of “1” and “1”. , The segment electrode signal “0” is output to the input / output port P1. Further, the segment electrode signal of the segment b becomes "1" by taking the exclusive OR of "0" and "1", and the segment electrode signal "1" is output from the input / output port P2.

As described above, by repeating the interrupt processing at regular intervals, the common electrode terminal h of the liquid crystal display 1 is supplied with a pulse-shaped common electrode signal having a constant cycle as shown in FIG. , Each segment electrode signal is output by taking the exclusive OR of the data of each segment and the logical value of the common electrode signal, so that the segment display section of the liquid crystal display 1 should be lit between the common electrode and the common electrode. The voltage is applied to the part, the voltage is not applied to the part to be turned off, and the read character is displayed on the liquid crystal display 1.

In the above embodiment, an example of 7-segment display has been described, but the liquid crystal display driving device can be used for analog bar segment display for displaying a plurality of bar display portions according to analog values. .

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a liquid crystal display drive device showing an embodiment of the present invention.

FIG. 2 is a flowchart of a main routine of a CPU.

FIG. 3 is a flowchart of a timer interrupt routine.

FIG. 4 is a timing chart of a common electrode signal and a segment electrode signal.

FIG. 5 is a conceptual diagram of display data stored in a memory.

FIG. 6 is a configuration diagram of the present invention.

[Explanation of symbols]

1-liquid crystal display, 2-CPU, 3-ROM, 4-RA
M, P1 to P8-input / output ports, a to g-segment terminals, h-common electrode terminals.

Claims (1)

[Claims] 1. A liquid crystal display drive device for driving a liquid crystal display device having a plurality of segment display sections, a storage means for storing display data, and a level inversion at regular time intervals with respect to a common electrode terminal of the liquid crystal display device. Common electrode signal generating means for generating and outputting a common electrode signal, and exclusive OR between each bit of the display data corresponding to each segment display part and the logical value of the common electrode signal for reading the display data from the storage means. And a segment electrode signal generating means for generating each segment electrode signal and outputting them to each segment terminal of the liquid crystal display.