JPH06260633A - Bidirectional semiconductor controlled rectifier - Google Patents

Abstract

PURPOSE:To provide a TRIAC, in which a large repetitive surge current is allowable and which can be mass-produced at low cost, by putting the first electrode layer being a high-melting-point metallic film between the second semiconductor layer or the face exposed on the first main surface side of the third semiconductor layer and the second electrode layer being a low-resistance layer. CONSTITUTION:A buffer electrode layer 28 being a high-melting-point metallic film is made between a semiconductor layer P1 and the face exposed on the first main surface side of a semiconductor layer NE1 and a metallic layer 26 being a low melting resistance metal. Hereby, even if a large surge current flows, and a bonding part is heated to high temperature, the eutectic between Si and the metal forming the buffer electrode 28 is hard to be generated. Accordingly, the deterioration of the breakdown strength of the element is prevented, and the repeatitive surge current tolerance is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bidirectional control rectifier used for controlling a large-capacity / high-performance motor in household electric appliances, etc. High-performance bidirectional control rectifier (hereinafter referred to as TRIAC).

[0002]

2. Description of the Related Art Recently, as a means for improving the suction power of household electric appliances, particularly for vacuum cleaners, a means for lowering the resistance of motors has been taken.
This means has the advantage that the steady-state effective current (hereinafter referred to as I _RMS ) flowing in the motor control circuit is maintained at the same level as before the resistance of the motor was lowered, and performance can be improved with constant power consumption. However, there is a drawback that only the surge current at the time of switch-on increases with the reduction of the resistance of the motor. For example, as shown in a waveform diagram showing an example of a transient current characteristics when the switch-on of FIG. 18, while the peak value i _p normal motor surge current not lower resistance 'is 100A, the low-resistance Motor Has a peak value i _p of 150
Significantly increased with A. For this reason, even for the triac used for power control, although the _IRMS is the same as the conventional one, it is necessary to have a high repeated I surge withstand capability, that is, to withstand a larger surge current.

9 and 10 show a conventional triac. FIG. 9 is a diagram schematically showing the cross-sectional structure of the triac, that is, the layer structure of each semiconductor layer portion that is a constituent part of the triac (hereinafter referred to as a cross-sectional schematic diagram),
FIG. 10 is a top view drawn by removing the electrodes 7 and 8 of the same triac. However, the cross section of FIG. 9 is a schematic view of the cross section of the top view of FIG. 10 taken along the broken line AA ′ as viewed from the lower left of FIG. 10 for convenience of description, It is not an actual cross section of a triac cut by a plane. Note that other schematic sectional structure diagrams shown later are also drawn by the same method for the same reason.

Here, the "first main surface" used in the following description.
Means the upper surface in the diagram of the triac shown in FIG. 9 and other schematic sectional structure diagrams,
The "second main surface" refers to the lower surface. For example,
In FIG. 9, the upper surface of the semiconductor layer P1 is the first main surface,
The lower surface of the semiconductor layer P2 is the second main surface.

As shown in FIG. 9, this triac is composed of N-type semiconductor layers N1, NE1, NE2 and NEG and P-type semiconductor layers P1 and P2. It has a gate by NEG. The T1 electrode 7 and the gate electrode 8 on the first main surface side of the triac are made of Al or the like, and the wiring 34 and the wiring 6 made of Al or the like are drawn out from there by bonding. The T2 electrode 9 on the second main surface side is fixed to the Cu stem 12 of the package by the solder 10. It is assumed that Al is used as the material for the triac electrode and the wiring in FIG. A region NE2 indicated by a dotted line in the top view of FIG. 10 does not exist on this surface but is a region formed on the surface on the T2 electrode 9 side. FIG. 11 is a top view of the same triac, in which a T1 electrode is formed on the first main surface side, and an Al wire is bonded to form a T1 lead (A of φ400 μm).
1 wire) 34 and gate lead (φ150 μm)
Al wire) 6 of FIG. A-A
The dashed-dotted line'indicates the same location as in FIG.

The relationship between the repetitive I surge withstand capacity and the surge current of the conventional triac having such a structure is shown by a straight line A in FIG. The measurement conditions used for the diagram showing the relationship between the repeated I surge withstand capability and the surge current in FIG. 6 are conditions in which a sine wave with a cycle of 20 msec is applied for one cycle every 3 seconds at a temperature of 25 ± 2 ° C. Is. As shown by the straight line A in FIG. 6, in the 16A triac having the above structure,
The resistance to repeated I surge is 70A and is about 500,000 times. In the future, it will be necessary to carry out several hundred thousand times to one million times or more at 130 to 150 A or more, and the conventional triac does not satisfy this value. Therefore, it is desired to improve the characteristics by some means. Where I repeat
The relationship between surge withstand and surge current will be described.

[0007] When passing a triac large surge current as shown in FIG. 9, for example, when passing a 100A about the triac I _RMS 16A, the current causes in the way triac unique flow generating current concentration in the bonding portion. That is, when a positive voltage is applied to the T2 electrode 9 side and a negative voltage is applied to the T1 electrode 7 side, the current is T2 →
The current flows through the route of P2 → N1 → P1 → NE1 → T1 and current concentration occurs on the side surface portion C1 of the bonding wire 34 on the NE1 side. On the contrary, a voltage of − on the T2 electrode 9 side, T1
When a + voltage is applied to the electrode 7 side, as shown in FIG.
The current flows through the route of 1 → P1 → N1 → P2 → NE2 → T2, and current concentration occurs on the side surface portion C2 of the bonding wire 34 on the P1 side. When the current concentration occurs in this way, a phenomenon such as electromigration occurs in the side surface portions C1 and C2, and a part of the electrode Al atoms move, whereby the contact resistance increases. Then, heat is generated due to the large current repeatedly applied, and this heat generation further activates the movement of Al atoms. Due to the occurrence of such positive feedback, side surfaces C1 and C2 of these bonding wires are formed.
Temperature rises.

As described above, the temperature rises at the moment when the surge current flows around the bonding portion of these Al wires, and finally the binary eutectic temperature of Al and Si is about 580 ° C. (see FIG. 7). As a result, the Si under bonding starts to directly react with Al of the electrode metal, and the single crystallinity of Si disappears. When this reaction starts, the contact resistance between the bonding wire and Si rapidly increases, and even more heat is generated. And Si
-Al eutectic layer reaches near the P1-N1 junction (2 in FIG. 4).
4a to 24d), the breakdown voltage of the element deteriorates when reaching the end of the depletion layer when the forward blocking voltage is applied. In Figure 14,
The shape of the fracture marks 36 and 38 at this time is shown. The broken line 4
0 and 41 are marks of peeling the bonding. From the above, in order to improve the I surge withstand capability repeatedly with respect to the same surge current, one guideline is how to reduce the current concentration and avoid the breakdown voltage deterioration.

FIG. 15 is a schematic sectional view of another conventional triac. This triac aims to improve the resistance to repeated I-surge by relaxing the current concentration. The two electrodes 52 and 54 are formed of a solderable metal, and the Ag-plated Cu wire 44 of φ1.0 mm is used. Four
6 is fixed with solders 48 and 50, respectively.

About this triac, the T1 electrode 52
15 and 16 show the internal current flows when the bias mode is negative, the T2 electrode 9 is positive, the T1 electrode 52 is positive, and the T2 electrode 9 is negative. The current transmission path is almost the same as that of the triac shown in FIG. 9, except that a current path is formed from the electrode metal 52 on the first main surface side into the solder 48 in either case. No significant concentration of current as shown is formed. It has been found that this results in a dramatic increase in the repeated I surge withstand capability. Repeated I surge tolerance is, for example, 16A
The number of triacs at 100 A is 1 million or more, which is a dramatic improvement compared to the triac shown in FIG.

However, since the structure and the manufacturing process of the triac are complicated, the triac has a fatal defect for a semiconductor device that the manufacturing cost is high and the mass productivity is poor.

FIG. 17 is a top view of still another conventional triac. This is intended to improve the repeated I-surge withstand capability by relaxing the current concentration by using the bonding type triac of FIG. 9, and the cross-sectional structure of the semiconductor layer portion is the same as the two conventional ones described above. It is similar, except that two bonding wires are struck side by side on NE1. However, FIG. 17 shows bonding marks 58, 60 and 62 after the bonding wires are removed.

According to this structure, the withstand I surge resistance is about 500,000 times at 100 A, which is slightly improved as compared with the triac shown in FIG.
If two bonding wires are struck on P1 or on P1, the current operation peculiar to TRIAC as described in FIGS.
As shown in 7, the current is concentrated only on a part of the outer periphery of the bonding wire facing the P1 side, and the fusion mark 56 is generated, so that the effect of the double bonding wire cannot be sufficiently obtained. In other words, a dramatic improvement in the repeated I-surge withstandability cannot be obtained by simply forming two bonding wires and striking them at random positions. As described above, at present, there is no provision of a triac capable of mass production, which has the repeated I surge withstand capability necessary for a low resistance motor.

[0014]

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above circumstances. Even if I _RMS is the same as the conventional one, the current value in repeated I surge withstand is larger and the cost is low. The purpose is to provide a triac that can be mass-produced.

[0015]

A bidirectionally controlled rectifying semiconductor device of the present invention comprises a first semiconductor layer of a first conductivity type and the first semiconductor layer of the first conductivity type.
The second conductive type second semiconductor layer provided on the first main surface side in contact with the semiconductor layer, and the first conductive surface exposed in the first main surface in the second semiconductor layer and formed separately from each other. A third semiconductor layer and a fourth semiconductor layer of a first conductivity type; a fifth semiconductor layer of a second conductivity type provided on the second main surface side in contact with the first semiconductor layer; A sixth semiconductor layer of the first conductivity type exposed and formed on the second main surface;

A first refractory metal thin film formed in contact with the second semiconductor layer and the third semiconductor layer on the surfaces of the second semiconductor layer and the third semiconductor layer exposed on the first main surface side. An electrode layer, a second electrode layer made of a low-resistance metal formed overlying the first electrode, and at least one metal wire bonded to the surface of the second electrode layer by bonding. It is characterized by

Preferably, the device comprises at least two of the metal wires, at least one of the metal wires.
A book is connected to the second electrode above the exposed portion of the first major surface of the second semiconductor layer, and at least one of the metal lines is above the second electrode above the third semiconductor layer. May be connected to.

[0018]

As described above, the first metal thin film having a high melting point is used as described above.
Since the electrode layer is sandwiched between the surfaces of the second semiconductor layer and the third semiconductor layer exposed on the first main surface side and the second electrode layer which is a low resistance metal, a large surge current is generated. Flow and the bonding part becomes hot, Si
A eutectic between the electrode metal and the electrode metal is hard to be generated. This allows
The breakdown voltage of the element is prevented from being deteriorated, and the repeated I surge withstand capability is improved.

In addition, one of the metal wires is connected to the second wire.
In the case of using a configuration in which one of the metal wires is connected to the upper part of the exposed portion of the first main surface of the semiconductor layer and the second electrode is connected to the upper part of the third semiconductor layer, Since the current flows in only one of the metal wires, which is determined by the direction of the current flowing in this element, and the current concentration is relieved, it is possible to further improve the I surge withstand capability.

[0020]

Embodiments will be described below with reference to the drawings. The same parts are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 1 shows a schematic sectional view of a triac according to the first embodiment of the present invention. The triac is exposed to the N-type semiconductor layer N1, the P-type semiconductor layer P1 provided on the first main surface side in contact with the semiconductor layer N1, and the first main surface in the semiconductor P1. , N-type semiconductor layer NE1 and semiconductor layer NEG formed separately from each other
A P-type semiconductor layer P2 provided on the second main surface side in contact with the semiconductor layer N1, and an N-type semiconductor layer NE2 formed exposed on the second main surface in the semiconductor layer P2. And the semiconductor layer P1 and the semiconductor layer N on the surfaces exposed to the first main surface side of the semiconductor layer P1 and the semiconductor layer NE1.
A T1 electrode layer 7 formed in contact with E1, a gate electrode layer 8 formed in contact with the semiconductor layer P1 and the semiconductor layer NEG, and three metals bonded to predetermined positions on the surfaces of these electrode layers. Line and the semiconductor layer P2 and the semiconductor layer NE2 are provided on the surfaces exposed to the second main surface side of the semiconductor layer P2 and the semiconductor layer NE2.
The Cu stem 12 is joined by the solder 10 in contact with. As can be seen from the figure, a triac chip having the same electrode structure as the conventional triac, that is, the same chip as in FIG. 1
It is characterized by hitting a book. In addition, the bonding wire 2 and the bonding wire 4 have φ
An Al wire of 400 μm may be used, and an Al wire of φ150 μm may be used for the bonding wire 6.

Here, a positive voltage, T1 is applied to the T2 electrode 9 in the figure.
When a negative voltage is applied to the electrode 7, the current flows in the route of T2 → P2 → N1 → P1 → NE1 → T1 as shown in FIG.
On the contrary, when a negative voltage is applied to T2 and a positive voltage is applied to T1, T1 → P1 → N1 → P2 → NE2 → as shown in FIG.
It flows on the route of T2. At this time, by adopting the above-mentioned configuration, unlike the conventional case, in the former bias mode, the bonding wire 4 mainly causes the current to flow, unlike the conventional current operation of the triac. 2 acts as an auxiliary to reduce the current density of the bonding wire 4. In the latter bias mode, two bonding wires 2,
The role of 4 is reversed from the former. Therefore, the current sharing of the two bonding wires 2 and 4 becomes equal, and the structure is more resistant to breakdown voltage deterioration than before.

With this structure, as shown by a straight line B in FIG. 6, the triac according to the present invention in FIG. 1 is 110A, 50A in comparison with the repeated I surge withstand capability of 70A, 500,000 times in the conventional triac in FIG. It was possible to improve significantly by 10,000 times. Here, the measurement condition in FIG.
At 2 ° C., a sine wave with a cycle of 20 msec is applied every 3 seconds for one cycle.

However, two bonding wires 2,
In this embodiment, the condition is 15
When it exceeds 150,000 times at 0 A, the breakdown voltage starts to occur. The deteriorated portion at that time is the portions of the melting marks 14 and 16 in FIG. 3, and the shape in the cross-sectional direction is like the portions 24a to 24d shown in the schematic sectional structure diagram of FIG. The broken lines 18, 20, and 22 in FIG. 3 are the bonding wires 2, 4, and 6.
It is a bonding mark after peeling. The mechanism of the deterioration of the triac is, as in the conventional triac of FIG. 1, finally the destruction of the single crystallinity of Si due to the generation of Al—Si eutectic, and a detailed description thereof is omitted for simplification. To do. Here, as means for preventing this deterioration and further improving the repeated I surge withstand capability, (1) means for preventing deterioration by lowering the current density

A structure in which the bonding area is increased by stitch bonding, that is, one bonding wire is bonded at several points, and the bonding wire is N as shown in the first embodiment of FIG.
At least one on E and at least one on P1 are used. (2) Means for preventing deterioration by avoiding formation of Si—Al eutectic High eutectic formation temperature for Si It is possible to use a structure in which a metal (see FIG. 7) is used as a buffer and is sandwiched between Si and an electrode layer such as Al.

In the embodiment using the former structure, since the metal wires such as Al are bonded at several places, the current density per one bonding wire is changed by the operation similar to that of the first embodiment shown in FIG. It is reduced, and the repeated I surge withstand capability is improved. It should be noted that detailed description and drawings of this embodiment are omitted for simplification.
Next, a second embodiment according to the present invention using this latter structure will be described.

FIG. 5 is a schematic view of the cross-sectional structure of the triac according to the second embodiment of the present invention. This triac is exposed to the N-type semiconductor layer N1, the P-type semiconductor layer P1 provided on the first main surface side in contact with the semiconductor layer N1, and the first main surface in the semiconductor layer P1. And the N-type semiconductor layer NE1 and the semiconductor layer NE formed separately from each other.
G, a P-type semiconductor layer P2 provided on the second main surface side in contact with the semiconductor layer N1, and an N-type semiconductor layer formed by being exposed at the second main surface in the semiconductor layer P2. NE2 and the semiconductor layer P1 and the semiconductor layer P1 and the surface of the semiconductor layer NE1 exposed on the first main surface side, the T1 electrode of the refractory metal thin film formed in contact with the semiconductor layer P1 and the semiconductor layer NE1 (hereinafter referred to as a buffer). (Referred to as an electrode) 28, a gate electrode 32 of a refractory metal thin film formed in contact with the semiconductor layer P1 and the semiconductor layer NEG, and a low-resistance metal T1 electrode 26 formed on the two electrodes, respectively. The semiconductor layer P has gate electrodes 30 and metal wires bonded to predetermined positions on the surfaces of these electrodes.
2 and the surface of the semiconductor layer NE2 exposed on the second main surface side, the Cu stem 12 is bonded by the solder 10 in contact with the semiconductor layer P2 and the semiconductor layer NE2.

In this way, the buffer electrode layer 28, which is a refractory metal thin film, is formed between the surfaces of the semiconductor layer P1 and the semiconductor layer NE1 exposed on the first main surface side and the electrode layer 26, which is a low resistance metal. Since it is sandwiched between them, even if a large surge current flows and the temperature of the bonding portion rises, a eutectic of Si and the metal forming the buffer electrode 28 is less likely to be generated. As a result, the breakdown voltage of the device is prevented from being deteriorated and the withstand I surge resistance is improved.

Here, Al, Au, Cu and Ag can be used as the low resistance metal material for forming the electrode layer 26. In the following description, Al is used for convenience of description. Next, materials used for the buffer electrode 28 will be described.

First, based on the binary eutectic formation temperature of Si, which is the constituent material of the semiconductor layer P1 and the semiconductor layer NE1, and various materials considered as the constituent material of the buffer electrode layer 28 shown in FIG. A material suitable as a constituent material of the buffer electrode layer 28 will be investigated. Since the higher the binary eutectic formation temperature of the semiconductor layer P1 and the semiconductor layer NE1 and the electrode layer 26, the better the breakdown voltage deterioration characteristic, the metal having a higher eutectic formation temperature with respect to Si is shown in FIG. As V,
W, Mo and Ti are increased.

Next, based on the binary eutectic formation temperature of various metals considered as the buffer electrode layer 28 of FIG. 8 and Al which is one material of the electrode layer 26, it is suitable as a constituent material of the buffer electrode layer 28. Examine the right ingredients. The buffer electrode layer 2
If the eutectic temperature of the buffer metal used as 8 and Al is low, Al forms a eutectic with the buffer metal when the bonding lower part reaches that temperature, and as a result, Al atoms easily reach the Si surface. The eutectic temperature of Al and buffer metal must also be high. From this idea, Ti, W, V and Mo are selected from FIG.

Therefore, Ti, W, V and Mo are selected as the preferred buffer metals for use in the buffer electrode layer 28 from FIGS. 7 and 8. It should be noted that all of these are refractory metals having a very high melting point even if they are single metals. Next, using Ti as a buffer metal, the electrode layer 28
An example of the main part of the manufacturing process of the triac used in the above will be described.

First, Ti is used to form the electrode layers 28 and 32 shown in FIG.
As described above, Ar ion sputtering or electron beam evaporation is performed to form 2000 angstroms to 6000 angstroms on Si. Next, Al is formed as layers 26 and 30 by electron beam evaporation to have a thickness of 3.5 μm to 14 μm. Then, they are extracted into a desired shape (26, 28, 30, 32) by well-known photolithography. After this, the electrodes 28 and 32 and Si (P1, NE
1, NEG) to improve the adhesion with 450 ℃ ~
Heat treatment is performed in H ₂ or N ₂ at 550 ° C. for about 10 to 30 minutes. The formation of the back electrode is the same as the conventional one. Then, the chip is soldered onto the Cu stem 12 and Al wires are bonded onto the electrode layers 26 and 30, respectively, as is conventional. The second embodiment of FIG. 5 is formed by such a procedure. The electrode on the semiconductor layer NEG does not need to have a two-layer structure of the low resistance electrode layer 30 and the high melting point electrode layer 32 as shown in FIG. The electrodes 30 and 32 are formed in the same layer as the electrodes 28 and 26, respectively. Next, each electrode layer 26, 28
The thickness will be briefly described.

The thickness of the buffer electrode layer 28, that is, T
When the i film thickness is increased, the repeated I surge withstanding capacity tends to slightly increase. However, if the film thickness exceeds 6000 angstroms, there is a drawback that the adhesion between these metals and Si deteriorates, and peeling easily occurs. Therefore, the thickness of the buffer electrode layer 28 is preferably 2000 to 6000 angstroms.

As the thickness of the electrode 26 increases, the effect of alleviating the current concentration at the contact portion between the bonding wire 2 and the electrode 26 becomes greater. However, when Al is used for the electrode layer, in the existing process, the upper limit is considered to be about 15 μm in view of processing time and processing accuracy. Therefore, the thickness of the electrode 26 is 3.5 to 15 μm.
Is preferred.

As in the first embodiment of FIG. 1, the NE
It is also possible to bond at least one Al wire 2 on P1, and at least one Al wire 4 on P1. With this structure, the same effects as those of the embodiment of FIG. 1 can be obtained, and the repeated I surge withstand capability can be further improved. Further, the above-mentioned stitch bonding may be further used if there is enough space.

In the triac according to the embodiment of the present invention shown in FIG. 5, the repeated I surge withstand capability measured under the same conditions as described above is shown by straight lines C and D in FIG. That is, Ti thickness 20
In the configuration of 00 angstrom / Al thickness 3.5 μm,
As shown by the straight line C in FIG. 6, it increases up to 150A-500K times, and when the Ti thickness is 2000 angstroms / Al thickness is 10 μm, the straight line is 170A-50K.
The results increased up to 0K times, demonstrating the great effectiveness of this means. In this measurement, regarding the connection of the bonding wire, the same configuration as that of the embodiment of FIG. 1 was used.

As described above in detail, according to the present invention, a triac having a higher repeated I surge withstand capability than the conventional one can be obtained. That is, it is possible to provide a triac capable of withstanding a surge current larger than conventional.

Here, the present invention can be similarly applied to the triac having the structure in which the conductivity types (N type, P type) of the respective semiconductor layers are opposite to the triac in the above description, and the same effect can be obtained. can get. Further, the present invention is not limited to the above-described embodiments, and various modifications can be carried out without departing from the scope of the invention.

[0040]

As described in detail above, according to the present invention,
By sandwiching the electrode layer, which is a high melting point metal thin film, between the Si layer on the first main surface of the triac and the electrode layer which is a low resistance metal, a large surge current flows and the bonding portion becomes hot. However, since eutectic of Si and the electrode metal is less likely to be generated, deterioration of breakdown voltage of the element is prevented.
Therefore, a triac having a higher repetition I surge withstand capability than the conventional one can be obtained. That is, it is possible to provide a triac capable of withstanding a surge current larger than conventional.

Further, at least one metal wire is connected to the upper portion of the exposed portion of the first main surface of the semiconductor layer P1, and at least one metal wire is connected to the electrode on the upper portion of the semiconductor layer NE1. When an AC voltage is applied to this element, the current alternately flows through one of the two bonding wires according to the direction of the voltage, so that the current concentration as in the conventional case is relaxed. The element is less likely to deteriorate in withstand voltage, and a higher repeated I surge withstand capability than in the past is given. Furthermore, when both of the above means are used in combination, the repeated I surge withstand capability can be further improved.

Specifically, in the triac according to the embodiment of the present invention shown in FIG. 5, when the Ti thickness is 2000 angstrom / Al thickness is 3.5 μm, the repetition I surge withstand-surge current characteristic of 150 A and 500 K times is Ti. Thickness 2
170 at 000 angstrom / Al thickness of 10 μm
A, 500 K times of repeated I surge withstand-surge current characteristics were obtained, demonstrating the effectiveness of the present invention.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional structure diagram of a triac according to a first embodiment of the present invention and a diagram showing one current transmission path.

FIG. 2 is a diagram showing another current transmission path in the triac shown in FIG.

FIG. 3 is a top view of the triac of FIG.

FIG. 4 is a diagram illustrating a repeated I surge breakdown mode of the triac of FIG.

FIG. 5 is a diagram showing a schematic sectional structure of a triac according to a second embodiment of the present invention.

FIG. 6 is a diagram for comparing the repeated I surge withstand capability of the triac according to the present invention and the conventional triac.

FIG. 7 is a diagram showing a binary eutectic formation temperature between Si and various metals.

FIG. 8 is a diagram showing a binary eutectic formation temperature between Al and various metals.

FIG. 9 is a diagram showing a schematic sectional structure of a triac according to a first conventional example.

FIG. 10 is a top view of the triac of FIG.

11 is a top view showing a state in which a metal wire is bonded to the triac of FIG. 9. FIG.

12 is a diagram showing one current transmission path in the triac of FIG. 9. FIG.

13 is a diagram showing another current transmission path in the triac of FIG.

FIG. 14 is a top view showing a repeated I surge breakdown portion in the triac shown in FIG. 9;

FIG. 15 is a schematic sectional view of a triac according to a second conventional example and a diagram showing one current transmission path.

16 is a diagram showing another current transmission path in the triac of FIG.

FIG. 17 is a top view showing a repeated I surge breakdown portion in the triac according to the third conventional example.

FIG. 18 is a diagram showing transient current characteristics when driving a low resistance motor and a normal motor.

[Explanation of symbols]

2, 4 ... φ400μm Al wire, 6 ... φ150μ
m Al wire, 7 ... T1 electrode, 8 ... Gate electrode, 9
T2 electrode, 10 ... Solder, 26 ... Low resistance metal T1 electrode, 28 ... Refractory metal thin film T1 electrode, 30 ... Low resistance metal gate electrode, 32 ... Refractory metal thin film gate electrode,
N1, NE1, NE2, NEG ... N-type semiconductor layer, P
1, P2 ... P-type semiconductor layer.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Sueo Nagatomo 1 Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa Stock company Toshiba Tamagawa factory

Claims (6)

[Claims] 1. A first-conductivity-type first semiconductor layer, a second-conductivity-type second semiconductor layer that is in contact with the first semiconductor layer and is provided on the first main surface side, and the second semiconductor layer. A third semiconductor layer and a fourth semiconductor layer of the first conductivity type which are exposed to the first main surface and are formed separately from each other; and provided on the second main surface side in contact with the first semiconductor layer. Second
A fifth semiconductor layer having a conductivity type; a sixth semiconductor layer having a first conductivity type formed by being exposed on a second main surface of the fifth semiconductor layer; a second semiconductor layer and a third semiconductor layer; The first electrode layer of the refractory metal thin film formed in contact with the second semiconductor layer and the third semiconductor layer is formed on the surface exposed on the first main surface side, and the first electrode layer is formed so as to be overlapped on the first electrode. A bidirectional controlled rectification semiconductor device comprising a second electrode layer made of a low resistance metal and at least one metal wire connected to the surface of the second electrode layer by bonding. 2. The device comprises at least two of the metal lines, wherein at least one of the metal lines is on the second electrode above the exposed portion of the first major surface of the second semiconductor layer. The device of claim 1, wherein the device is connected and at least one of the metal lines is connected to a second electrode on top of the third semiconductor layer. 3. The device according to claim 1, wherein the thickness of the first electrode layer is 2000 angstroms to 6000 angstroms. 4. The thickness of the second electrode layer is 3.5 μm to 15 μm.
4. The device according to claim 1, wherein the device is μm. 5. The refractory metal forming the first electrode layer comprises:
Device according to any one of claims 1 to 4, characterized in that it is Ti, W, Mo or V. 6. The low resistance metal forming the second electrode layer comprises:
Device according to any one of claims 1 to 5, characterized in that it is Al, Au, Cu or Ag.