JPH06259978A - Flash erasing type non-volatile memory - Google Patents

Flash erasing type non-volatile memory

Info

Publication number
JPH06259978A
JPH06259978A JP4163493A JP4163493A JPH06259978A JP H06259978 A JPH06259978 A JP H06259978A JP 4163493 A JP4163493 A JP 4163493A JP 4163493 A JP4163493 A JP 4163493A JP H06259978 A JPH06259978 A JP H06259978A
Authority
JP
Japan
Prior art keywords
erasure
erasing
verification
erase
volatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4163493A
Other languages
Japanese (ja)
Inventor
Kazue Fukushima
和重 福嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP4163493A priority Critical patent/JPH06259978A/en
Publication of JPH06259978A publication Critical patent/JPH06259978A/en
Withdrawn legal-status Critical Current

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Abstract

PURPOSE:To shorten the time required for erasure and erasure verification by storing the number of times required for reading out and checking whether the erasure of a cell region ends normally or not after the erasure operation. CONSTITUTION:A memory cell is erased after the start of erasure and the verification 44 to read out and check whether the erasure ends normally or not is executed. This execution is executed until the erasure ends A5. The erasure is ended by storing the number of the verification times into a a verification count memory section A3. Only the erasure is executed up to the number of the times stored in the verification count memory section before the start of the erasure A1 and the erasure A2. The erasure is executed again when the erasure does not end even at the number of times stored in the memory section. As a result, the time for the erasure and the erasure verification is shortened and the erasure time is shortened.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はフラッシュ消去型不揮発
性メモリに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flash erase type nonvolatile memory.

【0002】[0002]

【従来の技術】従来のフラッシュ消去型不揮発性メモリ
は、図3に示す様に、消去が開始されると(ステップA
1)、メモリセルが消去されて(ステップA2)、消去
が正常に終了したかの確認の為に、ベリファイ(読み出
し)を行う(ステップA3)。ここで、消去が出来てい
ないと(NOの場合)、もう一度消去,ベリファイを行
い、消去完了となる迄(OKの場合)、消去,ベリファ
イを繰り返す動作を行い、消去完了(ステップA4)と
なる。
2. Description of the Related Art As shown in FIG. 3, a conventional flash erasing type non-volatile memory starts erasing (step A).
1) After the memory cell is erased (step A2), verify (read) is performed (step A3) in order to confirm whether the erase is normally completed. If erasing has not been completed (NO), erasing and verifying are performed again, and erasing and verifying are repeated until erasing is completed (OK), and erasing is completed (step A4). .

【0003】ここで、ステップA1とステップA2との
間に、カウンタにn=0をセットし、〔n+1〕を
〔n〕とするステップがある。
Here, there is a step between step A1 and step A2 in which a counter is set to n = 0 and [n + 1] is set to [n].

【0004】[0004]

【発明が解決しようとする課題】従来のフラッシュ消去
型不揮発性メモリにおいては、消去及び消去ベリファイ
を、消去完了まで繰り返し行っている為、消去及び消去
ベリファイ時間が長くなり、消去,消去ベリファイに要
する消去時間の増大を招いていた。
In the conventional flash erasing type non-volatile memory, since erasing and erasing verification are repeated until erasing is completed, the erasing and erasing verification time becomes long, and erasing and erasing verification are required. This caused an increase in erase time.

【0005】本発明の目的は、前記問題点を解決し、消
去,消去ベリファイに要する時間を短縮したフラッシュ
消去型不揮発性メモリを提供することにある。
An object of the present invention is to solve the above-mentioned problems and to provide a flash erase type non-volatile memory in which the time required for erase and erase verify is shortened.

【0006】[0006]

【課題を解決するための手段】本発明のフラッシュ消去
型不揮発性メモリの構成は、消去完了後、消去を行った
セル領域の消去が正常に終了するまでに要した消去ベリ
ファイの回数を記憶するベリファイカウント記憶部を備
えていることを特徴とする。
The structure of the flash erase type non-volatile memory of the present invention stores the number of erase verify times required after the erase is completed until the erase of the erased cell area is normally completed. A verify count storage unit is provided.

【0007】[0007]

【実施例】次に本発明について図面を参照して説明す
る。図1は本発明の一実施例のメモリにおいて、1回目
の消去,ベリファイを示すフロー図である。図2は本発
明の一実施例のメモリにおいて、2回目以降の消去,ベ
リファイを示すフロー図である。
The present invention will be described below with reference to the drawings. FIG. 1 is a flow chart showing the first erase and verify operations in a memory according to an embodiment of the present invention. FIG. 2 is a flow chart showing the second and subsequent erases and verifications in the memory according to the embodiment of the present invention.

【0008】まず図1を用い、次に図2を参照して、本
実施例の動作について説明する。図1において、消去開
始後(ステップA1)、メモリセルが消去され(ステッ
プA2)て、メモリセルの消去が正常に終了したかの読
み出し確認のベリファイ(ステップA3)を行い、消去
完了になる迄、(ステップA2)の消去から行い、(ス
テップA3)のベリファイが仮に5回目で完了したら、
ベリファイカウント記憶部(ステップA4)に5回と記
憶(n=z)して、消去終了(ステップA5)となる。
First, the operation of this embodiment will be described with reference to FIG. 1 and then with reference to FIG. In FIG. 1, after erasing is started (step A1), the memory cell is erased (step A2), and verification is performed to confirm whether the memory cell has been erased normally (step A3) until the erase is completed. , Erase from (step A2), and if the verify in (step A3) is completed in the fifth time,
The verify count storage unit (step A4) stores 5 times (n = z), and the erasing ends (step A5).

【0009】図2においては、消去開始(ステップA
1)、消去(ステップA2)までは図1と同じだが、1
回目の消去ベリファイでベリファイカウント記憶部(ス
テップA3)に5回と記憶してあるので、5回目までは
消去しか行わず、この後5回目を越えると、ベリファイ
を行う(ステップA4)、また記憶部に記憶してある5
回という回数でも消去が終了していない時は、もう一度
消去(ステップA2)を行い、消去が終了する迄繰り返
し消去,消去ベリファイを行い、消去完了(ステップA
5)となる。
In FIG. 2, erase start (step A
1) and deletion (step A2) are the same as in FIG. 1, but 1
Since the verify count storage section (step A3) stores 5 times in the erase verification of the fifth time, only the erase is performed up to the fifth time, and if the fifth time is exceeded thereafter, the verify is performed (step A4), and the memory is stored again. 5 stored in the department
When the erasing is not completed even after the number of times, the erasing is performed again (step A2), and the erasing is completed by repeating the erasing and erasing verification until the erasing is completed (step A2).
5).

【0010】[0010]

【発明の効果】以上説明したように、本発明によるフラ
ッシュ消去型不揮発性メモリは、消去の正常終了までに
要した消去ベリファイの回数を記憶させて、次の消去の
時は記憶している回数までは消去だけを行う様にした
為、消去及び消去ベリファイ時間が短くなり、消去時間
が短縮するという効果がある。
As described above, the flash erase type non-volatile memory according to the present invention stores the number of erase verify times required until the normal end of the erase, and the stored number of times at the next erase. Since only the erasing is performed up to the above, there is an effect that the erasing and erasing verification time is shortened and the erasing time is shortened.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例において、一回目の消去,ベリ
ファイのフロー図である。
FIG. 1 is a flow chart of a first erase and verify in an embodiment of the present invention.

【図2】本発明の実施例において二回目以降の消去,ベ
リファイのフロー図である。
FIG. 2 is a flow chart of erasing and verifying after the second time in the embodiment of the present invention.

【図3】従来の消去,ベリファイのフロー図である。FIG. 3 is a flow chart of conventional erasing and verifying.

【符号の説明】[Explanation of symbols]

A1,A2,A3,A4,A5 ステップ A1, A2, A3, A4, A5 steps

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 消去動作後、消去を行ったセル領域の消
去が正常に終了しているか読み出し確認を行ったのに要
した回数を記憶するベリファイカウント記憶部を備えた
ことを特徴とするフラッシュ消去型不揮発性メモリ。
1. A flash comprising a verify count storage unit for storing the number of times required to confirm whether or not the erased cell area has been normally erased after the erase operation. Erasable nonvolatile memory.
【請求項2】 前記ベリファイカウント記憶部が記憶し
た前記回数までは、ベリファイを行わず、消去だけを行
う手段を設けた請求項1に記載のフラッシュ消去型不揮
発性メモリ。
2. The flash erase type non-volatile memory according to claim 1, further comprising means for performing only erase without performing verify up to the number of times stored in the verify count storage unit.
JP4163493A 1993-03-03 1993-03-03 Flash erasing type non-volatile memory Withdrawn JPH06259978A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4163493A JPH06259978A (en) 1993-03-03 1993-03-03 Flash erasing type non-volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4163493A JPH06259978A (en) 1993-03-03 1993-03-03 Flash erasing type non-volatile memory

Publications (1)

Publication Number Publication Date
JPH06259978A true JPH06259978A (en) 1994-09-16

Family

ID=12613766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4163493A Withdrawn JPH06259978A (en) 1993-03-03 1993-03-03 Flash erasing type non-volatile memory

Country Status (1)

Country Link
JP (1) JPH06259978A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0887894A (en) * 1994-09-20 1996-04-02 Mitsubishi Electric Corp Non-volatile semiconductor memory device
JP2012168996A (en) * 2011-02-10 2012-09-06 Toshiba Corp Nonvolatile semiconductor memory device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0887894A (en) * 1994-09-20 1996-04-02 Mitsubishi Electric Corp Non-volatile semiconductor memory device
JP2012168996A (en) * 2011-02-10 2012-09-06 Toshiba Corp Nonvolatile semiconductor memory device
US8913429B2 (en) 2011-02-10 2014-12-16 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device

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A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20000509