JPH06253380A - System for testing switch of communication equipment - Google Patents

Abstract

PURPOSE:To test the normality/abnormality of the switch part of an SBY system during communication. CONSTITUTION:The ACT/SBY identification imparting parts SGA of the switch parts 10 and 20 of an ACT system and the SBY system impart identification data for discriminating the time slots of ACT and SBY for the respective time slots and transmits them to a selector SEL and the selector selects and outputs the time slot data of the ACT. At the time of a test, the time slot to which the test data outputted from a test data generation part TDG are allocated is defined as the time slot of the SBY in the ACT system switch part 10 (the others are defined as the ACT) and is defined as the time slot of the ACT in the SBY system switch part 20 (the others are defined as the SBY). Thus, the selector SEL selects and outputs the test data passed through the SBY system switch part 20 and a test data checking part TDC judges the normality/ abnormality of the SBY system switch part 20 based on the received test data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switch test method for a communication device, and more particularly to a switch section for switching time division multiplexed data in time slot units.
The present invention relates to a switch test method for a communication device which is provided in each of the CT system) and the standby system (SBY system) and is duplexed.

[0002]

2. Description of the Related Art Broadly speaking, the communication paths of an STM (Synchronous Transfer Mode) switch can be divided into a switch section 1 and a subscriber response section 2 as shown in FIG. Person correspondence section 2a and destination subscriber correspondence section 2b
Can be divided into The switch unit 1 includes, for example, time switches (T-sw) 1a and 1c and space switches (S-s).
w) It has a three-stage configuration of 1b. Although not shown in FIG. 8, there are actually a plurality of subscriber-corresponding sections 2.
A multiplex unit for time-division-multiplexing data from a plurality of calling subscriber corresponding units exists between each calling subscriber corresponding unit 2a and the switch unit 1, and the switch unit 1 and the called subscriber corresponding unit. A demultiplexing unit for separating and transmitting the time division multiplexed data from the switch unit to a plurality of destination subscriber corresponding units exists between 2b and 2b. Further, although a plurality of time switches interface with the space switch 1b, they are omitted. The switch unit 1 switches the time-division multiplexed data in units of time slots according to the route. The switch section is duplicated in order to improve the reliability of the system. When one of the switch sections goes down due to a failure or the like, the switch section is switched to the other so that communication can be continued.

FIG. 9 is a diagram for explaining the duplex structure of the STM switch, and the same parts as those in FIG. 8 are designated by the same reference numerals. The switch unit 1'has the same structure as the switch unit 1 and is duplicated, but the subscriber corresponding unit remains single because of cost considerations. The first time switch 1a, 1a 'and the space switch 1b, 1 in the switch unit 1, 1'.
An intersystem interlinkage 3 is provided between b'for improving reliability. Intersystem entanglement can also be provided between the space switches 1b and 1b 'and the second time switches 1c and 1c' to further improve reliability. The data from the calling subscriber is sent by multicast from the calling subscriber corresponding unit 2a to the time switches 1a and 1a 'of the first stage of both systems which are duplicated. In the switch units 1 and 1 ′ of both systems, one system is operated as an active system (ACT or master) and the remaining one system is operated as a standby system (SBY or slave). In FIG. 9, the switch unit 1 is an ACT system and the switch unit 1'is an SBY system.

First stage time switches 1a and 1a 'of both systems
The data that has undergone switching in the space switches 1b, 1
Input to b '. In this case, since the intersystem confounding route 3 exists, the data switched by the first-stage time switch 1a is input to the space switches 1b and 1b 'of both systems and switched by the first-stage time switch 1a'. Similarly, the data is also input to the space switches 1b and 1b 'of both systems. The selectors SEL provided in the space switches 1b and 1b 'are used as a system (ACT
System), and select the space switches 1b, 1b '.
Performs spatial switching on the selected data.
Incidentally, which system is the ACT system or the SBY system is instructed to the selector SEL by a control unit (not shown).

The data subjected to the switching by the space switches 1b and 1b 'are the second stage time switch 1 respectively.
c, 1c ', and after being subjected to switching, they are input to the incoming subscriber corresponding portion 2b. Called subscriber support unit 2b
The selector SEL provided in selects the data from the system operated as the ACT according to an instruction from the control unit,
Send to destination subscriber. Therefore, the data is transferred from the calling subscriber to the called subscriber as shown by the dotted line, and the SBY data is blocked by each selector SEL. There are various methods for confirming the normality of the communication path system of the exchange, and one of them is the method of using test data.

FIG. 10 is an explanatory diagram of a communication path test system of an exchange using test data, and the same parts as those in FIG. 9 are designated by the same reference numerals. The test data is generated from the test data generating unit TDG in the calling subscriber corresponding unit 2a. This test data is put in a predetermined time slot (a time slot designated by the control unit 4) instead of the data from the calling subscriber, and the first stage time switch 1a of both systems,
It is input to 1a ', and then, while undergoing switching, it is guided to the called subscriber corresponding unit 2b via the space switch and the second stage time switch. The selector of the called subscriber corresponding unit 2b selects and outputs the test data from the ACT system. The test data check unit TDC provided in the called subscriber support unit 2b fetches test data from the time slot designated by the control unit 4 and checks the pattern to confirm the normality of the switch. In addition to the normality confirmation by the above test data, the normality of the interior of the communication path system is always confirmed by means such as a parity check.

[0007]

[Problems to be Solved by the Invention]
When an abnormality in the CT system communication path is detected, switching to the duplexed SBY system communication path is performed. For example, when an abnormality is detected in # 0 when # 0 is operated in the ACT system and # 1 is operated in the SBY system, ACT conversion of # 1 (SBY conversion of # 0) is performed. Looking at this at the destination subscriber corresponding unit 2b (or the input unit of the space switch), the data from the switch unit # 0 before switching is selected by the selector SE.
After passing through L, the data from # 1 also passes through the selector SEL after switching. When such a system switching is performed, a failure is latent in the switch section which has been the SBY system until then, and the data is transferred to the selector SE.
When L cannot be passed or when the selector SEL is passed, there is a case that a part of data is damaged. In such a case, even if the failure is detected in # 0 and the system is switched, the data is not normally transmitted even in # 1 due to the latent failure in # 1, and the system goes down. . In order to prevent this, it suffices that the test data switched by the switch unit of the SBY system can be checked by the test data check unit TDC during operation in the ACT system, but there is a problem that such a check cannot be performed by the hardware configuration according to the conventional technology. there were.

From the above, it is an object of the present invention that one system is AC.
It is an object of the present invention to provide a switch test method for a communication device capable of performing a normal / abnormal test of an SBY system when operated as a T system. Another object of the present invention is to provide a test method for a communication device that allows the test data to be checked by inputting the test data switched by the SBY system switch unit to the test data check unit while one system is operating as the ACT system. Is to provide.

[0009]

FIG. 1 is a diagram for explaining the principle of the present invention. Reference numerals 10 and 20 denote duplex switch units for switching time-division-multiplexed data in units of time slots. The switch unit 10 is currently the ACT system and the switch unit 20 is currently the SBY system switch unit. TDG is a test data generation unit provided in the calling subscriber support unit, TDC
Is a test data check unit provided in the receiving subscriber corresponding unit, and SGA is provided in each switch unit 10 and 20. Whether each time slot is an ACT time slot or SB
An ACT / SBY identification assigning unit that assigns identification data that identifies whether it is a Y time slot, and SEL is a selector that selects and outputs ACT time slot data from the time slot data output from the switch units 10 and 20. Is. L ₁₁ and L ₂₁ are transfer lines for sending time slot data to the selector, and L ₁₂ and L ₂₂ are identification data for identifying whether the time slot is an ACT time slot or an SBY time slot to the selector. This is the transfer line to be sent.

[0010]

The ACT / SBY identification switch SGA of the ACT and SBY switch sections 10 and 20 has identification data (ACT, SBY) for identifying the ACT time slot and the SBY time slot individually for each time slot. SB
Y) is added and sent to the selector SEL, and the selector A
The time slot data of CT is selected and output. Therefore, normally, the ACT / SBY identification assigning unit SGA of the ACT switch unit 10 sets all time slots to ACT, and SB
ACT / SBY identification giving unit SGA of the Y-system switch unit 20
By setting all the time slots to SBY, the selector SEL selects and outputs the data switched by the ACT switch unit 10. And during the test,
The time slot y to which the test data output from the test data generation unit TDG is assigned is set as an SBY time slot in the ACT system switch unit 10 (other time slots 1 to y-1, y + 1 to n are ACT time slots). (See (A)), and in the SBY system switch unit 20, ACT time slots are set (other time slots 1 to y−1 and y + 1 to n are SBY time slots, see (B)). As a result, the selector SEL is SB
The test data that has passed through the Y-system switch unit 20 is selected and output, and the test data check unit TDC provided in the subsequent stage of the switch unit SBY based on the received test data.
Whether the system switch unit 20 is normal or abnormal is determined. Due to the above, when one system is operated as an ACT system, SB
The test data switched by the Y-system switch unit can be input to the test data check unit to be checked by the test data, and the potential for failure of the SBY system can be prevented.

Further, the ACT / SB is provided in the switch parts 10 and 20.
Instead of the Y identification giving unit SGA, a test identification giving unit for giving identification data (TST, * TST) indicating whether or not each time slot is a test time slot is provided. The test identification assigning section of (1) uses the time slot to which the test data is assigned for testing (see (B) '). Selector SEL
Is an ACT system / S in the case of a test time slot
Regardless of the BY system, the data (test data) carried in the test time slot is selectively output, and the test data check unit TDC provided in the subsequent stage of the switch unit selects the SBY system switch unit based on the received test data. Two
Judge normality / abnormality of 0. Even in this case, when one system is operated as the ACT system, the test data switched by the SBY system switch unit can be input to the test data check unit to be checked by the test data, and the SBY system failure can be performed. Can be hidden.

[0012]

Embodiments (a) First Embodiment of the Invention Outline of the Invention (1) Configuration FIG. 2 is a conceptual diagram of the first embodiment of the present invention.
Is a duplexed switch unit for switching time-division multiplexed data in units of time slots, 30 is a calling subscriber corresponding unit, 40 is a receiving subscriber corresponding unit, and 50 is a control unit. The switch unit 10 is currently the ACT system, and the switch unit 20 is currently the S system.
Although it is a BY system, when an abnormality is detected in the current ACT system, the current SBY system is switched to the ACT system and the current ACT system is switched to the SBY system according to an instruction from the control unit 50. The TDG is a test data generation unit provided in the calling subscriber response unit 30,
The TDC is a test data check unit provided in the called subscriber support unit. It should be noted that the test data generation unit TDG and the test data check unit TDC may be provided in common for a plurality of subscriber corresponding units and a plurality of destination subscriber corresponding units, respectively.

The SGA is provided in each of the switch sections 10 and 20, and is 1-bit identification data (low level: ACT, high level: for identifying the ACT time slot or the SBY time slot for each time slot).
SBY) ACT / SBY identification assigning unit, SEL
Is a selector that selects and outputs ACT time slot data from the time slot data output from the switch units 10 and 20. A method of expressing the identification data with 2 bits or more is also conceivable. L ₁₁ and L ₂₁ are a plurality of transfer lines for sending time slot data to the selector SEL, L ₁₂ and L ₂₂ are one parallel running line, and the time slot is an ACT time slot or an SBY time slot. Identification data (ACT,
SBY) is run in parallel with the time slot data up to the selector SEL.

(2) Normal operation ACT / SBY system switch units 10 and 20 ACT /
The SBY identification assigning unit SGA uses AC for each time slot.
Identification data (ACT, SBY) for identifying whether the time slot is the T time slot or the SBY time slot is added and sent to the selector SEL.
The time slot data of T is selected and output. Normally, the ACT / SBY identification giving section S of the ACT system switch section 10
GA sets all time slots as ACT, and the ACT / SBY identification assigning section SGA of the SBY system switch section 20 sets all time slots as SBY. As a result, the selector SEL
Selects and outputs the data switched by the ACT switch unit 10. (3) Operation at the time of test On the other hand, at the time of test, the control unit 50 puts the test data on the input side time slot NO. x and the test data are switched to the output time slot NO. y is instructed to each of the switch units 10 and 20 and the test data check unit TDC. As a result, the ACT / SBY identification assigning unit SGA of the ACT system switch unit 10 sets the switching destination time slot y of the test data to the SBY time slot (other time slots 1 to y-1, y +).
1 to n are ACT time slots), and SBY
ACT / SBY identification giving unit SGA of the system switch unit 20
Defines the time slot y as the ACT time slot (other time slots 1 to y-1, y + 1 to n are SBY.
And the time slot).

In this state, the test data generator TDG
The output test data is put on the time slot x and input to the switch units 10 and 20. The switch unit 10 switches the test data to the time slot y and outputs the test data to the transfer line L _11, and at the same time, outputs the identification data indicating that the time slot y is the SBY time slot to the transfer line L ₁₂ . Incidentally, the data currently being communicated is assigned to the other time slots (1 to y-1, y + 1 to n) and outputted, and these time slots are ACT time slots. Further, the switch unit 20 switches the test data to the time slot y and outputs it to the transfer line L _21, and at the same time, outputs the identification data indicating that the time slot y is the ACT time slot to the transfer line L ₂₂ . Incidentally, the data being actually communicated is assigned to the other time slots (1 to y-1, y + 1 to n) and outputted, and these time slots are SBY time slots.

Since the selector SEL selects and outputs the data of the ACT time slot, the time slots 1 to
For y-1, y + 1 to n, the ACT system switch unit 10
The data output from the SBY system switch unit 20 is selected for the time slot y. Therefore, the test data switched by the SBY system switch unit 20 is selected and output by the selector SEL. The test data check unit TDC takes in the data (test data) of the time slot y designated by the control unit 50, checks whether the test data has a predetermined pattern, etc., and checks the SBY system switch unit. Determine 10 normal / abnormal.

The control for adding the ACT / SBY identification to the time slot when the time slot identification data addition control switch units 10 and 20 are constituted by one time switch will be described. 3 and 4 are explanatory diagrams of the time switch. The time switch has a switching memory SM that actually stores data to be transferred, a control memory CM that stores switching control data and that controls the address of the switching memory SM, and a time slot counter TSCN that indicates a time slot position. ing. This time switch is a first method (FIG. 3) in which writing to the memory SM is performed in time slot order and data reading from the memory SM is under the control of the control memory CM.
And vice versa, writing to the memory SM is controlled by the control memory C
There is a second method (FIG. 4) under the control of M and reading data from the memory SM in time slot order.
In any of the methods, the control memory CM is read in time slot order.

(1) Description of the first method of the time slot The data DT is set to the time slot NO. x from time slot NO. When switching to y, the first method is as shown in FIG.
As shown in FIG.
The read address x of M is stored. In this state, the time slot NO. At x, the data DT is stored at the x address of the memory SM (see FIG. 3 (a)).
In this case, the read address z of the memory SM is read from the x address of the control memory CM, and the data D is read from the storage area of the memory SM designated by the read address z.
T'is read out. Thereafter, the switching process continues, and the time slot counter TSCN indicates the time slot NO. When y is designated, the read address x of the memory SM is read from the y address of the control memory CM, and the data DT is read from the storage area of the memory SM designated by the read address x (FIG. 3 (b)). That is, the time slot NO. The data DT of x is the time slot NO.
It means that it has been switched to y.

(2) Description of the second method of the time slot The data DT is set to the time slot NO. x from time slot NO. When switching to y, the second method is shown in FIG.
As shown in FIG.
The write address y of M is stored. In this state, the time slot NO. At x, the control memory CM
Write address y of the memory SM is read from the x address of the memory SM, and the memory SM designated by the write address y is read.
The data DT is stored in the storage area. In this case, the data DT 'is read from the address x of the memory SM (see FIG. 4 (a)). After that, the switching process continues,
Time slot counter TSCN indicates time slot N
O. When y is designated, the storage data DT is read from the address y of the memory SM. That is, the time slot NO. The data DT of x is the time slot NO. It means that it has been switched to y. In this case, from the y address of the control memory CM to the write address z of the memory SM
Is read, and the data DT ″ is stored in the storage area of the memory SM designated by the write address z.

(3) Identification data addition control when the first type time switch is used FIG. 5 is an explanatory diagram of identification data addition control when the first type time switch is used. The control memory CM is a memory. ACT of time slot other than read address of SM
Identification data (1 bit) indicating / SBY is stored. The test data TEST DT is set to the time slot NO. x from time slot NO. When switching to y, the memory S is assigned to the y address of the control memory CM.
The read address x of M and the identification data (ACT) are stored. In this state, the time slot NO. At x, the test data TEST DT is stored in x of the memory SM.
It is stored in the address (see FIG. 5 (a)). In this case, the read address z of the memory SM and the identification data (SBY) are read from the x address of the control memory CM,
The data DT is read from the storage area of the memory SM designated by the read address z and output to the transfer line L ₂₁ . Also, the identification data (SBY) of the least significant bit is output to the parallel running line L ₂₂ , is run parallel to the data DT, and is input to the selector SEL (see FIG. 2) in the next stage.

Thereafter, the switching process continues, and the time slot counter TSCN indicates the time slot NO. When y is designated, the memory S is read from the y address of the control memory CM.
The read address x of M and the identification data (ACT) are read, and the test data TEST DT is read from the storage area of the memory SM indicated by the read address x (FIG. 5B). Also, the identification data (ACT) of the least significant bit
Are output to the parallel running line L ₂₂ , run parallel to the test data DT, and input to the selector SEL of the next stage. From the above, the time slot NO. x test data TEST DT is the time slot NO. It means that it has been switched to y. Although FIG. 5 shows an example in which identification data is added to the SBY system time switch, in the case of the ACT system time switch, SBY and ACT of the least significant bit are set to be opposite to those in the SBY system. The operation becomes the same just by being done.

(4) Identification data addition control when the second type time switch is used FIG. 6 is an explanatory diagram of identification data addition control when the second type time switch is used. The control memory CM is a memory. ACT of time slot other than read address of SM
Identification data (1 bit) indicating / SBY is stored. The test data TEST DT is set to the time slot NO. x from time slot NO. When switching to y, in the second method, as shown in FIG. 6A, the write address y of the memory SM is stored in the x address of the control memory CM, and the least significant bit of the y address of the control memory CM is stored. To ACT (least significant bits of other addresses are SBY). In this state, the time slot NO. At x, the write address y and SBY of the memory SM are read from the x address of the control memory CM, and the test data TEST DT is stored in the memory area of the memory SM designated by the write address y.
In this case, the data DT is read from the address x of the memory SM.
Is read out and output to the transfer line L _21, and the identification data (SBY) of the least significant bit is output to the parallel running line L ₂₂ and runs parallel to the data DT and the selector SEL of the next stage (see FIG. 2). ) Is entered. (See FIG. 6 (b)).

Thereafter, the switching process continues, and the time slot counter TSCN indicates the time slot NO. When y is designated, the test data TEST DT is read from the address y of the memory SM and output to the transfer line L ₂₁ . In parallel with the above, the write address z of the memory SM and the identification data (ACT) are read from the y address of the control memory CM, the identification data ACT is output to the parallel running line L ₂₂ , and the same as the test data TEST DT. It is run and input to the selector SEL (see FIG. 6 (c)).
Further, the data DTA is stored in the storage area of the memory SM designated by the write address z. From the above, the time slot NO. x test data TEST DT is the time slot NO. It means that it has been switched to y. Although FIG. 6 shows an example in which identification data is added to the SBY system time switch, in the case of the ACT system time switch, the least significant bits SBY and ACT are set to be opposite to those in the SBY system. The operation becomes the same just by being done.

From the above, usually, the identification data (ACT / SBY) in the control memory CM of the ACT system time switch
Are all set to ACT and all identification data (ACT / SBY) in the control memory CM of the SBY system time switch is set to SBY, the data switched by the ACT system time switch is selected by the selector SEL and output. When the test data TEST DT is passed, the test data time slot NO. The setting of the identification data stored in the control memory address corresponding to is reversed from the normal setting. In this way, only the test data among the data switched by the SBY system time switch is selected by the selector SEL, and the other data is selected and output by the ACT system time switch. Therefore, when the above method is applied to the first-stage time switches 1a and 1a 'of FIG. 9, the space switches 1b and 1a
The selection operation of the selector SEL of b'can be controlled, and the normality / abnormality of the time switches 1a and 1a 'can be tested. Further, when the above method is applied to the second-stage time switches 1c and 1c 'of FIG. 9, the selection operation of the selector SEL of the called subscriber support unit 2b can be controlled, and the time switches 1c and 1c' etc.
Can test for anomalies.

When there is an intersystem confounding route between the space switches 1b and 1b 'and the second-stage time switches 1c and 1c', selectors are provided immediately before these time switches 1c and 1c '. To be Even in such a case, since the space switches 1b and 1b 'are under the control of the control memory CM, the selection operation of the selector can be controlled by applying the above method to the control memory CM, and the space switch or the like can be operated normally. / Can test for abnormalities. In the above description, one of the writing and reading of the switching memory SM is under the control of the control memory CM, but the above method is similarly applied to the time switch in which both the writing and the reading are under the control of the control memory CM. Can be configured to run the identification data in parallel with the time slot.

(B) Second embodiment (1) Configuration In the first embodiment, ACT / SBY is discriminated in the time slot, but the SBY system is discriminated by discriminating whether the time slot is a test time slot or not. It is also possible to send the test data switched by the switch unit of the above to the test data check unit. FIG. 7 is a schematic configuration diagram of the second embodiment of the present invention in such a case, and the same parts as those of the first embodiment of FIG. 2 are designated by the same reference numerals. In the switch units 10 and 20, the TSA is a test identification assigning unit that assigns 1-bit identification data (low level: TST, high level: * TST) indicating whether each TSA is a test time slot, SEL. ′ Is A designated by the control unit 50
Selects and outputs data from the CT system switch, and in the case of a test time slot, ACT system / SBY
It is a selector that selectively outputs data (test data) carried in the test time slot regardless of the system. L ₁₁ and L ₂₁ are selectors S for time slot data.
A plurality of transfer lines L ₁₂ and L ₂₂ to be sent to the EL are one parallel running line, and the identification data (TST, * TST) indicating whether or not the time slot is for test is selected by the selector SE.
The time slot data is run in parallel up to L '.

(2) Normal operation The test identification assigning unit TSA of the switch units 10 and 20 of the ACT system and the SBY system assigns identification data for identifying whether each time slot is a test time slot or not. It is sent to the selector SEL '. Usually ACT system,
Test identification giving section TS of SBY system switch sections 10 and 20
In A, all time slots are for non-test. As a result,
The selector SEL 'normally selects and outputs the data switched by the ACT system switch unit 10 instructed by the control unit 50. (3) Operation at the time of test On the other hand, at the time of test, the control unit 50 puts the test data on the input side time slot NO. x and the test data are switched to the output time slot NO. y to S
BY system switch unit 20 and test data check unit TD
Instruct C. As a result, the test identification assigning unit TSA of the SBY system switch unit 20 uses the switching destination time slot y of the test data as a test time slot (other time slots 1 to y-1, y + 1 to n are for non-test use). To).

In this state, the test data generator TDG
The output test data is put on the time slot x and input to the switch units 10 and 20. The switch unit 10 switches the test data to the time slot y and outputs it to the transfer line L ₁₁ , and simultaneously outputs the identification data * TST indicating that the time slot TS _y is a non-test time slot to the transfer line L ₁₂ . To do. still,
Data in actual communication is assigned to the other time slots (1 to y-1, y + 1 to n) and output, and these time slots are also for non-test. Further, the switch unit 20 switches the test data to the time slot y and outputs it to the transfer line L _21, and at the same time, the identification data TST indicating that the time slot y is for test.
Is output to the transfer line L ₂₂ . Incidentally, the data being actually communicated is assigned to the other time slots (1 to y-1, y + 1 to n) and outputted, and these time slots are for non-test use.

Since the selector SEL 'selects and outputs the data from the ACT system switch section except for the test time slot, the ACT system switch section 10 outputs the time slots 1 to y-1, y + 1 to n. Select data. However, in the case of a test time slot, the selector SEL 'selectively outputs the data (test data) carried in the test time slot regardless of the ACT system / SBY system. Therefore, the test data switched by the SBY system switch unit 20 is selected and output by the selector SEL ′, and the test data check unit TDC fetches the data (test data) of the time slot y designated by the control unit 50,
Whether the test data has a predetermined pattern or not is checked to determine whether the SBY system switch unit 20 is normal or abnormal. Although the present invention has been described above with reference to the embodiments, the present invention can be variously modified according to the gist of the present invention described in the claims, and the present invention does not exclude these.

[0030]

As described above, according to the present invention, the ACT / SBY recognition is provided for each time slot, and the selector allows the data having the ACT recognition to pass therethrough. By giving the ACT recognition to the test data switched by the switch unit, the test data can be input to the test data check unit to determine whether the SBY system switch unit is normal or abnormal.
It is possible to prevent latent Y system failures. According to the invention,
Give each time slot recognition whether it is for testing or not,
In the selector, the data normally output from the ACT system switch is passed, and in the case of the test time slot, the data (test data) put in the test time slot is selected and output regardless of the ACT / SBY system. Since it is configured so that the test data switched by the SBY system switch has a recognition for the test even during communication, the test data is input to the test data check unit and the SBY system switch unit operates normally. /
It is possible to determine an abnormality and prevent the potential for SBY system failures.

[Brief description of drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a conceptual diagram of the first embodiment of the present invention.

FIG. 3 is an explanatory diagram of a first method of a time switch.

FIG. 4 is an explanatory diagram of a second method of the time switch.

FIG. 5 is an explanatory diagram of identification data addition control (first method).

FIG. 6 is an explanatory diagram of identification data addition control (second method).

FIG. 7 is a configuration diagram of a second embodiment of the present invention.

FIG. 8 is a schematic configuration diagram of an STM exchange.

FIG. 9 is an explanatory diagram of a duplex configuration of an STM exchange.

FIG. 10 is an explanatory diagram of a test method using test data.

The switch unit has been 10, 20 ... duplex [Description of the code] TDG ·· test data generator TDC ·· test data check unit SGA ·· ACT / SBY identification assigning unit SEL ·· selector L _11, L ₂₁ ·· time Slot data transfer line L ₁₂ , L ₂₂ ... Identification data transfer line

Claims (4)

[Claims] 1. A switch unit for switching time-division multiplexed data in units of time slots, which is an active system (ACT).
System) and a standby system (SBY system), which are duplicated respectively, and in the switch test method of the communication device which selects and sends the output of the ACT system switch unit by the selector, in the ACT system and SBY system switch units, Identification data is added to each time slot to identify whether it is an ACT time slot or an SBY time slot, and the selector selects and outputs ACT time slot data. The time slot to which the test data output from the generator is assigned is the SBY time slot in the ACT system switch section, the ACT time slot in the SBY system switch section, and the selector passes the SBY system switch section. Select the data and output it. The switch test method for a communication device, wherein the test data check unit determines whether the SBY system switch unit is good or bad based on the received test data. 2. The switch has a time slot of AC.
A line for transferring identification data for identifying whether it is a T time slot or an SBY time slot,
The selector identifies the ACT / SBY of the time slot based on the identification data input through the line, and the AC
2. The switch test system for a communication device according to claim 1, wherein the ACT time slot data output from the T-system and SBY-system switch units is selected and output. 3. A switch unit for switching time-division-multiplexed data in units of time slots, which is an active system (ACT).
System) and a standby system (SBY system) are provided for duplication, and in the switch test method of the communication device that selects and outputs the ACT system switch unit output by the selector, in the switch unit, a time slot is individually tested for testing. When the test is carried out, the SBY system switch section assigns the test data output from the test data generating section before the switch section to the test slot. Slot and the selector is AC in the case of a test time slot.
Regardless of the T / SBY system, the test data of the test time slot is selectively output, and the test data check unit provided after the switch unit determines whether the SBY system switch unit is good or bad based on the received test data. A switch test method for a communication device characterized by: 4. The switch section includes a line for transferring identification data for identifying whether or not the time slot is a test time slot, and the selector is based on the identification data input via the line. 4. The switch test method for a communication device according to claim 3, wherein the test data is selected by identifying whether or not the time slot is for testing.