JP3156465B2 - Multiplexer with automatic diagnosis function - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplexer for multiplexing information inputted from a line and a transmission line.

[0002] With the progress of digitalization, digital communication equipment has been introduced into an intra-company communication network, and along with this, a method of compressing and transmitting voice information has been used as a means for reducing communication costs. I have. In this system, analog voice or 64 kbps PCM coded voice is converted to 1 / n of 64 kbps, for example, 8 kbps or 16 kbps.
Converts to encoded audio information at a bit rate such as bps,
64 kbps of multiple coded audio information heading for the same pair
Multiplexed on the signal path of.

A multiplexing apparatus used for such an application includes a line set section constituting an interface portion with a line connected to a terminal or a private branch exchange, a conversion section for converting a bit rate of information, and a transmission section. Multiplexes and demultiplexes information (hereinafter, referred to as multiplex conversion) between channels, and a network port unit that forms an interface unit with the transmission line, and a common unit such as a control unit or a memory that controls these units. It consists of.

In the multiplexing apparatus described above, each part (except for the common part) is in the form of a package, and the package, the line, the transmission line, and the common part are interconnected via an internal bus by inserting the package into a connector. It is common to adopt such a structure.

However, since the multiplexing device has a lot of information multiplexed therein, it is difficult to diagnose the added package when the package is added during operation.
In the past, it was common to not add packages during operation. In addition, when an abnormality occurs during operation, it is necessary to perform a diagnosis according to a complicated procedure, and it takes time to isolate an abnormal package.

For this reason, there is a demand for a multiplexing apparatus having a function of efficiently diagnosing an additional package in operation and performing a test for identifying an abnormal package.

[0007]

2. Description of the Related Art FIG. 12 is a block diagram of a multiplexing apparatus according to the prior art. Since the basic part of the multiplexing apparatus is common to the multiplexing apparatus according to the present invention, an embodiment of the present invention will be described below. The implementation of the multiplexing device using FIGS. 4, 5 and 7;
The internal connection state and the contents of the line information will be described.

FIG. 12 illustrates the main components of the multiplexer. As shown in the figure, a multiplexing device 50 is provided between a line 1 and a digital transmission line (hereinafter, referred to as a transmission line) 2 which are connected to a telephone 8 or a terminal 9 directly or via a private branch exchange (hereinafter, referred to as a PBX) 7. Installed in A line set unit (hereinafter, referred to as an LS unit) 51a forms an interface with the line 1, and a conversion unit 51b converts a bit rate of information transmitted and received on the line 1 and a bit rate of information transmitted and received on the transmission line 2. It is. A network port unit (hereinafter, referred to as an NP unit) 51c constitutes an interface with the transmission line 2, and performs multiplex conversion of information transmitted and received on the transmission line 2.

The control unit 52a and the memory 52b are
The internal bus 3 is a bus that connects each unit in the multiplexer 50. Test part 4
Are the LS unit 51a, the conversion unit 51b, and the NP unit via the internal bus 3.
Test for 51c.

Each of the LS unit 51a, the conversion unit 51b, and the NP unit 51c has a package structure and is mounted on the multiplexer 50 by being inserted into a connector (not shown). In the following description, they are described as LS board 51a, conversion board 51b, and NP board 51c, respectively.
Each board is generally referred to as a package. A plurality of these packages are used in accordance with the type of the line 1 and the transmission line 2, the conversion ratio, the number of mounted circuits, and the like.

FIG. 4 shows an implementation example of a multiplexing device.
In the case of the multiplexing device 50 of the prior art, reference numerals 30, 31a, 31
b, 31c, and 32 are replaced with 50, 51a, 51b, 51c, and 52a, respectively, and the following description is made using the reference numerals shown in FIG. 4 for convenience. The control unit 32 in FIG. 4 is a combination of the control unit and the memory.

The multiplexing apparatus 30 shown in FIG. 4 has four stages of shelves, and a control unit 32 and a test panel 4 constituting a common part are fixedly mounted at the lowest stage, and multiplexing is performed on three stages above the same. Device 30
LS board 31a, conversion board 31b,
The required number of NP boards 31c are mounted. In FIG. 4, the LS board 31a is in the lower row, the conversion board 31b is in the middle row, and the NP board 31 is in the lower row.
c is mounted, but the mounting position is determined for each type of package, and the package is shared so that any package (excluding the package of the common part) may be mounted at any position There is.

In FIG. 4, LS board 31a, conversion board 31b, N
Numerals 1-1 to 3-9 attached to the upper part of the P board 31c are codes for identifying a package mounting position, "i" of "ij" is a numeral for identifying a shelf, and "j" Is a number that identifies the mounting location within the shelf. In order to avoid confusion with other codes, “M _ij ” is used to describe the mounting position, and “LS board 31a” is replaced with “LS board” when referring to a package mounted at a specific mounting position “M _ij ”. (M _ij ) "
It is described as follows.

A panel 39 having keys for inputting information for controlling the multiplexing apparatus and a display unit for performing various displays (both not shown) is provided at the uppermost stage of the multiplexing apparatus 30. I have. In addition, a power panel and an expansion panel are mounted, but the description is omitted because it is not directly related to the present invention.

FIG. 5 is a diagram for explaining the internal connection of the multiplexer. Since the LS board 31a, the conversion board 31b, and the NP board 31c in FIG. 5 are described as corresponding to a part of the package illustrated as the mounting package in FIG.
Similarly, the reference numerals 50, 51a, 51b, 51 used in FIG.
Description will be made by using reference numerals 30, 31a, 31b, and 31c instead of c.

Each package in the multiplexer 30 in FIG. 5 is connected by an internal bus 3. The internal bus 3 has an internal highway configuration for time-division multiplexing information of a fixed number of bits. It is shown as a bus capable of multiplexing 64 kbps information of 8 bits up to 152 time slots. Each package is logically connected by specifying a time slot. Hereinafter, a signal path formed by specifying a time slot is referred to as a path. Each time a path is connected between the internal devices, a time slot is selected and formed, or a fixed or semi-fixed time slot is allocated in advance. The path formed by the latter is called a fixed path or a semi-fixed path. The path between the LS board 31a and the conversion board 31b and between the conversion board 31b and the NP
A semi-fixed path is set between the boards 31c. The internal bus 3 is provided for each of the up / down directions.
FIG. 6 shows only one direction.

FIG. 5 shows the mounting positions M _1-1 , M _1-2 ,
Although three LS board 31a mounted on the M _1-5 is shown, the circuit corresponding to each 64kbps voice lines or digital data line for each LS board 31a is 8 circuit (No.1
~ No.8) It is installed. Further, as the conversion board 31b, three conversion boards 31b mounted at mounting positions M _2-1 , M _2-2 , and M _2-6 in FIG. 4 are illustrated, but the conversion board (M _2-1 ) And the conversion board (M _2-2 ) are equipped with eight conversion circuits (No. 1 to No. 8) each of which converts a 64 kbps information to 8 kbps, and the conversion board (M _2-6 ) is 64 kbps. 32kbp of information
It is illustrated as a conversion board equipped with two conversion circuits (No. 1 and No. 2) each of which converts a signal to s. The same applies to the connection in the case where the compression information of 8 kbps or 32 kbps is restored to 64 kbps.

As the NP board 31c, the mounting position M _3-1 shown in FIG.
And the NP board 31c mounted on the M _3-7 are shown,
The NP board (M _3-1 ) multiplexes 24 time slots of 64 kbs, and transmits a 1.5 Mbps numbered transmission line # 1 (hereinafter referred to as a transmission line # 1 when indicating an individual transmission line). , And the NP board (M _3-7 ) is shown as an example connected to a transmission line # 4 of 64 kbs. Transmission line 2 is 64 kbps of a public communication network including ISDN or a corporate communication network.
In this case, even a subscriber line constitutes a multiplex transmission line obtained by multiplexing eight lines of information compressed to, for example, 8 kbps. The time slot number of the transmission path 2 is shown denoted by TS, TS1～TS23 in NP Edition (M _3-7) are those corresponding to the transmission path # 1 time slot.

Next, the internal connection in the direction from the line 1 to the transmission line 2 will be described. Lines # 1 to # 16 in FIG. 5 may be PCM lines or analog lines,
64k in LS board 31a for analog voice line
It is assumed that the signal is converted to a bps PCM signal. Therefore,
For example, the No.1 circuit LS board of FIG. 6 (M _1-1) PBX7
The line # 1 (hereinafter referred to as line # 1 when referring to an individual line) is connected, but from the No. 1 circuit of the LS board ( _M1-1 ), a 64 kbps line is connected. Information is output.

The information of 64 kbps is set in the LS board (M _1-1 ) so as to be output to a semi-fixed path, that is, a predetermined time slot in the internal bus 3. In this example, the time slot number is output to time slot 0 (the time slot number of the internal bus 3 is written as BS0 to distinguish it from the time slot of the transmission line 2), and is output to the No. 1 circuit of the conversion board (M _2-1 ). Is entered.

The information input to the No. 1 circuit of the conversion board (M _2-1 ) is compressed from 64 kbps to 8 kbps,
It is output to a time slot (BS21 in this example) set as a semi-fixed path. Each time slot of the internal bus 3 is composed of 8 bits, and can transfer information of 64 kbps. However, when transferring information of 8 kbps, only one bit is used, so that the conversion board (M _2-1) is used. ) N
The information of 8 kbps output from the o.1 circuit specifies not only the time slot number (BS21) but also the bit number in the time slot (not shown in FIG. 6).

The information of other lines is allocated to the remaining 7 bits of BS21. In FIG. 5, the information inputted from line # 9 is the No. 1 circuit of LS board (M _1-2 ), internal bus 3 Of B
8kbps via S8 and No.1 circuit of conversion board (M _2-2 )
The example is shown in which the data is compressed and output to the same BS 21. Although only the information of the above two lines is shown in BS21 in the figure, information of up to six lines can be added if the information is 8 kbps. If the total is 64 kbps or less, not only 8 kbps but also 16 or 32 kbps Can be mixed. Therefore, the NP board (M
_{In 3-1} ), information for up to eight lines is input via the same time slot BS21.

The information of the BS 21 input to the NP board (M _3-1 ) is multiplexed with information of another time slot in the multiplex conversion section in the NP board and transmitted to the transmission line # 1. In this example, the information of BS21 is multiplexed and transmitted to time slot TS0 of transmission line # 1 of 1.5 Mbps.

FIG. 5 shows an example in which line # 16 is a high-quality voice line. When one of the telephones 8 (TEL-3) dials a predetermined number specifying a high-quality voice line, the PBX 7 connects to a line # 16 which is one of the high-quality voice lines. The voice information of line # 16 is LS
No.1 of the board conversion board through the No.8 circuit of (M _1-2) (M _2-2)
The data is input to the circuit, compressed into audio information of 32 kbps, and output to the BS 29 of the internal bus 3. This information is transmitted to the time slot TS22 of the transmission line # 1 on the NP board (M _3-1 ).
Are multiplexed. The time slot B of the internal bus 3
When the information carried in S29 is only 32 kbps, only information of two lines is carried.

Next, a case where information such as data that cannot be compressed is input will be described. Although the terminal 9 is connected to the line # 17 in FIG. 5, since the data output from the terminal 9 cannot be compressed, as shown in FIG.
, And is directly connected to the NP board 31c from the LS board (M _1-5 ). In this case, the time slot BS23 of the internal bus 3
Is exclusively used for the information of the line # 17, and the information is sent to the NP board (M _3-1 ). The NP board (M _3-1 ) multiplexes this information into a predetermined time slot, for example, TS23, and transmits the multiplexed information to the transmission path 2.

The information transmitted to the transmission line 2 as described above is connected to a similar multiplexing device on the other side, demultiplexed via the reverse path, and the compressed audio information is restored to 64 kbps. To the telephone or terminal directly or via the PBX. Therefore, voice information is transmitted and received at 64 kbps between the telephones at both ends, but is transmitted at a transmission rate of less than 64 kbps on the transmission path 2, so that the cost of the transmission path can be reduced.

In order to use such a multiplexing apparatus, it is necessary to make an internal connection as shown in FIG. 5 and confirm the operation. In order to find out, the internal connection must be separated, but a description will be given below using a conventional method of setting an internal connection and a diagnosis method.

In the prior art, when the multiplexer 50 shown in FIG. 12 is installed, the LS board 51a, the conversion board 51b, and the NP board
The user inputs the mounting position information of each package 51c and the line setting information that specifies the package to be connected, etc., and instructs execution of a predetermined initial setting process. In response to this instruction, the control unit 52a allocates a time slot of the internal bus 3 used between the packages and sets a semi-fixed path. After the semi-fixed path is set, the test unit 4 diagnoses each package under the control of the control unit 52a.
After setting a test path by the internal bus 3 between the circuits of the package that is diagnosed as, the test section 4 tests the circuit of each package via this test path.

However, the above initial setting processing is performed by the multiplexer.
Since it is performed when the operation of the multiplexing device 50 is started, it cannot be used after the operation of the multiplexing device 50 is started, and even if a package is added during the operation of the multiplexing device 50, the control unit 52a cannot detect this. Therefore, the setting and diagnosis of the semi-fixed path are not automatically performed for the extension package.

When an error occurs in a line during the operation of the multiplexing device 50, the line in which the error has occurred is displayed on the panel 39 shown in FIG. To find out, first check the packages connected to the line in some way,
The confirmed packages are cut and tested one by one. This separation test is complicated because the time slot of the internal bus 3 connecting the test section 4 and the package under test is designated each time.

[0031]

As described above, when a new package (internal device) is added during the operation of the multiplexing device, the multiplexing device of the prior art sets the internal connection to the additional package. Is not automatically diagnosed,
These had to be done manually. There is a possibility that erroneous operation may occur in a manual operation, which may affect other lines or the like. Therefore, the operation of adding a package is performed when the multiplexer is in a non-operation state. For this reason, there has been a drawback that the package cannot be easily added, and the efficiency is poor due to manual operation.

When an abnormality occurs in a line, a maintenance person confirms a package connected to the line in which the abnormality has occurred, designates the packages one by one, and sets a test path between the package and the test unit. There is a problem that it takes time for the diagnosis to be performed.

An object of the present invention is to provide a multiplexing device having an automatic diagnosis function for an internal device.

[0034]

FIG. 1 is a basic configuration diagram of the present invention, and FIG. 2 is another basic configuration diagram of the present invention. In the figure, 1 is a terminal (not shown) directly or a private branch exchange (not shown)
2 and a transmission line, and 10 and 20 are provided between the line 1 and the transmission line 2, and control a plurality of internal devices 11 or 21 connected by the internal bus 3 under the control of the control unit 11 or 12. This is a multiplexing device that multiplexes or demultiplexes information input from the line 1 or the transmission line 2 via the transmission line.

Reference numeral 3 denotes the internal buses of the multiplexers 10 and 20;
Are internal devices implemented in the multiplexing devices 10 and 20, respectively.
Reference numerals 12 and 22 denote control units for controlling the insides of the multiplexers 10 and 20, respectively. Reference numeral 4 denotes internal devices 11 and 21 mounted on the multiplexers 10 and 20.
Is a folding circuit provided in the internal device 11 or 21 for turning back the internal bus 3 through the internal circuit under the control of the control unit 12 or 22, and 6 is provided in the internal device 11 This is a type information storage unit that stores the type information in advance and sends it out when requested by the control unit 12.

Reference numerals 13 and 23 are provided in the control units 12 and 22, respectively, and use information indicating a connection relation between the internal device 11 or 21 connected between the line 1 and the transmission line 2 and the internal bus 3 as line information as line information. This is a line information storage means for storing correspondingly. 16,
Reference numeral 26 denotes a test path provided in the control units 12 and 22 and set between the internal device 11 or 21 to be tested and the test unit 4 using the internal bus 3.

14 to 15 and 17 to 18 are provided in the control unit 12, and 14 is a line 1 and a transmission line connected to the internal device 11 when the internal device 11 is newly mounted on the multiplexer 10. A line setting information storage unit 15 for storing information of the internal device 11 and the other internal devices 11 in advance as line setting information; and 15 when the mounting position information of the newly mounted internal device 11 is inputted, The line setting information is read from the type information of the internal device 11 and the line setting
Allocate internal bus 3 for use between 11 and other internal devices,
Line setting means for storing information of the assigned internal bus 3 in the internal device 11 and outputting line information indicating the connection relationship of the internal device 11 to the line information storage means 13 and the test path setting means 17.

Reference numeral 17 designates, when receiving line information from the line setting means 15, setting a test path 16 between the newly installed internal device 11 and the test section 4, and controlling the loopback circuit 5 of the internal device 11. A test path setting means 18 for turning back the test path 16 and instructing the test section 4 to execute the test after the test path setting means 17 sets the test path 16 and sending the test section 4 after the test execution. The diagnostic control means outputs the received test result for display or recording.

Reference numerals 25, 27, and 28 are provided in the control unit 22. When the control unit 22 receives a request for diagnosing a line, the line 25 inputs line information on the corresponding line 1 from the line information storage means 23, When the information of the internal device 21 selected by the predetermined method from the input line information and the internal bus 3 connected to the internal device 21 is transmitted to the test path setting means 27, and there is a transmission request for the next information Secondly, a diagnosis target selecting means for transmitting untransmitted information in a predetermined order.

Reference numeral 27 designates, when information on the internal device 21 and the internal bus 3 is received from the diagnosis target selecting means 25, a test path 26 is set between the internal device 21 and the test section 4 using the internal bus 3, and This is a test path setting means for controlling the return circuit 5 of the internal device 21 to return the test path 26.

Reference numeral 28 denotes an instruction for executing a test to the test section 4 after the test path setting means 27 sets the test path 26, and after the test section 4 tests the internal device 21 through the test path 26, When notifying that there is no abnormality, it requests the diagnosis target selection means 25 to send the following information. When the test unit 4 notifies that there is an abnormality in the test result, the test result is transmitted. This is a diagnostic control unit that outputs for display or recording.

[0042]

FIG. 1 is a basic block diagram of a multiplexing device having a function of automatically diagnosing an internal device 11 newly mounted on a multiplexing device 10 in operation. In the figure, only one set of internal devices newly installed (added) is shown.

In the multiplexer 10 shown in FIG. 1, a plurality of different types of internal devices are connected between the line 1 and the transmission line 2, and the internal devices 11 are connected by the internal bus 3. Since there are many types of internal devices 11, type information for identifying what kind of internal device the internal device 11 is stored in the type information storage unit 6 of the internal device 11,
When requested by the control section 12, the type information is transmitted.

The internal device 11 is newly added to the operating multiplexer 10.
Is implemented, the maintenance person uses the means not shown in the figure to identify the internal device 11, the number of the line 1 connected to the internal device 11, the type information of another internal device 11 (not shown), Mounting position information and the like are stored in advance in the line setting information storage unit 14 as line setting information. The line setting information does not include information on the internal bus 3 used between the internal device 11 and another internal device 11.

When the new internal device 11 is mounted at a predetermined mounting position and the mounting position information is input, the line setting means
Reference numeral 15 denotes the type information of the added internal device 11 via the type information storage means 6 of the internal device 11, and accesses the line setting information storage means 14 to access the line setting information related to the internal device 11. And allocates the internal bus 3 (line setting) between the internal device 11 and the other internal devices 11.

When the assignment of the internal bus 3 is completed, the line setting means 15 transmits the information of the assigned internal bus 3 to its internal device 11.
Send to memorize. In addition, information indicating the connection relationship is stored in the line information storage unit 13 as line information,
In order to request a test of the newly installed internal device 11, the line information is sent to the test path setting means 17.

When the test path setting means 17 receives the line information from the line setting means 15, the test path setting means 17 sets a test path 16 between the newly installed internal device 11 and the test section 4, and sets the return circuit 5 of the internal device 11 And the test path 16 is turned back. When these operations are completed, the test path setting unit 17 requests the diagnosis control unit 18 to execute a test.

Upon receiving the notification that the test path 16 has been set from the test path setting means 17, the diagnostic control means 18 instructs the test unit 4 to execute a test. The test unit 4 sends a predetermined test signal to the newly installed internal device 11 using the set test path 16. This signal is looped back by the loop-back circuit 5 in the internal device 11 and returned to the test unit 4. Therefore, the test unit 4 checks the normality of the internal device 11 by comparing the transmitted signal with the returned signal. Then, the result is notified to the diagnosis control means 18. The diagnostic control means 18 outputs the test result to a display unit or a storage unit (not shown) for displaying or recording the test result.

As described above, in the configuration of FIG.
Even when 10 is in operation, if only the mounting position information of the internal device 11 to be added is input, the line setting and the diagnosis of the internal device 11 are automatically performed, so that the internal device 11 can be easily added.

FIG. 2 shows a basic configuration diagram of a multiplexing apparatus having a function of automatically diagnosing the inside of the multiplexing apparatus when an abnormality occurs in the line during operation. In FIG. Only two internal devices 21 are shown as internal devices connected between the two. Hereinafter, the operation and operation of FIG. 2 will be described.

When a failure occurs in the internal device 21 or the internal bus 3 in the multiplexing device 20, the failed internal device 21 may be displayed depending on the type of the failure. Usually, only the occurrence is displayed, and not what part in the multiplexer 10 is abnormal is usually displayed.

When an abnormality occurs in the line 1, the line in which the abnormality has occurred is displayed on a display unit (not shown). When the maintenance person designates the line and requests a diagnosis by means not shown, the diagnosis request is input to the diagnosis target selecting means 25 in the control unit 22. Note that the control unit 22 itself can activate the diagnosis target selection unit 25 when the control unit 22 detects an abnormality, but the subsequent operation is the same.

Upon receiving the line diagnosis request, the diagnosis target selecting means 25 accesses the line information storage means 23 to obtain line information indicating the internal device 21 connected to the line 1 and the like. In the case of FIG. 2, the information of at least the two internal devices 21 shown and the internal bus 3 used between them is input, and the diagnosis target selecting means 25 uses a predetermined method from the information. One internal device 21 is selected, and the internal device 21 and the internal bus 3 connected thereto are selected.
Is transmitted to the test path setting means 27. If the predetermined selection method is, for example, to select sequentially from the internal device 21 close to the line 1, the internal device 21 on the line 1 side (left side) in FIG. 2 is selected, the identification information thereof and the internal bus connected thereto. 3 is sent to the test path setting means 27.

When the test path setting means 27 receives this information, the test path setting means 27 makes a connection between the relevant internal device 21 and the test section 4 with the internal device 21.
The test path 26 is set using the internal bus 3 connected to the internal device 21, and the return path 5 of the internal device 21 is controlled so that the test path 26 is turned back. Notice.

Upon receiving this notification, the diagnostic control means 28 instructs the test section 4 to execute a test. The test unit 4 tests the internal device 21 via the test path 26. If no abnormality is detected, the test unit 4 notifies the diagnosis control unit 28 of the abnormality. Upon receiving the notification that there is no abnormality, the diagnosis control means 28 selects the diagnosis target.
It requests 24 to send the following information.

Upon receiving this request, the diagnosis target selecting means 24 converts the information of the internal device 21 connected to the transmission line 2 side of the internal device 21 that has performed the test and the information of the internal bus 3 connected thereto to the test path setting means. Send to 27. Thus, the next test of the internal device 21 is performed in the same manner as before. In FIG. 2, the next internal device 21 is the right internal device 21 connected to the transmission line 2.
However, in the figure, the test path 26, the test path 16 for the internal device 21, and the return circuit thereof are shown by dotted lines.

As described above, the internal device in the multiplexer 20
When the test section 4 detects an abnormality during this time, the test section 4 sends identification information of the internal device 21 and the like together with the abnormality detection information to the diagnosis control section 28, and the diagnosis control section 28 Output for display or recording.

As described above, in the configuration of FIG. 2, if a line in which an abnormality has occurred is specified, the internal devices 21 connected to that line are automatically separated and diagnosed sequentially.
An abnormal internal device is quickly detected.

[0059]

FIG. 3 is a block diagram of an embodiment of the present invention, FIG. 4 is a diagram showing an implementation of the embodiment of the present invention, FIG. 5 is an explanatory diagram of the internal connection of a multiplexer according to the embodiment of the present invention, and FIG. FIG. 7 is a diagram for explaining the contents of line setting information, and FIG.
FIG. 9 is a flowchart of a line setting process according to the embodiment of the present invention, FIG. 9 is a flowchart of a diagnosis process of the embodiment of the present invention, FIG. It is a method explanatory view.

Although the same reference numerals denote the same objects throughout the drawings, FIGS. 3 to 11 show an embodiment of the multiplexing apparatus having the functions of the multiplexing apparatus shown in the basic configuration diagrams of FIGS. 1 and 2. In addition, the internal devices 11 and 21 shown in FIGS.
There are three types of devices having different functions, such as LS part (LS board), conversion part (conversion board) and NP part (NP board), as shown in FIG. 3 to 11, the following symbols are used.

1 is a line, 2 is a transmission line, 3 is an internal bus, 4
Is a test unit (test panel), 7 is a PBX connected to line 1.
(Private branch exchange), 8 is a telephone housed in the PBX 7, 9
Is a terminal directly connected to the line 1. 30 is a multiplexer having the functions of the multiplexers 10 and 20 shown in FIGS. 1 and 2;
A control unit 32 has the functions of the control units 12 and 22 shown in FIGS. 1 and 2 and includes a processing unit 32a and a memory 32b. In the multiplexing device 30 of FIG. 3, the processing unit 32a and the memory 32b
Although the illustration of the operational relationship between the components in the figure is omitted, the operational relationship of the components is the same as that shown in the control units 12 and 22 in FIGS.

Reference numerals 31a to 31c denote embodiments of the internal devices 11, 21.
31a is a package (hereinafter, referred to as an LS board) on which one or more circuits (LS units) constituting an interface with the line 1 are mounted, and 31b is a circuit on which one or more circuits for converting a bit rate of information are mounted. A package (hereinafter, referred to as a conversion board) 31c constitutes an NP section which is an interface with the transmission path 2, and a package (hereinafter, referred to as a conversion board) which incorporates a multiplex conversion section for performing multiplex conversion of information transmitted and received on the transmission path 2. NP board). When the LS board 31a, the conversion board 31b and the NP board 31c are collectively referred to, the package is used.
In the case of distinguishing a plurality of packages of the same type from each other by writing 31, the mounting position information M _ij is added in parentheses to the name of the package as in the related art.

6 is a type information storage unit provided in each package 31, 14 is a line setting information storage unit, 15 is a line setting unit,
Reference numeral 25 denotes a diagnosis target selection unit, reference numeral 33 denotes a line information storage unit having both functions of the line information storage units 13 and 23, reference numeral 36 denotes a test path which also serves as the test paths 16 and 26, and reference numeral 37 denotes a function of the test path setting units 17 and 27. The test path setting unit 38 is a diagnostic control unit having the functions of the diagnostic control units 18 and 28. 39 is a panel multiplexing device
It has a key for inputting information for controlling 30 and a portion for displaying (details are not shown).

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIGS. 4, 5 and 7 are diagrams showing basic parts of a multiplexing apparatus. The description is mainly given of the operation when the present invention is applied to the multiplexing device 30 shown in each of these drawings.

First, the operation of the multiplexer 30 according to the embodiment based on the basic configuration of FIG. 1 (claim 1), that is, the operation when a package is newly mounted on the operating multiplexer is shown in FIG. This will be described with reference to FIG. Figure 4 multiplexing the device 30 LS Release 31a, conversion board 31b, although NP board 31c is plurality respectively mounted, the mounting position M _1-1 is below L
When the multiplexing apparatus 30 is operated without the S board 31a being mounted, the LS board 31a is newly mounted, and the mounted LS board ( _M1-1 ) is shown in FIG. The description will be made assuming that they are connected as described above. Note that S1 to S30 in the following are symbols for identifying the steps in the flowcharts of FIGS.

When the LS board ( _M1-1 ) is to be added, the maintenance person needs to add the LS board (M1-1) prior to mounting the LS board.
_1-1 ) Line 1, transmission line 2, and other packages 31 to which the connection is made
Is input from the panel 39 of FIG. 4 in advance. This line setting information is stored in the line setting information storage unit 14 in the memory 32b shown in FIG. 3, and FIG. 6 is a diagram for explaining the contents of this line setting information.

As shown in FIG. 6, the line setting information includes the type and mounting position of a newly mounted package (hereinafter referred to as an extension package), the number of the line 1 to be connected, the number of the transmission line 2, and other information. Although the type of the package 31 is included, when the extension package is the LS board 31a, the connection destination package (1) in FIG. Package (2) indicates the package connected to the end. When the extension package is the conversion board 31b, the connection destination package (1) indicates the package at the front (line side) of the extension package, and the connection destination package (2) indicates the package at the rear (transmission line side) of the extension package. Package is NP board
In the case of 31c, the package to which the connection destination package (2) is connected immediately before (line side) is indicated. Upon insertion of the LS Release 31a is added a package in a state of line setting information of FIG 6 the channel setting information storing unit 14 is stored in the connector mounting position M _1-1 in FIG. 4 (not shown), LS Edition ( _M1-1 ) is connected to the line 1 and the conversion board 31b by a wiring such as a back wiring board (not shown). For example, the LS board (M _1-1 ) has eight circuits, and all circuits have one line.
, The No. 1 to No. 8 circuits of the LS board (M _1-1 ) are connected to the lines # 1 to # 8, respectively. On the other hand, the conversion board 31b is physically connected to the conversion board 31b by the internal bus 3, but at this time, the time slot (BS number) of the internal bus 3 used with the conversion board 31b has not been determined yet. Logically not connected.

When the LS board ( _M1-1 ) is mounted, the maintenance person is required
Mounting position M _1-1 from panel 39 to input information identifying the requesting channel setting and diagnosis of the additional package (S1 see FIG. Hereinafter abbreviated to Figure 8). When this request is input to the processing unit 32a of FIG. 3, the line setting unit 15 in the processing unit 32a
Accesses the implemented LS Release its mounting position M _1-1 (M _1-1), it is sent the type information stored in the classification information storage section 6 in the LS Edition (M _1-1). Package After the type information that is temporarily stored in the appropriate region of the direct or memory 32b, but is read in the line setting unit 15, thereby, the line setting unit 15 newly mounted on the mounting position M _1-1 Is an LS board (S2), and is used for subsequent line setting.

Next, the line setting section 15 accesses the memory 32b via the internal bus 3, reads out the line setting information stored in the line setting information storage section 14, and is mounted on the LS board ( _M1-1 ). After confirming the number of lines (referred to as n), one of the n circuits (for example, n = 8) which requires the allocation of the internal bus 3 is selected (S3). When a circuit is selected, the line setting unit 15 checks the connection destination of the circuit based on the previously obtained line setting information (S4). If the selected circuit is, for example, the No. 1 circuit, the connection destination is confirmed to be the No. 1 circuit of the conversion board (M _2-1 ) as shown in FIG. A slot is allocated as a dedicated time slot between both circuits (S5). For example,
When the time slot BS0 is allocated, the BS0 is LS Edition (M _1-1) No.1 circuit and the conversion board of the (M _2-1)
A semi-fixed path connecting the No. 1 circuits will be formed.

Here, the line setting section 15 checks whether or not all the internal bus assignments of the circuits of the LS board ( _M1-1 ) have been completed (S6). Is selected and allocated in the same manner as described above (S3 to S6).

[0071] When the bus assignment of all circuits is completed, the line setting unit 15 stores the result allocation LS Edition (M _1-1) in the storage unit that is not shown in (S7). Since each package is connected with a clock and a frame bit for identifying a time slot of the internal bus 3 (not shown), the assigned time slot (BS) number is stored and transmitted from the own package. Is transmitted to the set time slot.

Next, the line setting section 15 confirms whether or not the package connected to the LS board ( _M1-1 ) is connected to the package ahead (S8). For example, for the LS board (M _1-1 )
In the case of the No. 1 circuit, the No. 1 circuit of the conversion board (M _2-1 ) to which the No. 1 circuit of the LS board (M _1-1 ) is connected and the NP board (M ₃ It is confirmed whether or not a semi-fixed path is set between the No. 0 circuit of _-1 ) and this is performed by accessing the line information storage unit 33 (details are not shown in FIG. 8).

If the semi-fixed path is not set, the No. 1 circuit (corresponding to the No. p circuit in FIG. 8) of the conversion board (M _2-1 ) is selected, and the NP board (M The time slot of the internal bus 3 is allocated to the No. 0 circuit of _3-1 ) in the same manner as described above, but in this example, the BS 21 is allocated as shown in FIG. 5 (S9, S10). In this case, the conversion board (M _{2-
In (1} ), the information of 64 kbps is compressed to 8 kbps, so that the output becomes 1 bit. On the other hand, the time slot of the internal bus 3 is 64 kbps, which is composed of 8 bits. Not the bit position.

The following method is used to specify the bit number. Assuming that the line setting information stored in the line setting information storage unit 14 has the contents shown in FIG.
The transmission line connected to the No. 1 circuit of the S board ( _M1-1 ) is transmission line #
Since the first bit of TS0 is 1, the bit of the time slot BS21 assigned to the output side of the conversion board (M _2-1 ) also specifies the first bit. With this method, the bit number can be easily determined. The line setting unit 15 sends the determined time slot number (BS21) and bit number (first bit) to the conversion board (M _2-1 ) for storage, and
_2-1 ) The output of the No. 1 circuit is output in synchronization with the first bit of BS21. FIG. 5 shows an NP board (M _3-1 ).
Although the circuit number is omitted in the figure, it is assumed that it is the same as the output time slot (TS) number.

After the assignment of the internal bus 3 between the conversion board 31b and the NP board 31c has been completed in this way, if there remains any unassigned circuit, the same processing is performed for the next circuit (S11 → S8 to S11). If there are no unassigned circuits, the set line information is stored in the line information storage unit 33 (S
12). The line information stored at this time is line # 1 to line # 1 in FIG.
The contents of the column # 8 are obtained, but by performing this recording, the line setting process is completed, and the line setting unit 15 attaches the line information and requests the test path setting unit 37 to diagnose the additional package.

FIG. 9 shows the flow of the diagnostic processing of the extension package. The following description will be made with reference to this flowchart. Test path setting unit 37 of FIG. 3 receives a diagnostic request denoted by the line information from the line setting unit 15 and (S21), the first circuit (No.1 circuit LS board is expanded package (M _1-1) ) Is selected (S22), and a test path 36 is set with the test unit 4 using the time slot (BS0) of the internal bus 3 allocated to the circuit (S23).

When the test path 36 is set, the test path setting section
37 LS Edition (M _1-1) in the folding circuit 5 (not shown in FIG. 5) of the access to No.1 circuit is operated, thereby folded back test path 36 (S24). At the same time, the LS board ( _M1-1 )
Is controlled so that the semi-fixed path (time slot BS0) between the No. 1 circuit of No. 1 and the No. 1 circuit of the conversion board (M _2-1 ) is not used. This completes the setting of the test path 36, so the test path setting unit 37 requests the diagnosis control unit 38 to execute a test (S25).

When requested to execute the test, the diagnostic control unit 38 instructs the test unit 4 to execute the test, and the test unit 4 executes the test (S26, S27). FIG. 10 illustrates a state in which the test path 36 is set. The test method will be briefly described below with reference to FIG. The test unit 4 transmits a preset test signal to one of the test paths 36 set using the time slot BS0. This signal is for the LS board ( _M1-1 )
The signal passes through the No. 1 circuit and is returned by the return circuit 5 and sent back to the other side of the test path 36. The test section 4 compares the folded test signal with the transmitted signal and compares the signal with the LS board ( _M1-1 ).
The normality of the No. 1 circuit is determined and notified to the diagnosis control unit 38 (see S28 in FIG. 9).

When the test of the No. 1 circuit is completed, the diagnostic control unit 38 confirms the presence or absence of an untested circuit as shown in FIG. 9, and performs a test similar to the above if untested circuits remain (see FIG. 9). S29
→ S22-S29). When all circuits have been tested, the diagnostic control unit
38 displays or stores the received test result by a predetermined method (S30), and ends the diagnostic processing.

As described above, according to the present invention, when a new package is added to a multiplexing apparatus, information of a line connected to the package and information of another package are input in advance, and when a package is mounted. By inputting only the mounting position information, the line (path) setting and diagnosis of the extension package are automatically performed, so that the efficiency is high and there is no room for human error operation. However, it is possible to add a package.

Next, the operation of the multiplexing apparatus 30 according to the embodiment based on the basic configuration of FIG. 2 (claim 2), that is, the operation of the automatic diagnosis function when an abnormality occurs in the line during the operation of the multiplexing apparatus 10. Will be described with reference to FIGS. 3 to 5, 7 and 11. When a failure occurs in the package 31 or the internal bus 3 in the multiplexing device 30 in FIG. 3, the package in which the abnormality has occurred may be displayed depending on the type of the failure, but it is only the case that the abnormality has occurred in the line. Usually, it is not displayed which part in the multiplexer 30 is abnormal. The maintenance person checks the display indicating the abnormality of the line, and if it is determined that the diagnosis is necessary, gives the line number from the panel 39 in FIG. Hereinafter, a case where an abnormality has occurred in the line # 1 of the multiplexer 30 connected as shown in FIG. 5 will be described as an example.

FIG. 11A shows three types of packages 31 and the semi-fixed path 3 connected to the line # 1 from FIG. 5, and includes a conversion board (M _{2). -1} ) It is _assumed that a fault exists. Maintenance panel
It is assumed that a command requesting automatic diagnosis is input by operating a key (not shown) of the panel 39 or the like after confirming that the abnormality of the line # 1 is displayed on the 39.

When a request for automatic diagnosis is input to the diagnosis target selection unit 25 of the processing unit 32a shown in FIG. 3, the diagnosis target selection unit 25 accesses the memory 32b via the internal bus 3 and Out of the information stored in the line # 1. In this example, the information regarding the top line # 1 in FIG. 7 is read as the line information, but the diagnosis target selecting unit 25 receives this information, and
The package connected to the portion close to 1 is selected using the information of the connection destination package (1) in FIG. In this example, the LS board ( _M1-1 ) is selected. At this time, the No. 1 circuit of the LS board ( _M1-1 ) is connected to the line # 1,
It is confirmed from the information of the bus (1) in FIG. 7 that the semi-fixed path to which the No. 1 circuit is connected is the time slot BS0 of the internal bus 3. The diagnosis target selection unit 25 sends the confirmed information to the test path setting unit 37.

[0084] Test path setting unit 37 the information to receive the LS Edition (M _1-1) the test unit 4 and LS board using a semi-fixed path (time slots BS0) which has been used so far (M
Set the test path 36 between the No. 1 circuits in _1-1 ). Test path setting unit 37 then LS Release and controls to wrap internal bus 3 with respect to the folding circuit 5 in No.1 circuits (M _1-1) test path 36 LS Edition (M _1-1) Is turned back through the internal circuit of No. 1 circuit. When the loopback test path 36 is set in this way, the test path setting unit 37 requests the test diagnosis unit 38 to execute a test.

Upon receiving this request, the test diagnosis unit 38 instructs the test board 4 to execute a test. FIG. 11 (2) is a simplified illustration of the state at this time, but the details are the same as those shown in FIG. The test unit 4 is shown in FIG.
As shown in (2), a test signal is sent to one of the test paths 36, and a signal sent back through the turn-back circuit 5 of the LS board ( _M1-1 ) is received by the other test path 16, and both signals are sent. And compare
As a result of the comparison, if no abnormality is found, the control unit notifies the diagnosis control unit 38 in the processing unit 32a that no abnormality has been detected.

When the test section 4 notifies that no abnormality has been detected, the test diagnosis section 38 requests the diagnosis target selection section 25 to send the following information. Select the diagnosis target. The next object to be diagnosed is a package connected to the next (transmission line 2 side) of the package connected to the line 1, which is selected by the connection package (2) in the line information of FIG. In this example, it is the No. 1 circuit of the conversion board (M _2-1 ) in FIG. When testing the conversion board 31b, the test path 36 can be set on the LS board 31a side of the conversion board 31b or on the NP board 31c side. Reference _numeral 25 also selects a time slot of the internal bus 3 on the output side of the conversion board (M _2-1 ) as a semi-fixed path connected to the No. 1 circuit of the conversion board (M _2-1 ).

When the selection is completed, the diagnosis target selecting section 25 transmits the selected information, that is, the information such as the type and mounting position of the conversion board (M _2-1 ), the circuit number, and the semi-fixed path (time slot BS21) to the test path. It is sent to the setting unit 37. Upon receiving this information, the test path setting unit 37 sets the N of the test unit 4 and the conversion board (M _2-1 ).
The test path 36 is set between the o.1 circuit (NP board side) using the time slot BS21 of the internal bus 3, and at the same time, the return circuit 5 of the No. 1 circuit of the conversion board (M _2-1 ) is controlled. Test path
Fold 36. When the loopback test path 36 is set, the test path setting unit 37 requests the test diagnosis unit 38 to execute a test.

FIG. 11C shows an NP board (M) of the conversion board (M _2-1 ).
_The state where the test path 36 using the time slot BS21 is set on the _2-1 ) side is illustrated in a simplified manner. LS board (M
_{As in} the case of _1-1 ), the test unit 4 executes the test of the No. 1 circuit of the conversion board (M _2-1 ) via the diagnostic control unit 38. In this case, the conversion board (M _2-1) Since the NP board side of ()) is a signal of 8 kbps, the test unit 4 transmits a test signal of 8 kbps kbps. This signal is converted into a signal of 64 kbps in the conversion board (M _2-1 ) and turned back to the test board 4. The test board 4 compares the converted signal with a transmitted signal by a predetermined method and converts the signal. The presence or absence of an abnormality is determined including the conversion function in the panel (M _2-1 ).

In this example, it is premised that a failure exists in the conversion board (M _2-1 ).
_2-1 ) The presence of an abnormality is detected, and the detection of the abnormality is notified to the diagnosis control unit 38. When notified from the abnormality detection test unit 4, the diagnosis controller 38 converts Release outputs the test result to the panel 39 or the memory 32b in FIG. 4 or illustrated abbreviated display device or printer (M _2-1 Notify that there is something wrong with).

When the test path 36 is set on the LS board 31a side, the conversion board 31b is connected to the LS board 31a, for example, as in the case of the conversion board (M _2-1 ).
If a signal of 4 kbps is to be converted to a signal of 8 kbps, the return is made up of all 8 bits, that is, 64 kbps.
, Or only one bit, that is, 8 kbps. Also, when setting to the NP board 31c side, 64 kbps as a test signal from the test path 36
Can also be sent. It should be noted that, in addition to using the time slot set as the semi-fixed path as described above, the test path 36 can be designated to use an empty time slot when requesting a test.

As described above, according to the present invention, if only the line number is designated, the packages 31 connected to the line are automatically cut and diagnosed sequentially, so that a faulty package can be detected quickly. .

The embodiment of the present invention has been described with reference to FIGS. 3 to 11. However, FIGS. 3 to 11 show only a part of the embodiment of the present invention, and the present invention is illustrated. It is needless to say that the configuration or operation is not limited.

For example, it goes without saying that the multiplicity and bit rate of the internal bus 3, the number of internal circuits in each package, and the like are not limited to the numerical values used in the drawings or the description. Although FIG. 3 shows the processing unit 32a and the memory 32b as separate units, it goes without saying that the effects of the present invention do not change even if both units are integrated. Further, in the above description, the diagnosis of the faulty package is performed at the request of the maintenance person. However, it is easily possible that the processing unit 32a detects the occurrence of the abnormality and directly starts the automatic diagnosis.

The order of the processing flows in FIGS. 8 and 9 can be partially changed. For example, S4 in FIG.
If the connection destinations of the additional package are checked at the same time, all the connection destinations of the package are simultaneously read, temporarily stored, and then sequentially taken out, it is possible to perform the selection before selecting the circuit in S3. However, the effect of the present invention does not change. It is clear that the effect of the present invention does not change whether the notification of the line setting result or the test result is performed each time the line setting or the test is completed for one circuit or when all the circuits are completed.

Further, although the present invention is based on a multiplexing device, it is apparent that the principle of the present invention is not limited to the multiplexing device but can be applied to a device having a similar configuration.

[0096]

As described above, according to the present invention,
When a new package is mounted on the multiplexing device, the line setting and diagnosis of the additional package are performed automatically, so that the package can be added very efficiently. Since there is little room for entering, it is possible to easily add a package even when the multiplexing device is in operation. Further, when an abnormality occurs in a line during operation, the package connected to the line is automatically separated and diagnosed only by specifying the line, so that a faulty package can be detected quickly.

As described above, the present invention greatly contributes to the improvement of the maintenance operation efficiency of the multiplexing device.

[Brief description of the drawings]

FIG. 1 is a basic configuration diagram (1) of the present invention.

FIG. 2 is a basic configuration diagram (2) of the present invention.

FIG. 3 is a configuration diagram of an embodiment of the present invention.

FIG. 4 is an implementation diagram of an embodiment of the present invention.

FIG. 5 is an explanatory diagram of the internal connection of the multiplexer according to the embodiment of the present invention;

FIG. 6 is an explanatory diagram of the contents of line setting information according to the embodiment of the present invention.

FIG. 7 is an explanatory diagram of contents of line information according to the embodiment of the present invention.

FIG. 8 is a flowchart for setting a line according to an embodiment of the present invention;

FIG. 9 is a flowchart of a diagnosis process according to an embodiment of the present invention.

FIG. 10 is an explanatory diagram of a method for diagnosing an additional package according to an embodiment of the present invention.

FIG. 11 is an explanatory diagram of a method for diagnosing an abnormal package according to an embodiment of the present invention

FIG. 12 is a configuration diagram of a multiplexing device according to the related art.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 line 2 transmission line 3 internal bus 4 test part 5 loopback circuit 6 type information storage means 10, 20 multiplexing device 11, 21 internal device 12, 22 control part 13, 23 line information storage means 14 line setting information storage means 15 lines Setting means 16, 26 Test path 17, 27 Test path setting means 18, 28 Diagnosis control means 25 Diagnosis target selection means

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor: Yasushi Fukagawa 1015 Kamikodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Within Fujitsu Limited (56) References JP-A-2-104039 (JP, A) JP-A-5-336067 (JP, A) JP-A-4-286231 (JP, A) JP-A-3-70225 (JP, A) JP-A-3-292024 (JP, A) (58) Fields investigated (Int. Cl. ⁷⁾ , DB name) H04J 3/00-3/26 H04L 29/00-29/14

Claims (2)

(57) [Claims] A plurality of internal devices connected by an internal bus.
Lines to transmit and receive signals to be multiplexed through
Information that is input to the transmission path for transmitting and receiving
In the multiplexing device, each of the internal devices receives a signal input from the internal bus.
Sends the loopback circuit that turns the signal and the type information of the internal device
Type information storage means to perform the connection relationship between the internal device and the internal bus and line information
Line information storage means for storing as a connection, a connection input when the internal device is newly mounted
Line setting information storage means for storing information on the partner device, and identifying the type information of the newly installed internal device
And allocates the internal bus to match the line information
A line setting unit for performing a loopback test of the internal device, and a test path between the internal device and the test unit.
A test path setting means for controlling a loopback test by the test section after setting the test path
Diagnostic control means for performing automatic diagnosis
Multiplexer with disconnection function. 2. A plurality of internal devices connected by an internal bus.
Lines to transmit and receive signals to be multiplexed through
Information that is input to the transmission path for transmitting and receiving
In the multiplexing device, each of the internal devices receives a signal input from the internal bus.
A test section for performing a loop test of the internal device, and a circuit for looping information indicating a connection relationship between the internal device and the internal bus.
A line information storage means for storing line information corresponding to a line, and when a line diagnosis request is received,
Input line information from the line information storage means.
One of the internal devices connected to the line using the line information
To select the selected internal device and the internal bus connected to it.
Each time it receives a transmission request,
Select one of the unselected internal devices and enter the information
A diagnosis target selecting means for transmitting a set of information, and
Between the internal device and the test section using the internal bus.
Test path, and the internal device
Test path for controlling the circuit and folding the test path
Setting means, after the test path setting means sets the test path,
Execute the test on the test section,
If not, the transmission request is sent to the diagnosis target selecting means.
And display or record the test results if there are any abnormalities.
A multiplexing device with an automatic diagnostic function, comprising: