JP2002044767A - Sub-rate multiplex apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a sub-rate multiplex apparatus being economic and enabling to flexibly adapt for functional expansions and the like, the apparatus multiplexes data of lower speed sub-rate than that of a basic rate and also proceeds cross-connections by the basic rate unit and by the sub-rate unit. SOLUTION: In the apparatus including a common unit part 1 and an interface unit part 2, the unit part 1 comprises a basic rate cross-connection part 3 including space switches 4, 5 and a switch 6, the unit part 2 comprises a sub-rate cross-connection part 11 to cross connect by the sub-rate unit, a high speed transmission processor 12 and a high speed receiving processor 13 to transfer the data by the basic rate between line-sets 14, 15 to be connected to an external line and the unit part 1, and the cross-connection part 11 is connected between the processor 12 and the processor 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sub-rate multiplexer for multiplexing data of a sub-rate lower than a basic rate so as to have a basic rate and cross-connecting the sub-rate data together with the cross-connect of the basic rate data. .

[0002]

2. Description of the Related Art An audio signal is sampled at 8 kHz,
2. Description of the Related Art A digital switching system has been put into practical use in which one sample is formed as an 8-bit data and transmitted as voice data having a transmission rate of 64 kbps via a network. This 6
Assuming that the transmission rate of 4 kbps is the basic rate, the transmission rate is further multiplexed, for example, to 1.5 Mbps, 50 Mbps, 150 Mbps.
A system for transmitting data at a high transmission rate such as Mbps is also known. In a data transmission system, a configuration is known in which a cross-connect device is provided to branch and merge transmission paths. If the above-mentioned 64 kbps is used as the basic rate, a system for transmitting data between data terminals having a low sub-rate based on the basic rate, and a system for transmitting data at a sub-rate of, for example, 4.8 kbps by voice data compression processing are also known. There is also known means for multiplexing such sub-rate data so as to have a basic rate.

FIG. 8 is an explanatory view of a main part of a conventional example.
Is a common unit unit, 102 is an interface unit unit, 111 is a space switch panel, 112 is an interface selection panel, 113 is a time switch unit, 114 is a sub-rate cross-connect unit, 121 is a high-speed transmission processing unit, and 122
Indicates a high-speed reception processing unit, 123 and 124 indicate line sets, SSW indicates a space switch, and TSW indicates a time switch.

The common unit 101 includes a space switch S
Space switch board 111 including SW, time switch TS
The time switch unit 113 including W constitutes a basic rate cross-connect unit. That is, the time multiplexed data is exchanged by the time switch TSW with respect to the time-division multiplexed data by the space switch SSW on the input side of the time switch TSW, and the time slot is output by the space switch SSW on the output side of the time switch TSW. The connection with the terminal is controlled, and cross-connection is performed in units of the basic rate. Subrate / cross connect section 11
Reference numeral 4 includes a time switch for performing cross connection in units of subrates such as 8 kbps and 3.2 kbps.

An interface selection panel 112 including a space switch SSW selects an input side and an output side interface unit (not shown). Also, the interface unit unit 102 is, for example,
A case where an external line of a sub-rate is connected to the line set 123 and an external line of a basic rate is connected to the line set 124 is shown. Also, the high-speed transmission processing unit 121
Including an interface with the common unit 101,
The data from the line set 123 is transmitted to the common unit 10
Transfer to 1. The high-speed reception processing unit 122 includes an interface with the common unit unit 101, and transfers data to the line set 124.

FIG. 9 is an explanatory diagram of the cross-connect processing, showing a case of an STS configuration using a space switch SSW and a time switch TSW. In addition, CONT is a control unit. It includes a control memory for controlling the switch SSW and the time switch TSW. Also, a case is shown in which three systems of input data A1, A2, and A3 are cross-connected so as to become three systems of output data B1, B2, and B3. The input side space switch SSW sequentially selects input data in time slot units. Then, the time-division multiplexed data is input to the time switch TSW.

The time switch TSW includes a data memory, and the control unit CONT sequentially writes and sets the time-division multiplexed data from the input side space switch SSW to the data memory under the control of, for example, sequential write and random read. The time slot is read out in accordance with the order of the time slots and input to the output side space switch SSW. The space switch SSW may be configured to, for example, distribute and output the output data B1, B2, and B3 sequentially corresponding to the time slots.

In the case shown, for example, a time switch TSW
Have three systems of input data A1, A2,
A3 is sequentially selected and input by the space switch SSW,
By the control of the sequential write, the data A, I, A, B, H, I, C,... Corresponding to the time slot are written in order, and the data IV corresponding to the time slot are controlled by the random read by the control memory. , B, III,
Are read out in the order of V, E, C,..., And output data B of three systems are output by the space switch SSW on the output side.
1, B2, and B3.

That is, the data A of the first time slot of one cycle of the input data A1 is written in, for example, address 1 of the data memory corresponding to the first time slot of one cycle of the time switch TSW. No. 1 is ninth
The data is read at a time corresponding to the time slot, and the read data is distributed by the space switch SSW according to the time order. As a result, the output data B2 is replaced with the position of the third time slot in one cycle. Similarly, the data B of the second time slot of the input data A1 is replaced with the position of the first time slot of the output data B2, and the data C of the third time slot of the input data A1 is replaced.
Is replaced with the position of the second time slot of the output data B3. That is, the time position and the space position are exchanged.

The sub-rate cross-connect unit 114 shown in FIG. 8 has substantially the same configuration as that shown in FIG. The time switch unit 113 and the sub-rate
The cross-connect unit 114 is shown as a parallel connection for simplicity, but the data flow of the sub-rate passes through the time switch unit 113 as it is, is input to the sub-rate cross-connect unit 114, and The sub-rate data output from the cross-connect section 114 is input again to the sub-rate cross-connect section 114, and the sub-rate data output from the sub-rate cross-connect section 114 is input to the time switch section 113, where the sub-rate cross Connect and basic rate cross connect are performed.

A subrate multiplexer different from the configuration shown in FIG. 8 is known. For example, a configuration is also known in which each line set is connected to a functional unit that multiplexes and demultiplexes sub-rate data so that each data has a basic rate, and cross-connects in units of a basic rate.

[0012]

Conventionally, as described above, the common unit section 101 is connected to the space switch board 111 and the time switch section 113 constituting the basic rate cross-connect section, and to the basic rate cross-connect section. And the sub-rate cross-connect unit 114 described above. This subrate cross connect part 1
Numeral 14 is designed and manufactured so as to perform cross-connect processing on sub-rate data of a preset type of sub-rate and a preset data amount.

Therefore, if the amount of cross-connect data by the sub-rate cross-connect unit 114 exceeds the design value in the case of adding a sub-rate terminal or changing the type of sub-rate, the common unit unit 101 There is a need to replace the redesigned configuration. Similarly, when a terminal of a type other than the sub-rate type designed as the sub-rate cross-connect unit 114 is connected, or when the sub-rate type changes due to data compression processing, etc. It becomes necessary to replace the unit 101 with a redesigned configuration. Conversely, when the terminal of the sub-rate is not used, the sub-rate cross-connect unit 114 mounted on the common unit 101 becomes useless, and the mounting space cannot be effectively utilized.

In a configuration in which sub-rate data is multiplexed and demultiplexed so as to be a basic rate and cross-connect is performed in units of a basic rate, cross-connect as a basic rate unit is possible. Cannot be cross-connected between the data of the sub-rates that constitute the sub-data, there is a problem that it is limited to a specific application.

An object of the present invention is to provide a sub-rate multiplexing device which can be flexibly and economically supported.

[0016]

A sub-rate multiplexing apparatus according to the present invention, which will be described with reference to FIG. 1, multiplexes sub-rate data to a basic rate and cross-connects the basic rate and the sub-rate data. An apparatus, comprising: a common unit 1 having a basic rate cross-connect unit 3 for cross-connecting data at a basic rate; and an interface unit 2 for connecting the common unit 1 to an external line. The interface unit 2 includes line sets 14 and 15 for transmitting and receiving data to and from an external line, and a sub-rate time switch 25, and converts data from the line set 14 into an internal bus format. It includes the high-speed transmission processing unit 12 and the sub-rate time switch 27, and A high-speed reception processing unit 13 to transfer the data to the line set 15, connected between the high-speed reception processing unit 13 and the high-speed transmission processing section 12, sub-rate cross-connect unit 1 for performing cross-connection of data sub-rate
1 is provided.

The sub-rate cross-connect section 11 of the interface unit section 2 can be composed of a plurality of cross-connect sections for cross-connecting sub-rate data in accordance with a plurality of types of data rates corresponding to sub-rates. The common unit 1 is composed of a basic rate cross-connect unit 3 including a time switch 6 and space switches 4 and 5, and the interface unit 2 is mounted on the basic rate cross-connect unit 3 in terms of mounting. An interface unit having a sub-rate cross-connect unit 11 connected to the space switches 4 and 5, an interface unit connecting a sub-rate line to the space switch, and an interface connecting a basic-rate line to the space switch Unit.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is an explanatory view of a main part of an embodiment of the present invention, wherein 1 is a common unit, 2 is an interface unit, 3 is a basic rate cross-connect unit,
4 and 5 are space switches (SSW), and 6 is a time switch (TSW). 11 is a sub-rate cross-connect unit, 12 is a high-speed transmission processing unit, 13 is a high-speed reception processing unit,
Reference numeral 14 denotes a line set connected to a sub-rate line, for example, and reference numeral 15 denotes a line set connected to a basic-rate line, for example. Arrows indicate an example of data flow.

The common unit 1 has a basic rate cross-connect section 3, which includes space switches (SSW) 4, 5 and a time switch (TSW) 6, The illustration of the memory and the like is omitted. The common unit 1 is the same as the sub-rate cross-connect 114 of the common unit 101 shown in FIG.
Is equivalent to a configuration in which is omitted.

The interface unit 2 includes a sub-rate cross-connect 11 and a high-speed transmission processor 12.
, A high-speed reception processing unit 13, and line sets 14 and 15, and the sub-rate cross-connect unit 11 includes space switches (SSW) 21 and 23 and a time switch (TSW).
22, and the control memory and the like are not shown in the drawings.
Configurations corresponding to subrate types such as 8 kbps and 3.2 kbps are also not shown.

The high-speed transmission processing unit 12 includes an internal bus interface 24 and a sub-rate time switch (TSW).
25, and the high-speed reception processing unit 13 includes an internal interface 26 and a sub-rate time switch (TSW) 2.
7 is included. The sub-rate cross-connect unit 11 is connected between the high-speed transmission processing unit 12 and the high-speed reception processing unit 13. Subrate cross connect part 1
Reference numeral 1 indicates a case where data of a single sub-rate is cross-connected. However, a cross-connect unit corresponding to a plurality of types of sub-rates may be provided, and a selector for distributing and synthesizing data corresponding to the sub-rate may be provided.

Each of the line sets 14 and 15 has a configuration including internal bus interfaces 28 and 31, drivers 29 and 32, and receivers 30 and 33. The line sets 14 and 15 are not shown,
A plurality of line sets are provided corresponding to external lines, and each of the line sets 14 and 15 is connected to the high-speed transmission processing unit 12 and the high-speed reception processing unit 13, respectively. Also, a plurality of high-speed transmission processing units 12 and high-speed reception processing units 13 may be connected to the space switches 4 and 5 of the basic rate cross-connect unit 3, respectively.

As described above, the sub-rate cross-connect unit 11 is provided in the interface unit 2 for performing input / output processing of data at the basic rate with respect to the common unit 1 having the basic-rate cross-connect unit 3. The configuration is as follows. Thus, it is not necessary to change the common unit 1 for various changes on the sub-rate side, and it is possible to deal with it only by changing the configuration of the sub-rate cross-connect unit 11 of the interface unit 2. That is, it is possible to flexibly respond economically.

In the illustrated arrow path, for example, a sub-rate line is connected to the line set 14, a sub-rate data is received by the receiver 30, and an internal bus between the high-speed transmission processing unit 12 is received by the internal bus interface 28. The sub-rate data is inserted into a predetermined time slot of the basic rate format by the time switch 25 of the high-speed transmission processing unit 12 and transmitted to the basic unit 1 via the internal bus interface 24. The data is transferred to the rate cross connect unit 3.

The basic rate cross-connect unit 3 transfers the data to the high-speed reception processing unit 13 of the interface unit 2 through the bus unit 26, transfers the data from the internal bus interface 26 to the sub-rate cross-connect unit 11, and transfers the sub-rate cross-connect unit. At 11, cross-connection is performed in units of sub-rates, and transferred to the basic rate cross-connect unit 3 of the common unit 1 via the internal bus interface 24 of the high-speed transmission processing unit 12.

The basic rate cross-connect unit 3 performs cross-connection in units of a basic rate, transfers the cross-connect to the interface unit 2, and the high-speed reception processing unit 1.
3 from the internal bus interface 26 to the time switch 27
, And converts it into a predetermined time slot on the line set 15 side, and sends it out from the internal bus interface 31 of the line set 15 to the line of the basic rate via the driver 32. That is, the data of the sub-rate passes twice to the basic rate cross-connect unit 3.

The data from the line of the basic rate received by the receiver 33 of the line set 15 is transferred along a path opposite to the above-mentioned arrow path, and the basic rate cross-connect unit 3 cross-connects in units of the basic rate. Then, the sub-rate cross-connect section 11 performs cross-connection in units of sub-rates, and data is transmitted from the line set 14 to the sub-rate line.

FIG. 2 is an explanatory diagram of a system according to an embodiment of the present invention, showing a system in which communication is performed between terminals of sub-rates.
4 is a sub-rate multiplexing device as a terminal station device, 45 is a communication network, 50 is a common unit, 51, 52, 5
3 is an interface unit constituting an interface unit, 54 and 55 are space switches (SSW), 56 is a time switch (TSW), 57 is a sub-rate cross-connect unit, 58 is a high-speed reception processing unit, and 59 is a high-speed transmission process. Part, 60 and 62 are space switches, 61 is a time switch,
64 and 69 are line sets, 65 and 70 are high-speed transmission processors, 66 and 71 are high-speed reception processors, 67, 68, 72, and
Reference numeral 73 denotes a sub-rate time switch. The sub-rate multiplexers 43 and 44 have the same configuration.

2 and FIG. 1, the common unit 50 of FIG. 2 corresponds to the common unit 1 of FIG.
The interface unit 51 in FIG. 2 corresponds to a part of the function of the sub-rate cross-connect unit 11 and the high-speed transmission processing unit 12 and a part of the function of the high-speed reception processing unit 13 in FIG. 1. The interface unit 52 in FIG. 1 corresponds to the configuration including the high-speed transmission processing unit 12 and the line set 14, and the interface unit 53 in FIG. 2 corresponds to the configuration including the high-speed reception processing unit 13 and the line set 15 in FIG. That is, the interface unit 2 of FIG.
Reference numerals 52 and 53 denote configurations implemented together with the common unit unit 50. The arrow path in FIG. 2 shows a case corresponding to the arrow path in FIG. The internal bus interfaces, drivers, receivers, and the like of the line sets 64 and 69 are not shown, and the internal bus interfaces of the high-speed transmission processing unit and the high-speed reception processing unit are also not shown.

Although not shown, the interface unit 52 includes a plurality of line sets.
1 is received by the line set 64, and the sub-rate time switch 6 of the high-speed transmission processing unit 65 is received.
7, the signal is inserted into the format of the basic rate, passed through the basic rate cross-connect section of the common unit section 50, and the sub-rate cross-connect section 57 is connected by the sub-rate cross-connect section 57 via the high-speed transmission processing section 59 of the interface section 51. Then, the data is transferred to the basic rate cross-connect section of the common unit section 50 via the high-speed reception processing section 58, and cross-connect is performed for each basic rate. Then, the signal is multiplexed from the line set 69 via the high-speed reception processing unit of the interface unit 53 by a line of the basic rate or a multiplexing device (not shown) and transmitted to the communication network 45.

The sub-rate multiplexer 44 on the terminal 42 side
The sub-rate data is transferred to the terminal 42 by reversely processing the data received via the basic rate line connected to the communication network 45 or the demultiplexed basic rate line to the sub-rate multiplexer 43 described above. The sub-rate data from the terminal 42 can be processed as described above and transferred to the terminal 41. Further, when the sub-rate data such as the data transmission between the sub-rate terminals 41 and 42 is not transmitted, the interface unit 51 including the sub-rate cross-connect unit 57 can be extracted to make space. Therefore, it is possible to increase the capacity by mounting other functional units. After the interface unit 51 is extracted, the common unit unit 5
The configuration is such that only a basic rate cross-connect is performed using a basic rate cross-connect unit of zero.

FIG. 3 is an explanatory diagram of the basic rate and the sub-rate. The basic rate is 64 kbps (PCM 0th order group).
X. (A) shows a 50-frame configuration. That is, assuming that 8 bits of the frame bit F, the data bits D1 to D6, and the status bit S are one frame, the frame bits F for 20 frames are set as illustrated. Note that A of the first frame bit F is a game alarm bit, "1" indicates normal, and "0" indicates abnormal. Also, since the transmission rate of a 160-bit frame is 64 kbps, each bit corresponds to a rate of 400 bps.

FIG. 3 (B) shows 2.4 kbps, 4.8 k
data bits D excluding the frame bits F and the status bits S in the case of a subrate of 9.6 kbps in bps.
This shows the arrangement of 6 bits of the channel CH1 consisting of 1 to D6, and in the case of 2.4 kbps, it is transmitted as the data bits D1 to D6 of the first frame of the first to twentieth frames. Similarly, in the case of 4.8 kbps, transmission is performed by the first and eleventh frames, and in the case of 9.6 kbps, transmission is performed by the first, sixth, eleventh, and sixteenth frames.

Therefore, FIG. 3 (C) shows 2.4 kbps.
, The channels CH1 to CH20 can be multiplexed. In the case of the 4.8 kbps subrate, the channels CH1 to CH10 can be multiplexed. In the case of 9.6 kbps, the channels CH1 to CH5 can be multiplexed. This indicates that multiplexing is possible.

Accordingly, the high-speed transmission processing unit 12 shown in FIG.
The sub-rate time switch 25 can multiplex sub-rate data from a plurality of line sets as shown in FIG. 3C to form a basic frame configuration. Then, in the sub-rate cross-connect unit 11, the basic frame in which the sub-rate data shown in FIG. 3C is multiplexed, for example, as shown in FIG.
The cross-connect can be performed on a subrate basis as shown in FIG.

In this case, for example, from the state of FIG. 3C in which the channels CH1 to CH20 of the 2.4 kbps subrate are multiplexed, the channels CH7, CH16, CH11, and CH4 are changed as shown in FIG. , CH20, CH
13, CH1, CH10,... Are performed on a sub-rate basis. Looking at this for the channel CH1, as shown in FIG. 3E, the sub-rate data of the channel CH1 at the position of the first frame is replaced with the position of the seventh frame. That is, the multiplexed sub-rate data is cross-connected in units of sub-rates in the sub-rate cross-connect unit 11, and is used as a basic rate in the basic rate / cross-connect unit 3 of the common unit unit 1 in units of the basic rate. Cross connect can be performed.

FIG. 4 is an explanatory diagram of a control circuit of the sub-rate time switch. Reference numeral 80 denotes a buffer (BF), 81 denotes a data memory (DM), 82 denotes a sub-frame generator, 83 denotes a sub-rate frame detector, and 84 denotes a sub-rate frame detector. Subrate write control unit, 85 is a frame counter, 86 is a subrate AC
M (address control memory). INDT indicates input data, oUTDT indicates output data, FP indicates a reference frame pulse in the apparatus, and ACM data indicates control data for time slot replacement.

The input data iNDT is frame-synchronized in units of 64 kbps in the subrate frame detection unit 83, the head position of 20 frames is detected, and based on the detection signal, the subrate write control unit 84 Absorption control signal for buffer 80 and data memory 81
Is output. As a result, the input data iNDT is controlled by the buffer 80 so that the leading phase of the input data iNDT is coincident with the input data iNDT, and is input to the data memory 81.

The frame counter 85 counts the frame pulse FP, applies a read control signal (read address signal) from the sub-rate ACM 86 to the data memory 81, and controls reading of the data memory 81 according to the ACM data set in the sub-rate ACM 86. The time slots are exchanged by controlling the sequential write and random read of the sub-rate data to the data memory 81, and the sub-rate frame generator 82 outputs the output data oU having a frame configuration in units of 64 kbps.
TDT.

As time switches for data of a single type of sub-rate, for example, time switches 22, 25,
27 can be applied. Also, for example, the data of the subrate of 2.4 kbps shown in FIG.
The addition of the frame bit F and the status bit S results in 3.2 kbps. In this case, the data memory 81, the sub-rate write control unit 84, and the sub-rate ACM 86 operate at 3.2 kbps. Things.

FIG. 5 is an explanatory diagram of a control circuit for a plurality of types of sub-rate time switches.
The configuration corresponding to 2 kbsp, 8 kbps, and 0.4 kbps is shown, and 90-1 and 90-2 are buffers (B
F), 91-1 to 91-4 are data memories, 92-1 to 94-1
92-4 is a frame generation unit, 93 is a sub-rate frame detection unit, 94 is a sub-rate write control unit, 95 is a frame counter, 96-1 to 96-4 are address control memories (ACM), and 97 is a 3.2 kbps. Frame detector,
98 is a 3.2 kbps write controller, 99 is the TS used
(Time slot) control unit, 100 indicates a selector

Buffer 90-1 and data memory 91-1
4, a sub-rate frame generator 92-1, a sub-rate frame detector 93, a sub-rate write controller 94, a frame counter 95, and an address control memory 96-1. The generator 82, the sub-rate frame detector 83, the sub-rate write controller 84, the frame counter 85, and the sub-rate ACM 86 are the same as the data memory 91-2 to 91-4 and the address control memories 96-2 to 96-9.
6-4, etc., is shown as being applicable to the case where sub-rate data of 3.2 kbps, 8 kbps and 0.4 kbps are mixed. 8 kbps or 0.
The 4 kbps data can be, for example, signaling data.

In this case, the address control memory 96-2
96-4 are 3.2 kbps, 8 kbps,
Data memory 91-2 to 92-4 corresponding to 0.4 kbps
Is output in synchronization with a signal from a frame counter 95 that counts the frame pulse FP. Data memory 91- compatible with 0.4 kbps
4 is input to a data memory 91-3 corresponding to 8 kbps via a selector (not shown),
It is also possible to have a configuration in which a time slot of 0.4 kbps is replaced and a time slot of 8 kbps is replaced by the data memory 91-3 to output data of a subrate of 8 kbps.

The used TS control unit 99 outputs a control signal for controlling the selector 100 in accordance with a plurality of types of sub-rates to be used under the control of a control unit (not shown). The sub-rate frame generated by 92-4 is selected by the selector 100 and becomes output data oUTDT. Therefore, FIG.
When processing data of a plurality of types of sub-rates, the configuration shown in FIG. 1 includes other time switches 25 including the time switch 22 of the sub-rate cross-connect unit 11 in FIG.
27 can also be applied.

FIGS. 6 and 7 are diagrams for explaining sub-rate multiplexing. FIG. The figure shows a 50-frame configuration, in which a head frame bit F and a data bit D1
.. D6 and the status bit S, and has a basic rate of 20 frames. FIG. 6B shows a case where two channels of a 4.8 kbps sub-rate are multiplexed with respect to the basic rate. That is, 4 in FIG.
8 kbps corresponds to a case where two channels are accommodated, and data bits D1 to D6 excluding an 8-bit frame bit F and a status bit S in a first frame and an eleventh frame are respectively provided with a channel CH.
1 and 6 bits of data are inserted.
The data of H2 is inserted into the second frame and the twelfth frame.

In this case, the subrate time switch has a speed of 3.2 kbps, which is a frame unit speed. Therefore, the time switches 22, 25,
27 has a configuration in which time slots are exchanged at 3.2 kbsp, so that a 4.8 kbps sub-rate data is stored in a 64 kbps basic rate format.
Channel division multiplexing and sub rates are also shown in FIG.
(D), cross connection can be performed. The sub-rate data multiplexed in the basic frame shown in FIG. 6B separates the sub-rate data of the channel CH1 from the first and eleventh frames of the basic frame on the receiving side, and The sub-rate data of channel CH2 can be separated from the twelfth frame.

FIG. 6C shows a case where, for example, signaling data of 800 bps sub-rate is multiplexed for nine channels at the position of the leading bit D1 of the bits D1 to D8, and a frame bit F is added to the beginning. , A game alarm bit A is added in the middle, and a total of 8 kbps sub-rate data is inserted into the basic frame. In this case, the time switch processes the first bit D1 of the first to twentieth frames. Note that the sub-rate data can be inserted into other bits D2 to D8 and multiplexed. On the receiving side, frame synchronization is achieved by the frame bit F, and the second to tenth and twelfth
To the channel CH1 from the first bit D1 of the twentieth frame
ＣＨCH9 sub-rate data can be separated.

FIG. 7D shows a case where, for example, 16 kbps sub-rate data by voice compression is multiplexed for two channels. In this case, channel CH1 and bit D3 are placed at the positions of bits D1 and D2 of bits D1 to D8.
A basic frame is formed by inserting the respective compressed data of the channel CH2 at the position of D4. In this case, a total of 3
The rate is 2 kbps, which is equivalent to 8 kbps × 4. That is, multiplexing of 8 kbps × n (n = 1 to 8) subrates can be performed.

FIG. 7E shows the case where 800 bps sub-rate data is inserted into the basic frame. The first frame is located at the position of the first bit D1 of bits D1 to D8, the first frame is the frame bit F, and the second frame. To channel CH
Bit 1, the game alarm bit A in the eleventh frame, the first
The bits of channel CH1 are inserted into two frames. In this case, for example, the data memory 91-4 of FIG.
0.4 kbps including address control memory 96-4
Processing can be performed using a unit time switch. Multiplexing for a plurality of channels is also possible.

FIG. 7F shows 800 bps and 4800 bps.
This shows a case where data having different sub-rate types from bps are mixed and multiplexed, and the leading bit D of bits D1 to D8 is shown.
The frame bit F is inserted in the first frame at the position 1 and the game alarm bit A is inserted in the eleventh frame, and the sub-rate data of 800 bps is inserted in the second and twelfth frames. This shows a case where data of a subrate of 4800 bps is inserted into the third frame and the thirteenth frame, and a status bit S is inserted at the position of bit D8.

In this case, FIG. 6B and FIG.
5 corresponds to the case where sub-rates are mixed, for example, a 3.2 kbps sub-rate time switch including the data memory 91-2 and the address control memory 96-2 in FIG. 5, a data memory 91-4 and an address By applying the function of a 0.4 kbps sub-rate time switch including the control memory 96-4, data of a plurality of types of sub-rates can be multiplexed to the basic rate. Further, by configuring the sub-rate cross-connect unit, cross-connect between 3.2 kbps unit and 0.4 kbps unit can be realized.

The present invention is not limited to the above-described embodiments, but can be variously added and changed. For example, the basic rate cross-connect unit and the sub-rate cross-connect unit are S- Although the case of the TS configuration is shown, an ST configuration, an STST configuration, or the like can be applied. The time switch (TSW) in the high-speed reception processing unit and the high-speed transmission processing unit is determined by the space switch (SS).
W) can be added to provide an exchange function. Although the case where the basic rate is set to 64 kbps is shown, another rate can be set as the basic rate.

[0053]

As described above, according to the present invention, the common unit section 1 is provided with the basic rate cross-connect section 3,
A sub-rate cross-connect unit 11 is provided in the interface unit 2 to multiplex the sub-rate data to the basic rate and to perform the basic-rate cross-connect and the sub-rate cross-connect. And the like, and the change of the type of sub-rate due to the change of the audio compression processing or the change of the multiplexing when transmitting the signaling information, etc., can be dealt with by changing only the interface unit unit 2. The unit 1 can be used as it is. Therefore, there is an advantage that an economical and highly flexible system can be constructed. Further, when the sub-rate cross-connect is no longer required, it is easy to extract a package or the like including the sub-rate cross-connect section 11 to make a space, and it is easy to mount a package for improving functions in this space. Become.

[Brief description of the drawings]

FIG. 1 is an explanatory view of a main part of an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a system according to an embodiment of the present invention.

FIG. 3 is an explanatory diagram of a basic rate and a sub-rate.

FIG. 4 is an explanatory diagram of a control circuit of a sub-rate time switch.

FIG. 5 is an explanatory diagram of a control circuit for a plurality of types of subrate time switches.

FIG. 6 is an explanatory diagram of sub-rate multiplexing.

FIG. 7 is an explanatory diagram of sub-rate multiplexing.

FIG. 8 is an explanatory view of a main part of a conventional example.

FIG. 9 is an explanatory diagram of a cross connect process.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Common unit part 2 Interface unit part 3 Basic rate clock part 4, 5 Space switch (SSW) 6 Time switch (TSW) 11 Sub-rate cross-connect part 12 High-speed transmission processing part 13 High-speed reception processing part 14, 15 Line set

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5K028 AA06 AA11 CC02 CC05 DD01 DD02 DD03 EE08 KK01 KK05 KK12 LL02 RR02 SS02 SS12 5K069 AA13 CB04 DB02 DB22 DB57 EA19 FA16 FC17

Claims (3)

[Claims] 1. A sub-rate multiplexer for multiplexing sub-rate data to a basic rate and cross-connecting the basic rate and the sub-rate data, wherein a basic rate cross-connect for cross-connecting the basic rate data is provided. A line unit for transmitting and receiving data to and from an external line, comprising: a common unit having a connect unit; and an interface unit connecting the common unit and an external line. A high-speed transmission processing unit that includes a sub-rate time switch and converts data from a line set into a format of an internal bus; and a sub-rate time switch that transfers data via the internal bus to the line set. A high-speed reception processing unit; the high-speed reception processing unit and the high-speed transmission processing unit And a sub-rate / cross-connect section connected between the sub-rate and the sub-rate for performing cross-connection of the sub-rate data. 2. The sub-rate cross-connect section of the interface unit section comprises a cross-connect section that cross-connects data of the sub-rate according to a plurality of types of data rates corresponding to the sub-rates. The sub-rate multiplexing device according to claim 1. 3. The common unit section has a basic rate cross-connect section including a time switch and a space switch, and the interface unit section has a sub-rate connected to a space switch of the basic rate cross-connect section. -An interface unit having a cross-connect unit, an interface unit connecting between a sub-rate line and the space switch, and an interface unit connecting between a basic-rate line and the space switch. 3. The sub-rate multiplexing device according to claim 1, wherein: