JPH06252333A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To ensure a wide connection pitch to the arrangement of the leads of a lead frame of a finer pitch in a semiconductor device to make it possible to make easily the connection of terminals as well as to make it possible to obtain a high-accuracy connection pitch and moreover, to make it possible to manufacture easily the semiconductor device. CONSTITUTION:A semiconductor chip 2 is bonded on a die pad 3 and the point parts of leads 4A, 4B and 4C are respectively connected to terminals on the chip 2. A connection part 4g for connecting to a wiring board is formed on an outer lead 4f of the lead 4A. Moreover, projected parts 4b and 4c are respectively formed in the middles of the leads 4B and 4C in the interior of a resin molded part 5, these parts 4b and 4c are respectively made to expose on the surface of the part 5 on the side of the wiring board and on the surface of the part 5 on the opposite side to the side of the wiring board and connection parts 4d and 4e are respectively formed. In order to connect the part 4d to the wiring board, the part 4e is utilized for the connection of the 4d subsequent to an inspection and a mounting.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a semiconductor device having a structure of a plastic flat package called QFP (Quad Flat Package) in which outer leads are provided from four directions and its manufacture. Involved in the method.

[0002]

2. Description of the Related Art Among conventional semiconductor devices, Japanese Patent Laid-Open No. 63-
In the one described in Japanese Patent No. 34967, a semiconductor chip is mounted on a lead frame made of metal, and a terminal of the semiconductor chip and an inner lead of the lead frame are wire-bonded by a wire such as a gold wire, and further by resin molding. These semiconductor chips and inner leads are sealed. In addition, on the side of the resin-molded plastic flat package, in order to increase the number of protruding terminals without increasing the package size, multiple terminal rows for the outer leads of the lead frame are provided. Conventional QF lead
Like the P type, it is projected from the four directions to the outside of the package, and the outer leads of the other row are bent so as to be folded back inside the package. Then, the outer lead protruding outward and the outer lead bent inward of the lower side of the package are connected at different positions on the substrate.

[0003]

In recent years, in order to realize miniaturization and high performance of electronic equipment, semiconductor chips have been highly integrated and miniaturized, and along with this, lead frames such as QFP have been installed. The semiconductor device used is required to have multiple pins. In the case of increasing the number of pins of a semiconductor device, it is naturally necessary to narrow the lead pitch of the lead frame to achieve a fine pitch. However, the lead frame is mainly processed by pressing or etching, and in the case of etching, the fine pitch of the lead frame is limited to about 0.2 mm at the tip of the inner lead when the plate thickness is 0.15 mm. Is. On the other hand, the progress of high integration of semiconductor chips is remarkable, and the pitch of terminals is 0.05 m.
Something about m has appeared. In order to deal with this, as a processing method aiming at a fine pitch of the lead frame, the applicant of the present application cuts only the tip portion of the inner lead of the fine pitch, which cannot be processed by etching, with a YAG laser, and the rest is etched and pressed. We have proposed and applied a processing method to process in advance or afterwards (Japanese Patent Application No. 4
No. -313615: filed on November 24, 1992). By this processing method, the tip portion of the inner lead can be cut to a pitch of about 0.07 mm when a material having a plate thickness of 0.15 mm is used.

When the pitch of the semiconductor device is made fine as described above, the pitch of the outer leads of the lead frame becomes narrower, but this makes it difficult to connect the terminals when mounting the semiconductor device on the substrate. That is, since the pitch is narrow, a short circuit may occur between the outer leads adjacent to each other, or conversely, the outer leads may not be reliably connected to the wiring pattern on the substrate and a connection defect may occur. On the other hand, if the package size of the semiconductor device is increased, the connection pitch of the outer leads becomes wider and the above-mentioned difficulty of terminal connection is reduced. Therefore, miniaturization of the package is restricted by the limit of the connection pitch. However, it is not preferable to restrict the miniaturization of the package because it is against the high integration and miniaturization of the semiconductor chip.

In the technique described in Japanese Patent Laid-Open No. 63-34967, a plurality of outer lead terminal rows are provided, one of which is projected outward and the other of which is bent inward of the package lower side. By shifting the protruding position of the outer lead for each terminal row, the interval between the outer lead connecting portions on the board, that is, the connecting pitch becomes wider, resulting in the problem of difficulty in terminal connection due to the fine pitch as described above. Seems to be resolved in.

However, it is difficult to bend the outer leads projecting from the side surface of the plastic flat package after the resin molding as in the above-mentioned known technique so as to be folded back, and it is possible to improve the processing accuracy and the connection pitch accuracy. I can't. Further, when the resin is bent, cracks may occur in the bent portion of the resin, and the bent outer leads are easily deformed after processing. Further, it is very difficult and difficult to realize the resin molding so that the outer leads form a plurality of terminal rows while the lead frame and the terminals of the semiconductor chip are wire-bonded.

It is an object of the present invention to secure a wide connection pitch for fine pitch lead frames and facilitate terminal connection, and obtain a highly accurate connection pitch.
A further object of the present invention is to provide a semiconductor device that can be manufactured more easily and a manufacturing method thereof.

[0008]

In order to achieve the above object, according to the present invention, terminals of a semiconductor chip are electrically connected to inner leads of a lead frame, and these semiconductor chips and inner leads of the lead frame are molded. In a semiconductor device that is integrally sealed by a portion, is mounted and connected on a wiring board, the lead frame has outer leads that extend outward from the side surface of the mold portion in a continuous manner with the inner leads, and A first lead in which a middle portion of the outer lead is bent to form a first connecting portion for connecting to the wiring board, and a middle portion of the inner lead is bent to the surface of the mold portion on the wiring board side. And a second lead having a second connection portion exposed and connected to the wiring board. .

Here, in the above semiconductor device, preferably, in the lead frame, a middle portion of the inner lead is bent to be exposed to the surface of the mold portion opposite to the wiring board side to form a third connecting portion. A third lead is provided.

In order to achieve the above object, according to the present invention, the terminals of the semiconductor chip are electrically connected to the inner leads of the lead frame, and the inner leads of the semiconductor chip and the lead frame are integrally sealed by the molding part. In the semiconductor device mounted on and connected to the wiring board, the lead frame has outer leads continuous to the inner leads and extending outward from the side surface of the molding portion, and a middle portion of the outer leads. A first lead formed by bending a first connection portion for connecting to the wiring board, and an intermediate portion of the inner lead is bent to be exposed on the surface of the mold portion opposite to the wiring board side. There is provided a semiconductor device including a second lead having two connecting portions.

In the semiconductor device as described above,
Preferably, each of the inner leads has a tip extending to a terminal portion of the semiconductor chip and connected to the terminal.

Further, in order to achieve the above object, according to the present invention, the terminals of the semiconductor chip are electrically connected to the inner leads of the lead frame, and the inner leads of the semiconductor chip and the lead frame are integrally formed in the molding portion. In the method of manufacturing a semiconductor device sealed in, a lead frame is formed from a single metal plate, and a predetermined inner lead of the lead frame is bent so that a convex portion is formed so as to be exposed on the surface of the mold portion. After that, the semiconductor chips are arranged so that the terminals face each other at the tips of all the inner leads, the tips of all the inner leads are connected to the terminals of the semiconductor chips, respectively, and Restrain the entire outer part and integrally seal the semiconductor chip and all the inner leads with a mold. The method of manufacturing a semiconductor device which is characterized in that there is provided.

[0013]

According to the present invention having the above-described structure, the first lead of the lead frame is extended outward from the side surface of the mold portion to be the outer lead continuously with the inner lead, and the middle portion of the outer lead is formed. To form a first connection portion for connecting to the wiring board, while bending a middle portion of the inner lead of the second lead to expose the inner lead to the surface of the molding portion on the wiring board side. By forming the second connecting portion for connecting to the wiring board, for example, the first lead having the first connecting portion and the second lead having the second connecting portion are alternately arranged. If the first connecting portion and the second connecting portion are used for terminal connection, the interval between adjacent connecting portions, that is, the connection pitch is widened. That is, the adjacent connecting portions are present at positions displaced in the longitudinal direction of the leads, and are adjacent to each other as compared with the case where all the outer leads are projected to the outside of the package as in the conventional QFP type. The spacing between the connection portions, that is, the connection pitch is doubled, and its accuracy is also improved. Therefore, it is possible to prevent a short circuit from occurring between the adjacent connection portions, or a connection defect due to improper connection of the terminals. Further, the miniaturization of the package is not restricted by the limit of the connection pitch, and the higher integration and miniaturization can be achieved. In addition, the widening of the connection pitch facilitates repair of a joint defect even if it occurs.

Further, since the second connecting portion formed in the middle portion of the inner lead of the second lead is firmly and accurately fixed by the mold portion, the positioning accuracy is good, and the connection defect is unlikely to occur. As a result, high reliability can be obtained, and connection can be easily performed.

Also, by bending the middle part of the inner lead of the third lead and exposing the inner lead to the surface of the mold portion on the side opposite to the side of the wiring board, a third connecting portion is formed. If the third lead and the above-mentioned first and second leads are arranged in order, for example, and the first connecting portion and the second connecting portion are used for terminal connection, the connection pitch between them becomes wider. Further, the third connecting portion exposed to the side opposite to the wiring board side can be used as an inspection terminal, and it is necessary to perform the circuit inspection of the semiconductor device before it is mounted on the board, not to mention the circuit inspection of the semiconductor device. However, it becomes possible to perform circuit inspection with high reliability and easily. further,
This connection portion can also be used as a connection terminal for changing the circuit after mounting on the board.

Further, the third connecting portion formed in the middle portion of the third inner lead is also firmly and accurately fixed by the mold portion similarly to the above-mentioned second connecting portion, so that it is used as an inspection terminal. High reliability can be obtained.

Further, according to the present invention, the tip of the inner lead processed into a fine pitch by the above-mentioned fine processing technique is extended to the vicinity of the terminal of the semiconductor chip, and the tip is directly bonded to the terminal. The inner lead and the semiconductor chip are electrically connected to each other. As a result, the inner lead and the semiconductor chip can be collectively connected by using gold bumps or the like, and the processing time is shortened.
Further, since the wire bonding is not used, even if the lead frame has a fine pitch, there is no problem that the gold wires are cut during the wire bonding or the gold wires are contacted during resin molding. Further, since the lead frame is used, it can be mounted by reflow soldering as in the conventional QFP.

The above semiconductor device can be manufactured by the manufacturing method of the present invention. In the manufacturing method of the present invention,
Among the inner leads, a predetermined inner lead is bent to form a convex portion so as to be exposed on the surface of the mold portion. The exposed portion of the convex portion on the surface of the mold portion becomes the second or third connecting portion. Since the convex portion is formed of a single metal plate, even when processing is performed such that the inner leads that form the convex portion and the inner leads that do not form the convex portion are arranged alternately, JP-A-63-34967. As compared with the case where the outer leads protruding from the already resin-molded package are folded back and bent as described in Japanese Patent Laid-Open Publication No. 2003-187, processing can be performed much more easily and accurately.

When the inner leads and the terminals of the semiconductor chip are connected and integrally sealed with a mold, the entire outer portion of the inner leads, that is, the outer portion of the inner leads having the protrusions and By constraining the outer leads that do not form protrusions together with a mold, each inner lead does not move due to the molding resin that flows in, and the inner leads make contact with each other or the connection between the inner leads and the semiconductor chip. Accidents such as disconnection are prevented.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device according to an embodiment of the present invention will be described below with reference to FIGS. In this embodiment, QFP (Quad
This is an example of a semiconductor device having a configuration similar to a flat plastic package called a Flat Package).

1 and 2, the semiconductor device 1 of this embodiment is electrically connected to a semiconductor chip 2, a die pad 3 located above the semiconductor chip 2 and mounted thereon, and terminals of the semiconductor chip 2. Leads 4A, 4B, 4C,
These semiconductor chip 2, die pad 3 and leads 4A,
4B and 4C, and the resin mold portion 5 integrally sealing the inner lead portions. Semiconductor chip 2
Is bonded to the die pad 3 with a thermosetting adhesive 6 with the circuit forming surface facing the die pad 3, and the leads 4A, 4
As shown in FIG. 2, B and 4C are arranged in this order, and their tips extend to the terminal portion of the semiconductor chip 2 and are electrically connected to the terminals by gold bumps 7. The inner portions of the leads 4A, 4B, and 4C have a radial shape, and the widths of the portions are gradually narrowed toward the semiconductor chip 2. Figure 1 (a)
Shows a cross section at the position of the lead 4A, and FIG. 1 (b) shows the lead 4B.
1C is a cross-sectional view showing the cross section at the position of the lead 4C, and FIG. 1D is a cross-sectional view collectively showing (a) to (c).

As shown in FIGS. 1 (a) and 1 (d), the lead 4A is composed of an inner lead 4a embedded in the resin mold portion 5 and an outer lead 4f extending outside the resin mold portion 5, and the outer lead 4f is In order to connect to the wiring board, it is bent downward to form a connecting portion 4g. In addition, as shown in FIGS. 1B and 1C, a convex portion 4b is provided inside the resin mold portion 5 at an intermediate portion of the inner lead of the lead 4B to the connection portion with the semiconductor chip 2. A convex portion 4c is formed in a portion of the lead that reaches the connection portion with the semiconductor chip 2. The convex portion 4b is exposed on the surface of the resin molded portion 5 on the side of the wiring board on which this semiconductor device is mounted, that is, the side on which the outer lead 4f is bent, to form the connecting portion 4d, and the connecting terminal 4d is formed on the portion 4d. When used as, it is plated with solder (not shown) for easy connection. This connecting portion 4d is also used for connecting to the wiring board together with the connecting portion 4g. On the other hand, the convex portion 4c is provided on the wiring board side on which the semiconductor device is mounted, on the outer lead 4c.
The connection portion 4e is formed by being exposed on the surface of the resin mold portion 5 on the side opposite to the side where the f is bent, and the connection portion 4e is also solder-plated (not shown). Also,
The leads 4B and 4C slightly project from the side surface of the resin mold portion 5, and the portions outside thereof are cut off. The protruding positions of the leads 4B and 4C are at the same height as the protruding position of the lead 4A.

In the semiconductor device 1 configured as described above, the lead 4A having the outer lead 4f in which the connection portion 4g is formed and the connection portion 4 exposed to the surface on the wiring board side.
Since the lead 4B having the d formed therein and the lead 4C having the connecting portion 4e exposed to the surface opposite to the wiring substrate side are arranged in this order, the connecting portions of adjacent connecting terminals, that is, the connecting portions of the outer leads 4f are arranged. 4g and the connecting portion 4d are present at positions displaced from each other in the longitudinal direction of the lead.
As compared with the case where all the outer leads are projected to the outside of the package as in the case of the mold, the interval, that is, the connection pitch, is about twice or more wide, and the accuracy is also improved. Therefore,
It is possible to prevent a short circuit from occurring between adjacent connecting portions, and to prevent a connection defect from occurring due to improper connection of the terminals, thereby improving reliability as a connection terminal. On the contrary, if the package outer dimensions and the connection pitch are the same as those of the conventional one, it is possible to manufacture a semiconductor chip having twice or more pins, and it is possible to further increase the number of pins.

Further, conventionally, the miniaturization of the package was restricted by the limit of the connection pitch, but this restriction is removed, and further higher integration and miniaturization can be achieved. In addition, the widening of the connection pitch facilitates repair of a joint defect even if it occurs. Furthermore, the resin mold part 5
4d inside the outer dimensions of the connector as a connection terminal row
Since the board is provided, the board surface at this position can be effectively utilized, and the board mounting density can be improved.

Further, the connecting portion 4e exposed to the surface opposite to the wiring board side can be used as an inspection terminal, and needless to say, not only the circuit inspection of the semiconductor device before mounting on the substrate but also the inspection to the substrate. Even after mounting, the circuit inspection can be performed with high reliability and easily. Further, this connecting portion can also be used as a connecting terminal for changing the circuit after mounting on the substrate.

Further, since the connection parts 4d and 4e are firmly and accurately fixed by the resin mold part 5, the positioning accuracy is good, and when used as the connection terminals, connection defects are unlikely to occur and high reliability is obtained. Further, the connection can be made easily, high reliability can be obtained even when used as an inspection terminal, and the inspection can be easily performed.

Since the semiconductor device of this embodiment uses the lead frame, it can be mounted by reflow soldering similarly to the conventional QFP. For example, a Cu foil lead and a semiconductor chip formed on a polyimide film can be mounted. TAB (Tap Automated Bonding)
) Method semiconductor device is extremely easy to handle during mounting.

Next, one embodiment of the method for manufacturing the above-mentioned semiconductor device 1 will be described with reference to FIGS. First, in step 100, a metal plate such as steel, copper alloy, 42 alloy, or Kovar is placed on a leveler and processed into a predetermined thickness. Next, in step 101, the metal plate is processed, and as shown in FIG. 4, the die pad 3 and the lead frame 4 and the dam bar 1 for supporting these during manufacturing.
0 and the peripheral frame member 11 having the guide hole 12 are formed. At this time, a predetermined lead of the lead frame 4,
That is, the leads 4B and 4C shown in FIG. 2 are formed in such a length that the tips thereof extend to the terminal portions of the semiconductor chip 2 even when the convex portions are formed later. Further, the pitch of the tip portion of the lead frame 4 is about 0.07 mm when the plate thickness of the metal plate is 0.15 mm. By making the tip portion of the lead frame 4 have such a length and a fine pitch, it becomes possible to directly connect the lead frame 4 to the terminals of a highly integrated semiconductor chip having a fine pitch. The processing of the lead frame 4 having such a fine pitch can be realized by the processing method of the above-mentioned prior invention. Then, the entire surface of the metal plate processed as described above is subjected to solder plating.

Next, in step 102, the lead 4
Protrusions 4b and 4c are formed in the middle of B and 4C (see FIGS. 2 and 6). However, no protrusion is formed on the lead 4A. The processing in this step 102 is performed using a die press or the like as shown in FIG. For example, lead 4B
5A, the lead 4B is arranged at a predetermined position of the lower pressing die 20 as shown in FIG.
As shown in FIG. At this time,
The lead 4 is formed by the concave portion 20a formed on the lower pressing die 20 and the convex portion 21a formed on the upper pressing die 21.
A pressing portion 23 is formed on B. And the lower mold 24
Is placed on the lower surface of the lead 4B, the upper die 25 is lowered, and the convex portion 4b as shown in FIG. 5C is formed by the concave portion 24a formed in the lower die 24 and the concave portion 25a formed in the upper die 25. To form the lead 4B. At the time of forming the convex portion 4b, the lead 4B is fixed so as not to move by the action of the pressing portion 23. The height of the convex portion 4b is set so that it can be exposed on the surface of the resin mold portion 5 after molding. The same method is used to form the convex portion 4c on the lead 4C, but in this case, a mold upside down from that shown in FIG. 5 is used. In addition, if the molding is performed using a mold that can simultaneously form the convex portions 4b and 4c, the manufacturing time can be shortened.

In step 101, the inner leads are formed in a state in which the tips are connected to each other.
After forming the protrusions 4b and 4c, a reinforcing tape may be attached to these protrusions, and then the tip portions of the inner leads may be separated to be individually separated. As a result, the inner leads are prevented from being displaced at their portions before the individual inner leads are separated, and after the reinforcement tape is attached, by the reinforcement tape.

Next, in step 103, a thermosetting adhesive is applied to the circuit forming surface of the semiconductor chip 2 and gold bumps are arranged on the terminals of the semiconductor chip 2. In addition, before applying the thermosetting adhesive, the semiconductor chip 2
It is preferable to previously form an electrically insulating protective film on the circuit formation surface.

Next, in step 104, the semiconductor chip 2 is placed on the die pad 3 of the metal plate formed as described above.
Equipped with. At this time, the semiconductor chip 2 is arranged so that the circuit forming surface coated with the adhesive faces the die pad 3, and the tips of the inner leads are aligned with the gold bumps arranged on the terminals of the semiconductor chip 2.

Next, in step 105, a trowel heated to a high temperature is pressed from above the die pad 3 to apply heat and pressure to cure the thermosetting adhesive to bond the semiconductor chip and the die pad 3. Similarly, a trowel heated to a high temperature is pressed against the tip portion of the inner lead to apply heat and pressure to electrically connect the tip of the inner lead and the terminal of the semiconductor chip 2 via the gold bump. In this case, by pressing the two trowels together, the semiconductor chip 2 and the die pad 3 are joined and the inner lead tip and the chip terminal are simultaneously connected.

Next, in step 106, the lead 4B
The outer portions of the inner leads of 4C and 4C are separated from the position of the dam bar 10. At this time, the outer portions of the leads 4B and 4C are cut into a size that slightly protrudes from the side surface of the resin mold portion 5 described later. The portion slightly protruding from the side surface of the resin mold portion 5 has protruding portions 4h and 4i.
As will be described later, it will be a portion to be restrained by a mold together with the lead 4A when it is resin-molded later. These leads 4B and 4C
FIG. 6 shows a state in which the cutting is completed. The range of the resin mold portion 5 is indicated by a chain double-dashed line in the figure.

Next, in step 107, the semiconductor chip 2, the die pad 3, the inner leads 4a, and the inner leads of the leads 4B and 4C joined and connected as described above are integrally sealed with a resin mold, and the resin mold is formed. Form part 5. At this time, as shown in FIG. 7, the lower die 30 and the upper die 31 are located outside the inner leads 4a and outer leads, and the protrusions located outside the leads 4B and 4C cut in step 106. Molding resin 33 is injected from the resin injection port 32 while the portions 4h and 4i are constrained, that is, the entire outer portion is constrained from the inner lead portion to be resin-molded. In this way, since the entire outer portion is constrained from the inner lead portion during molding, each inner lead does not move due to the molding resin that flows in, the inner leads contact each other and the inner lead and the semiconductor chip Accidents such as disconnection of the connection part of are prevented. In step 106, the leads 4B and 4
The outer portion of the inner lead of C is separated from the position of the dam bar 10, but the dam bar 10 still remains, and the function of the dam bar that prevents the resin mold from flowing toward the outer lead is effectively used. It

At the stage when the molding is completed, the convex portion 4 formed in the middle of the leads 4B and 4C in step 102.
Although b and 4c are temporarily exposed on the surface of the resin mold portion 5, the surface of the resin mold portion 5 is not clean because the resin mold partially adheres to the surface, so that the surface of the resin mold portion 5 is ground completely. Are exposed to form the connection portions 4d and 4e. Further, when these connecting portions 4d and 4e are used as connecting terminals, solder plating is applied to these portions so as to facilitate the connection. Although not shown, the exposed connecting portions are protected by further covering the connecting portions 4d and 4e with an electric insulating material.

Next, in step 108, the dam bar 1
0 and the peripheral frame member 11 are cut to cut the outer leads. As a result, the leads 4B and 4C are removed from the outside of the dam bar position, and only the inner lead portions and the protrusions 4h and 4i remain. The protrusions 4h and 4i may be removed by grinding or the like. Next, the connection state between the semiconductor chip 2 and the leads 4A, 4B, 4C is inspected. At this time, the connection portions 4d and 4e formed as described above can be used. Further, the connecting portion 4e can be used also for a circuit inspection after mounting the semiconductor device on a substrate, and is also used as a connecting terminal for adding an electric component or changing a circuit after mounting if necessary. You can also

Next, in step 109, the lead 4A
The outer lead 4f is bent to form a connecting portion 4g for connecting to the substrate, a manufacturing number, a product number, etc. are marked, and finally, in step 110, the product is inspected, packaged and shipped.

According to the method of manufacturing the semiconductor device 1 described above,
Since the convex portion formed in the middle of the leads 4B and 4C is formed from a single metal plate including the leads, the die pad, and the frame material, it can be processed easily and accurately. In particular, even in the case where the leads 4A having no protrusions and the leads 4B, 4C having protrusions are arranged in order as in this embodiment, the processing is easy. Also, for example, the above-mentioned Japanese Patent Laid-Open No. 63-34
As compared with the case where the outer lead protruding from the already resin-molded package is bent so as to be folded back as described in Japanese Patent No. 967, the processing is much easier and the processing accuracy is better.

When the resin mold is used for sealing, the entire outer portion of the inner lead of the lead 4, that is, the lead 4 is
The outer portion of the inner lead 4a of A and the leads 4B and 4
By restraining the protrusions 4h and 4i located on the outside of C together with the molds 30 and 31, the internal lead 4
The inner leads of A, 4B, and 4C do not move due to the mold resin that flows in, and accidents such as contact between them or disconnection of the connection portion with the semiconductor chip 2 are prevented.

Further, in the above-described method of manufacturing the semiconductor device 1, the inner leads and the chip terminals are directly connected via the gold bumps. Therefore, since the inner leads and the semiconductor chip 2 can be connected at one time, the processing time is shortened, the manufacturing process of the semiconductor device is greatly simplified and the mass productivity is improved, and the strength of the connection portion is also improved by the resin molding. Accidents such as disconnection can be prevented. Also,
Since the tips of the inner leads and the terminals of the semiconductor chip 2 are directly joined, the pitch of the chip terminals can be reduced, and the size of the semiconductor chip 2 can be reduced to increase the number of semiconductor chips that can be obtained from one wafer material. Therefore, the cost can be reduced. Further, the positioning accuracy of the semiconductor chip 2 can be improved, the reliability of the semiconductor device can be remarkably improved, and the flat lead frame and the semiconductor chip are superposed on each other so that the entire semiconductor device can be thinned. is there.

It should be noted that, instead of extending one end of the inner lead to the vicinity of the terminal of the semiconductor chip 2 and directly joining them as described above, the tip of the inner lead and the terminal of the semiconductor chip 2 are connected by a conventional wire bonding method. May be.

Another embodiment of the present invention will be described with reference to FIG. In the semiconductor device 1 of the present embodiment, the lead 4A having the outer lead 4f having the connection portion 4g as shown in FIG. 8A and the outer lead protruding from the side surface of the resin mold portion 5 as shown in FIG. 8B. The lead 40 is bent inside the resin mold portion 5 to form the connection portion 41 without being formed. The leads 4A and 40 are arranged alternately. FIG. 8C is a sectional view showing the leads 4A and 40 collectively. In FIG. 8B, the lead 40 is bent on the wiring board side, that is, in the same direction as the bending direction of the outer lead 4f, and its outer end portion terminates inside the resin mold portion 5 and a part of its surface. Is exposed on the surface of the resin mold portion 5 to form the connection portion 41. This connecting portion 41 is used as a connecting terminal like the connecting portion 4d in FIG. Other configurations, such as connection between the semiconductor chip and the inner leads, are similar to those of the embodiment of FIG.

According to the present embodiment configured as described above,
Adjacent connection terminals are present at positions displaced in the longitudinal direction of the leads, and the connection pitch is about 2 as compared with the case where all the outer leads are projected to the outside of the package as in the conventional QFP type. It is twice as wide and its accuracy is improved. Therefore, it is possible to prevent a short circuit from occurring between the adjacent connecting portions, and to prevent a connection defect from occurring due to improper connection of the terminals, thereby improving the reliability of the connection terminal. That is, the same effect as that of the above-described embodiment can be obtained.

Still another embodiment of the present invention will be described with reference to FIG. In this embodiment, the leads 4A and 4 of FIG.
In addition to 0, it has a lead 42 that is bent inside the resin mold portion 5 to form a connection portion 43. Note that FIG. 9 is a cross-sectional view showing each lead together. The lead 42 is bent on the side opposite to the side of the wiring board, that is, in the direction opposite to the bending direction of the outer lead 4f, and the outer end of the lead 42 is terminated inside the resin mold portion 5 and a part of its surface is made of resin. The connection part 43 is formed by being exposed on the surface of the mold part 5. This connecting portion 43 can be used as an inspection terminal similarly to the connecting portion 4e of FIG. 1, and it is highly reliable even after the circuit is inspected before mounting it on the substrate, not to mention the circuit inspection of the semiconductor device. In addition, the circuit inspection can be easily performed. Further, this connecting portion can be used as a connecting terminal for changing the circuit after mounting on the substrate.
Although the die pad is not provided in this embodiment, it may be provided, of course.

According to the present embodiment configured as described above,
In addition to the effect similar to that of the embodiment of FIG. 8, a highly reliable and easy circuit inspection can be performed before and after mounting on a board, and a circuit can be easily changed after mounting on a board. .

[0047]

According to the semiconductor device of the present invention, a wide connection pitch can be secured for a fine pitch lead frame, a highly accurate connection pitch can be obtained, and terminal connection can be performed easily with high reliability. it can.

Further, the circuit inspection can be carried out with high reliability and easily, and the electric parts can be easily added and the circuit can be changed with high reliability even after mounting on the board. .

Further, according to the manufacturing method of the present invention, the convex portion provided on the inner lead can be easily and accurately processed. Further, since the entire outer portion of the inner lead is constrained and molded, the inner lead does not move, and accidents such as contact with each other or disconnection of the connection portion with the semiconductor chip are prevented.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, (a), (b) and (c) are cross-sectional views of respective lead positions, and (d) is (a)-. It is sectional drawing which shows (c) collectively.

FIG. 2 is a plan view showing the semiconductor device shown in FIG. 1 with a resin mold portion removed.

FIG. 3 is a diagram showing a manufacturing process of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 4 is a plan view of the metal plate after processing the die pad and the inner leads in the manufacturing process shown in FIG.

5 is a cross-sectional view showing a step of forming a protrusion in the middle of a predetermined inner lead in step 102 of FIG.

FIG. 6 is a plan view showing a state in which a semiconductor chip is bonded and connected to a die pad and an inner lead, and an outer portion of the inner lead having a convex portion is cut in the manufacturing process shown in FIG.

FIG. 7 is a diagram showing a molding process in step 107 of FIG.

FIG. 8 is a cross-sectional view of a semiconductor device according to another embodiment of the present invention, in which (a) and (b) are cross-sectional views of respective lead positions, and (c) is (a) and (b). ) Is a cross-sectional view collectively.

FIG. 9 is a cross-sectional view of a semiconductor device according to still another embodiment of the present invention, showing each lead together.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Semiconductor chip 4,4A, 4B, 4C Lead 4a Inner lead 4b, 4c Convex part 4d, 4e Connection part 4f Outer lead 4g Connection part 4h, 4i Projection part 5 Resin mold part 7 Gold bump 30 Lower mold 31 Upper mold 32 Resin injection port 33 Mold resin 40 Lead 41 Connection part 42 Lead 43 Connection part

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shigeyuki Sakurai 650 Kazutachi-cho, Tsuchiura-shi, Ibaraki Hitachi Construction Machinery Co., Ltd.Tsuchiura factory (72) Inventor Yoshiya Nagano 650 Kintate-cho, Tsuchiura-shi, Ibaraki Hitachi Construction Machinery Co. Ceremony Company Tsuchiura Factory

Claims (5)

[Claims] 1. A semiconductor chip terminal is electrically connected to an inner lead of a lead frame, the semiconductor chip and the inner lead of the lead frame are integrally sealed with a mold part, and mounted and connected on a wiring board. In the semiconductor device according to claim 1, the lead frame has an outer lead that is continuous with the inner lead and extends outward from the side surface of the mold portion, and a middle portion of the outer lead is bent to connect to the wiring board. First forming first connection
And a second lead formed by bending a middle part of the inner lead to expose it to the surface of the mold portion on the side of the wiring board and forming a second connection portion for connecting to the wiring board. Characteristic semiconductor device. 2. The semiconductor device according to claim 1, wherein, in the lead frame, a middle portion of the inner lead is bent to be exposed at a surface of the mold portion opposite to the wiring board side to form a third connection portion. A semiconductor device comprising the third lead described above. 3. The terminals of the semiconductor chip are electrically connected to the inner leads of the lead frame, and the inner leads of the semiconductor chip and the lead frame are integrally sealed with a mold part, mounted on a wiring board and connected. In the semiconductor device according to claim 1, the lead frame has an outer lead that is continuous with the inner lead and extends outward from the side surface of the mold portion, and a middle portion of the outer lead is bent to connect to the wiring board. First forming first connection
And a second lead in which a middle portion of the inner lead is bent to be exposed to the surface of the mold portion opposite to the wiring substrate side to form a second connection portion. 4. The semiconductor device according to claim 1, wherein the inner leads of the respective inner leads extend to the terminal portions of the semiconductor chip and are connected to the terminals. Semiconductor device. 5. A method of manufacturing a semiconductor device, wherein terminals of a semiconductor chip are electrically connected to inner leads of a lead frame, and the inner leads of the semiconductor chip and the lead frame are integrally sealed by a molding part. Forming a lead frame from the metal plate of the above, and forming a convex portion so that a predetermined inner lead of the lead frame is bent so as to be exposed on the surface of the mold portion, and then terminals are provided at the tips of all the inner leads. The semiconductor chips are arranged so as to face each other, the tips of all the inner leads and the terminals of the semiconductor chips are connected, respectively, and then the entire outer portion than all of the inner leads is constrained and the semiconductor chips and the A method of manufacturing a semiconductor device, wherein all the inner leads are integrally sealed with a mold.