JPH0624281A - On-vehicle data input device - Google Patents

Abstract

PURPOSE:To provide a data input device of simple structure wherein a signal fetched from a vehicle sensor can be fetched in a condition that the signal can be processed by a CPU. CONSTITUTION:An analog signal and a pulse signal from sensors are converted respectively into digital data in an A/D converter 10 and a timer circuit 20, to give the data to an arithmetic part 40 through a selector 32. A selector 31 selects constants alpha, beta in a register 42 given to the arithmetic part 40, in which filter calculation is performed. An arithmetic result is stored in a predetermined position of a register 44 by a selector 37 and used for calculation thereafter as necessary. The arithmetic final result is output from an I/O part 45 and given to a CPU. Each constitutional element is built in a single semiconductor chip 100.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a vehicle-mounted data input device,
In particular, the present invention relates to an in-vehicle data input device for taking in a signal from a sensor attached to a vehicle to a vehicle control CPU.

[0002]

2. Description of the Related Art In electronic control of automobiles, signals from various sensors are taken in as digital data and given as input data to a CPU. The signals from such sensors usually include noise components. Often Therefore, the digital data obtained from the sensor is C
Before being processed by the PU, it is general to perform a filter operation for removing a noise component. Usually CP
U is interrupted and the filter control obtained from the sensor is performed in a state in which the original control processing of the CPU is interrupted, or this filter is obtained by using an arithmetic processing device such as a digital signal processor separately from the CPU. The calculation is being performed. For example, Japanese Patent Laid-Open No. 55-82965 and Japanese Utility Model Laid-Open No. 60-640 disclose such a vehicle-mounted arithmetic processing unit.

[0003]

When the CPU is made to perform the above-described filter calculation, the calculation load on the CPU becomes very heavy, and efficient vehicle control cannot be performed, which is not preferable. On the other hand, if this filter calculation is performed by a calculation processing device prepared separately from the CPU, the calculation load on the CPU can be reduced. However, such a processor has a built-in processing unit,
Although it has the advantages of high versatility and being able to perform various filter operations, on the other hand, there is a problem that the cost becomes high because the structure becomes very complicated.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a data input device having a simple structure which can take in a signal taken in from a vehicle sensor in a state where it can be processed by a CPU.

[0005]

[Means for Solving the Problems]

(1) The first invention of the present application is an in-vehicle data input device for incorporating a signal from a sensor mounted on a vehicle into a CPU for vehicle control, and converting an analog signal or a pulse signal from the sensor into digital data. And a filter arithmetic circuit that performs a predetermined specific filter arithmetic operation on digital data obtained by the converter, are incorporated in a single semiconductor chip.

(2) A second invention of the present application is, in the vehicle-mounted data input device according to the above-mentioned first invention, an arithmetic module for adding or multiplying a filter arithmetic circuit, and a first arithmetic module for the arithmetic module. First to give input data of
, A second selector for providing second input data, a first register for temporarily holding the first multiplication result by the arithmetic module, and a second register for temporarily holding the second multiplication result. The first selector selects the first filter constant α and the second selector selects the digital data X obtained based on the sensor, and supplies the selected data to the arithmetic module as input data.
And the resulting αX is held in the first register, and the first selector selects the second filter constant β by
The second selector selects each of the previous filter calculation results Y and gives it to the calculation module as input data to perform the second multiplication, and holds the result βY in the second register. The data αX in the register No. 1 and the data βY in the second register are respectively selected by the second selector, given to the arithmetic module as input data and added, and the result is output as the current filter arithmetic result. Therefore, each selector is configured to perform a selecting operation.

(3) A third invention of the present application is the vehicle-mounted data input device according to the second invention, wherein the digital data X obtained based on the sensor overflows the number of processing bits of the filter arithmetic circuit. In this case, instead of the digital data X, an overflow processing circuit for supplying the data showing the maximum value within the range of the number of processing bits to the first selector is further provided.

[0008]

[Operation] The analog signal or pulse signal from the sensor is converted into digital data by the converter, and then a specific filter operation is performed by the filter operation circuit. Here, the filter operation circuit is a circuit assembled to perform only a predetermined specific filter operation,
The structure is very simple and inexpensive as compared with an arithmetic processing device having a built-in processing unit for performing general-purpose arithmetic. Moreover, since the converter and the filter arithmetic circuit are incorporated in a single semiconductor chip, it is possible to manufacture the entire in-vehicle data input device as a one-chip semiconductor device, which is suitable for mass production and You can expect a significant cost reduction.

[0009]

The present invention will be described below based on illustrated embodiments. FIG. 1 is a block diagram showing the basic configuration of a vehicle-mounted data input device according to the present invention. The vehicle-mounted data input device of the present invention is incorporated in a single semiconductor chip 100, and includes an A / D converter 10, a timer circuit 20, and a filter arithmetic circuit 30. Usually, a vehicle-mounted sensor outputs a detection value as an analog signal or a pulse signal. In the case of an analog signal, the detected value has a value proportional to the voltage, and in the case of a pulse signal, the detected value has a value proportional to the pulse width. The device can capture detection values in either form. That is, the analog signal is converted into digital data by the A / D converter 10, and the pulse signal is converted into digital data by the timer circuit 20. For the converted digital data, the filter arithmetic circuit 30
In, a filter operation is performed. Although details of this filter calculation will be described later, the noise component included in the original signal is removed by this calculation.

After all, this device has a function of receiving an analog signal or a pulse signal from the sensor, converting these signals into digital data, executing a filter operation, and outputting the digital data after the operation. The digital data thus output is provided to the vehicle-mounted CPU 200. The CPU 200 controls the engine of the automobile based on this digital data. The characteristic of this device is that the filter arithmetic circuit 30 is not constituted by a general-purpose arithmetic processing device including a processing unit, but is constituted by a dedicated circuit for performing only a predetermined specific filter arithmetic operation. Points, A / D converter 10, timer circuit 20, filter arithmetic circuit 30
Is that it is incorporated in a single semiconductor chip 100. Since the filter arithmetic circuit 30 is composed of simple units such as a selector, a register, and an ALU, the structure is very simple. Further, since these functions are incorporated in the single semiconductor chip 100,
By simply inserting the semiconductor chip 100 between the sensor and the CPU 200, the sensor output can be captured and the CPU operation can be performed on the sensor output.

As a filter calculation for removing noise components, the following calculation formula is generally known. That is, the digital data (data before calculation) captured from the sensor this time is X (n), and the data after this calculation is Y.
(N), assuming that the data after the previous calculation is Y (n-1) and the predetermined filter constants are α and β, Y (n) = (αX (n) + βY (n-1)) / ( α +
β () yields Y (n). In order to execute such calculation, the filter calculation circuit 30 may be configured by the circuit shown in FIG. The configuration of this circuit will be described below. The input of this circuit is the data X (X in the above equation)
(Corresponding to (n)), and the output is data Y (Y in the above equation).
(Corresponding to (n)). The selector 31 has a function of inputting data corresponding to the two filter constants α and β, selecting one of the constants, and outputting the selected constant. Selector 32
Has a function of inputting the data X and the previous output Y (corresponding to Y (n-1) in the above equation), selecting one of the data, and outputting the selected data. The data selected by the selector 31,
The data selected by the selector 32 is input to the arithmetic unit 40. The arithmetic unit 40 includes selectors 33 and 34, an arithmetic module 35, and a selector 36. The output of the arithmetic unit 40 is output as the output data Y of this circuit or given to the selector 37.
The selector 37 stores the given data in either the register 38 or the register 39. Arithmetic unit 4
The selector 33 forming 0 selects either the data given from the selector 31 or the data stored in the register 38 and gives it to the arithmetic module 35. Further, the selector 34 selects either the data given from the selector 32 or the data stored in the register 39 and gives it to the arithmetic module 35. The arithmetic module 35 multiplies or adds two pieces of given data and gives the result to the selector 36. The selector 36 performs a selection operation such that the multiplication result is output to the selector 37, and the addition result is output as data Y to the outside of this circuit.

It is now assumed that the arithmetic unit 40 has a 16-bit arithmetic function. In this case, the data X and Y are
It will be provided as 16-bit data. Here, as the alpha + beta = 2 ^16, if as previously defined two filter constant, the above in the arithmetic expression (alpha
The division by + β) is no longer necessary, and the circuit in Figure 2
The filter calculation based on the above calculation formula becomes possible. That is, this circuit may be operated as follows. First, in the first stage, the selector 31 selects the constant α and the selector 32 selects the data X. Furthermore,
The selector 33 selects the constant α, the selector 34 selects the data X, and causes the arithmetic module 35 to execute multiplication. As a result, αX is obtained. Therefore, if the selector 37 side is selected as the output of the selector 36 and the register 38 side is selected as the output of the selector 37, the calculation result αX can be stored in the register 38. Subsequently, in the second stage, the selector 31 selects the constant β, and the selector 32 selects the data Y (the value of Y obtained by the previous calculation). Further, the selector 33 selects the constant β, and the selector 34 selects the data Y.
Is selected to cause the calculation module 35 to execute multiplication.
As a result, βY is obtained. Therefore, if the selector 37 side is selected as the output of the selector 36 and the register 38 side is selected as the output of the selector 37, the calculation result βY
Can be stored in register 39. In the final third stage, the selector 33 selects the data αX in the register 38, the selector 34 selects the data βY in the register 39, and causes the arithmetic module 35 to perform addition. As a result, a calculation result of αX + βY is obtained. Therefore, if the output to the external circuit is selected as the output of the selector 36, the calculation result αX + βY can be output to the outside (that is, the CPU 200) as the new calculation result Y. That is, Y (n) is obtained by the calculation of Y (n) = (αX (n) + βY (n-1)).

As described above, in this embodiment, the arithmetic unit 4
0 has a 16-bit arithmetic function. Therefore,
The digital data X converted by the A / D converter 10 or the timer circuit 20 is "0000" in hexadecimal display.
To "FFFF", it operates normally.
However, when the data X takes a value exceeding this, that is, when an overflow occurs, it becomes impossible to perform a correct filter operation. As described above, when the digital data X obtained based on the sensor overflows the number of processing bits of the filter arithmetic circuit 30, instead of the digital data X, data indicating the maximum value within the range of the number of processing bits. (In this example, "FFF
F ") can be given to perform appropriate processing against overflow. In FIG. 3, another selector 32a is provided before the selector 32 in order to perform such overflow processing. Instead of giving the data X directly to the selector 32, the selector 32
The data X and the allowable maximum value "FFFF" are given to a, and the selector 32a is switched by the overflow flag indicating that an overflow has occurred in the A / D converter 10 or the timer circuit 20. That is, normally, the selector 32a outputs the data X
When the overflow flag is set, "FFFF" is selected and output. Therefore, the data output by the selector 32 does not overflow.

Finally, FIG. 4 shows an example of the entire circuit of the semiconductor chip 100 shown in FIG. Here, all the components surrounded by broken lines are formed in a single semiconductor chip 100. The data converted by the A / D converter 10 and the data converted by the timer circuit 20 are both provided to the selector 32. From the overflow processing circuit 41 to the selector 32, the maximum allowable value “FFF
F ″ is also given. The overflow flag is given from the timer circuit 20 to the overflow processing circuit 41. When this overflow flag is raised, the selector 32 is instructed by the overflow processing circuit 41. Selects the maximum allowable value “FFFF.” In this embodiment, regarding the analog signal,
Since the maximum allowable value is designed to be the power supply voltage value, no overflow processing is performed.

The register 42 stores two filter constants α and β, and one of them is selected by the selector 31 and given to the arithmetic unit 40. Arithmetic unit 4
0 performs the above-described three-stage calculation in synchronization with the cycle of the sampling pulse given from the sampling control circuit 43. The calculation result (αX, βY, Y) is the selector 37
It is stored in a predetermined storage position in the register 44 via, and these values are taken into the arithmetic unit 40 as needed. The I / O unit 45 sends the operation result Y in the register to the CP.
The A / D converter 1 has a function as an interface for outputting to U, and outputs an instruction from the CPU.
0, the timer circuit 20, and the register 42. Therefore, the A / D converter 10 and the timer circuit 20 can be controlled by the CPU, and the filter constants α and β in the register 42 can be set by the CPU.

Although the present invention has been described above based on the illustrated embodiment, the present invention is not limited to this embodiment and can be implemented in various modes other than this. In particular, the above-described filter calculation is shown as an example, and the present invention is applicable to any device that performs filter calculation. For example, if α + β = 2 ¹⁶ and then β = 2 ¹⁶ −α are set, β = (1−α). Therefore, the constant α is logically inverted and 1 is added. It is also possible to use a value instead of the constant β.

[0017]

As described above, according to the present invention, a converter for converting an analog signal or a pulse signal from a sensor into digital data, and a filter operation circuit for performing a specific filter operation on this digital data, Since it is incorporated in a single semiconductor chip, it is possible to realize a data input device having a simple structure for taking in a signal taken in from a vehicle sensor in a state in which it can be processed by a CPU.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration of a vehicle-mounted data input device according to the present invention.

FIG. 2 is a filter arithmetic circuit 30 in the apparatus shown in FIG.
It is a circuit diagram which shows one structural example.

FIG. 3 is a circuit diagram showing an example of an overflow processing circuit used in the circuit shown in FIG.

4 is a circuit diagram showing an example of an entire circuit of the semiconductor chip 100 shown in FIG.

[Explanation of symbols]

 10 ... A / D converter 20 ... Timer circuit 30 ... Filter operation circuit 31-34, 32a ... Selector 35 ... Operation module 36, 37 ... Selector 38, 39 ... Register 40 ... Operation part 41 ... Overflow processing circuit 42 ... Register 43 ... Sampling control circuit 44 ... Register 45 ... I / O unit 100 ... Semiconductor chip 200 ... CPU

Claims (3)

[Claims] 1. A vehicle-mounted data input device for capturing a signal from a sensor mounted on a vehicle into a CPU for vehicle control, the converter converting an analog signal or a pulse signal from the sensor into digital data. And for the digital data obtained by the converter,
An in-vehicle data input device comprising: a filter arithmetic circuit for performing a predetermined specific filter arithmetic; and a filter arithmetic circuit incorporated in a single semiconductor chip. 2. The on-vehicle data input device according to claim 1, wherein the filter arithmetic circuit includes an arithmetic module that performs addition or multiplication, and a first selector that applies first input data to the arithmetic module. A second selector for providing second input data to the arithmetic module, a first register for temporarily holding a first multiplication result by the arithmetic module, and a second multiplication result for the arithmetic module And a second register for holding the first register, the first selector selects the first filter constant α, and the second selector selects the digital data X obtained based on the sensor. To the first register, and as a result, the first multiplication is performed, and the result is held in the first register. The second filter constant β is calculated by the second selector as the previous filter calculation result Y.
Each is selected and given to the arithmetic module as input data to perform a second multiplication, and the result βY is held in the second register, and the data αX in the first register is stored by the first selector, The data βY in the second register is selected by the second selector, given to the arithmetic module as input data, added, and the result can be output as the current filter arithmetic result. An in-vehicle data input device, characterized in that each selector is configured to perform a selection operation. 3. The on-vehicle data input device according to claim 2, wherein the digital data X obtained based on a sensor.
However, when the number of processing bits of the filter arithmetic circuit overflows, an overflow processing circuit that supplies, to the first selector, data indicating the maximum value within the range of the number of processing bits instead of the digital data X, An in-vehicle data input device further provided.