JPH06242177A - Test device for semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the damage of a semiconductor device and to improve working ability and reliability when it is tested. CONSTITUTION:A semiconductor device testing device has the first and the second electrode 11, 12 having semiconductor device mounting faces 11a and 12a; an electrode holder 13 which is arranged below the first and the second electrode 11, 12 and has contact points 13a, 13b to come into contact with the second electrode from an upper side, and moreover holds the first and the second electrode 11, 12 in a mutually insulated state; a lower conductor 14 which is arranged below the electrode holder 13 and has contact points 14a, 14b to come into contact with the first electrode 11 from an upper side; plural sets of contact probe pins to come into contact with the surface of the semiconductor device 5, the contact points 13a, 13b of the electrode holder 13 and the contact points 14a, 14b of the lower conductor 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device testing apparatus used in a process of inspecting electrical characteristics such as conductivity of a semiconductor device being assembled.

[0002]

2. Description of the Related Art FIG. 6 shows an example of a conventional semiconductor device test apparatus, and FIG. 7 shows a part of a contact jig of the test apparatus.
a and 2b are tester 1 and contact jigs 3a and 3b
And a connection cable 4 for connecting the metal tray 4 and the tester 1 to each other by the connection cable 2c. This is a crocodile clip that fixes the end portion to the metal tray 4.

Reference numeral 7 indicates contact jigs 3a and 3
Contact probe pins respectively attached to the tip of b, 8 are contact pins that come into direct contact with the measurement point of the semiconductor device 5, and reference numeral 9 is a compression spring built in the sleeve 10. Further, FIG. 8 shows a broken semiconductor device 5, and reference numerals 5a and 5b are cells incorporated in the semiconductor device 5, and a common electrode is provided on the back surface of the semiconductor device 5.

Next, the test procedure of the semiconductor device 5 will be described. After the semiconductor wafer in which the circuit elements are incorporated is diced, it is divided into individual semiconductor devices 5 on the break sheet, and then the respective electric devices are electrically connected. The next inspection process is performed to classify objects with similar physical characteristics. In the inspection process, after the semiconductor device 5 waiting for inspection is transferred from the break sheet to the metal tray 4 by vacuum tweezers or the like and the semiconductor device 5 that has been inspected is transferred, the connection cable 2c from the tester 1 is passed through the alligator clip 6 By connecting to the metal tray 4, the tester 1 and the common electrode on the back surface of the semiconductor device 5 are connected.

Similarly, the tester 1 and the connection cable 2a,
By pressing the contact jigs 3a and 3b, which are connected by 2b and in which the contact probe pins 7 are incorporated into the tips, to the measurement points of the semiconductor device 5, the compression springs 9 in the contact probe pins 7 are bent and the appropriate contact pressure is applied. Is added to the contact pin 8 to form a specific test measuring circuit for testing, for example, the conductivity of the semiconductor device 5.

Then, a start signal is sent to the tester 1 side by a foot switch (not shown) under the inspection workbench, and the inspection by the tester 1 is carried out. The inspection result is displayed on the display unit (not shown) on the front panel of the tester 1, and the defective product is classified by the operator. Further, as shown in FIG. 8, when one semiconductor device 5 has a plurality of measurement points, the same inspection is repeated while sequentially shifting the measurement points of the contact jigs 3a and 3b.

[0007]

Since the conventional semiconductor device test apparatus is constructed as described above, when one semiconductor device 5 has a plurality of measurement points as shown in FIG. Since it is necessary to sequentially shift the measurement points of the contact jigs 3a and 3b, the workability is extremely poor, and only the measurement in units of cells of a single semiconductor device different from the actual use state can be performed.
There is a problem in that it is difficult to obtain correlation during electrical operation of all cells, that is, electrical characteristics of one semiconductor device, and it is difficult to perform accurate classification.

Debris generated at the time of breakage may adhere to the back side of the semiconductor device 5. When a measurement load is applied to the measurement point from above by the contact probe pin 7 at this time, the debris causes the semiconductor device. There was also a problem such as damage to No. 5.

The present invention has been made to solve the above problems, and improves reliability and workability during a semiconductor device test and prevents damage to the semiconductor device during a semiconductor device test. It is an object of the present invention to provide a semiconductor device test apparatus that enables the above.

[0010]

According to a first aspect of the present invention, there is provided a semiconductor device test apparatus comprising: a first electrode and a second electrode having a semiconductor device mounting surface for mounting a semiconductor device; An electrode holder disposed below the first electrode and the second electrode, having a contact point for contacting the second electrode, and holding the first electrode and the second electrode in an insulated state; A lower electrode unit disposed below the electrode holder and including a lower conductor having a contact point for contacting the first electrode; and a lower electrode unit disposed above the first electrode and the second electrode. A plurality of sets of contact probe pins for contacting the surface of the device, the contact points of the electrode holder and the contact points of the lower conductor from above It is obtained by a down tact unit.

A semiconductor device test apparatus according to a second aspect of the present invention is the semiconductor device test apparatus according to the first aspect, wherein the semiconductor device mounting surface of the first electrode and the second electrode is a truncated pyramid. The shape is formed at predetermined intervals.

According to a third aspect of the present invention, there is provided a semiconductor device test apparatus in which a test tray for mounting a plurality of lower electrode units at predetermined intervals and a contact between the lower electrode unit on the test tray. And a test tray transfer module for horizontally moving to the position of the unit.

[0013]

In the semiconductor device test apparatus according to the first aspect of the present invention, the contact probe pin checks the continuity between the measurement points on the front surface of the semiconductor device and the common electrode on the rear surface. At this time, the surface of the semiconductor device is formed by directly contacting the contact probe pin with the measurement point of the semiconductor device. On the other hand, the back surface of the semiconductor device is formed by contacting the contact point of the lower conductor connected to the first electrode and the contact point provided on the electrode holder from above with a contact probe pin. Then, if the continuity check of the front surface and the back surface of the semiconductor device is normal, then the actual measurement of the semiconductor device is performed.

According to a second aspect of the present invention, there is provided a semiconductor device test apparatus comprising: a first electrode and a second electrode.
The waste generated during the break of the semiconductor device enters the gap between the electrodes on the semiconductor device mounting surface, so that the first electrode and the second electrode
Break scraps are prevented from being sandwiched between the semiconductor device mounting surface of the electrode and the semiconductor device, and damage to the semiconductor device due to the break scraps is prevented.

In the semiconductor device test apparatus according to the third aspect of the present invention, the semiconductor device mounted on the semiconductor device mounting surface of each lower electrode unit is held on the semiconductor device mounting surface. In this state, the test tray transport module horizontally moves to the position of the contact unit, and if the conduction check of the front surface and the back surface of the semiconductor device is normal there, then the actual measurement of the semiconductor device is performed.

[0016]

【Example】

Example 1. 1 to 4 show an embodiment of a semiconductor device test apparatus according to claims 1 and 2 of the present invention, in which reference numeral 11 denotes a semiconductor device mounting surface 11a.
Are first electrodes formed in a truncated pyramid shape at predetermined intervals, 1
2 is a second electrode in which the semiconductor device mounting surfaces 12a are also formed in a truncated pyramid shape at predetermined intervals and are arranged in an L shape on the side portion of the first electrode 11, and 13 is the first electrode 11 and the second electrode.
The electrode holder is installed below the electrode 12 and holds the first electrode 11 and the second electrode 12. The electrode holder 13 is provided with contact points 13a and 13b protruding right above.

Reference numeral 14 is a lower conductor installed below the electrode holder 13, and both ends of the lower conductor 14 have contact points 14a and 14b projecting directly outside the electrode holder 13. is doing. Also, reference numeral 1
5, the tip of the first electrode 1 is connected to the electrode holder 13.
1 is a pipe for vacuum suction for vacuuming the semiconductor device 5 mounted on the semiconductor device mounting surface 11a of No. 1 and the semiconductor device mounting surface 12a of the second electrode 12 for vacuum suction to the semiconductor device mounting surface 11a side.

The semiconductor device mounting surfaces 11a and 12a of the first electrode 11 and the second electrode 12 and the upper end surface of the electrode holder 13 are formed in the same plane so that the semiconductor device 5 can be placed in electrical contact therewith. ing. Reference numeral 16 is a first insulating sheet that insulates each side surface of the first electrode 11 from the electrode holder 13,
Reference numeral 7 is a second insulating sheet that insulates the bottom surface of the first electrode 11 from the electrode holder 13, and 18 is the electrode holder 13 and the lower conductor 1.
An insulating ring that insulates the first electrode 11 and the lower conductor 14 from each other is provided. The bolt hole 13d formed in the electrode holder 13 is formed in a slightly larger size so that the conductor fastening bolt 19 does not come into contact with the electrode holder 13.

Therefore, the first electrode 11 and the lower conductor 14 installed in the recess 13c of the electrode holder 13 are in conduction, and the second electrode 12 and the electrode holder 13 are in conduction. On the other hand, the first electrode 11 and the second electrode 12 are insulated, the first electrode 11 and the electrode holder 13 are insulated, and the second electrode 12 and the lower conductor 14 are electrically insulated. is there. The first electrode 11, the second electrode 12, the electrode holder 13 and the lower conductor 14 form a lower electrode unit 27.

Reference numerals 20, 21, 22, and 23 are contact probe pins for measuring the semiconductor device 5, and an internal compression spring (not shown) is contracted to contact the contact point in a pressurized state at the time of pressing. Is configured. 24 is this contact probe pin 20, 2
A contact unit having a drive mechanism (not shown) that holds 1, 22, and 23 up and down, and 25 is a contact pin 2 of the contact probe pins 20, 21, 22, and 23.
Testers 0a, 21a, 22a and 23a (not shown)
Reference numeral 26 is a connection cable for connecting to the electrode holder, and 26 is packing for preventing air from leaking from the connection portion of the vacuum suction pipe 15 connected to the electrode holder 13.

Next, a test procedure of the semiconductor device 5 by the semiconductor device test apparatus having the above-described structure will be described. At the mounting position of the semiconductor device 5, the first electrode 11 and the second electrode 11
The semiconductor device 5 is placed on the semiconductor device mounting surfaces 11a and 12a of the electrode 12 so as to extend over both mounting surfaces, and while the semiconductor device 5 is vacuum-sucked by the vacuum suction pipe 15, the alignment claws (front and rear, left and right) are omitted. ) To position.

At this time, the semiconductor device 5 is not set at a predetermined position on the semiconductor device mounting surfaces 11a and 12a by sandwiching it, but is set at a predetermined position in a state of being vacuum sucked by the vacuum suction pipe 15. Therefore, it is easy to set the semiconductor device 5. Further, even if the size of the semiconductor device 5 is changed, it can be dealt with by setting the corners A (see FIG. 2) of the semiconductor device mounting surface 11a of the first electrode 11 as a reference,
Workability is significantly improved.

When the positioning of the semiconductor device 5 is completed, the contact unit 24 is lowered on the track by a driving mechanism (not shown) in a state where the semiconductor device 5 is vacuum-adsorbed so as not to move, and the contact probe pins 20 and 21 come into contact with each other. The measurement points on the surface of the semiconductor device 5 are contacted by the pins 20a and 21a. At this time, the tester, the connection cable 25, the contact pin 20a of the contact probe pin 20, the semiconductor device 5, the contact probe pin 21.
Measuring circuit for specific inspection is formed by the contact pin 21a and the connecting cable 25, and the contact pin 2 is checked by conducting a continuity check between the measuring points on the surface of the semiconductor device 5.
It is determined whether 0a and 20b are normally in contact with the measurement point.

Further, the contact probe pins 20 and 2
It is possible to simultaneously check the continuity of a plurality of measurement points by providing a plurality of sets, one for each one. Next, in order to check whether the common electrode on the back surface of the semiconductor device 5 is normally in contact with the first electrode 11 and the second electrode 12, the contact pins 22a and 23a of the contact probe pins 22 and 23 are Is contacted with the contact point 13a of the electrode holder 13 and the contact point 14a of the lower conductor 14 from above to conduct a continuity check.

At this time, the back surface of the semiconductor device 5 is the semiconductor device mounting surfaces 11a and 1 of the first electrode 11 and the second electrode 12, respectively.
The tester, the connecting cable 25, and the contact pin 22 of the contact probe pin 22 if they are in electrical contact with the 2a.
a, contact point 13a of electrode holder 13, electrode holder 13, second electrode 12, common electrode of semiconductor device 5, first electrode 11, conductor fastening bolt 19, lower conductor 1
4, the contact point 14a of the lower conductor 14, the contact pin 23a of the contact probe pin 23, and the connection cable 25 form a measurement circuit for specific inspection. Therefore, it is determined whether or not the common electrode formed on the back surface of the semiconductor device 5 is normally in contact with the first electrode 11 and the second electrode 12 by performing a continuity check between the contact points 13a and 13b. It Next, the front surface of the semiconductor device 5 is normally contacted with the contact points 13a, 14a, and the back surface thereof is the first electrode 11,
If the second electrode 12 is normally contacted, the actual measurement of the semiconductor device 5 is started, a test signal is input from the tester via the contact probe pin, and the electrical characteristics of the semiconductor device 5 are measured. Although the contact points 13a and 14a have been described as the circuit for the test signal, when the capacity of the test signal is large, the contact point 13b of the electrode holder 13 and the contact point 14b of the lower conductor 14 are simultaneously contacted. It can be dealt with.

Example 2. FIG. 5 shows an embodiment of a semiconductor device test apparatus according to claim 3 of the present invention. In the figure, the same parts as those of the first embodiment and the corresponding parts are designated by the same reference numerals, and their description will be given. Is omitted. 28 is the first
This is a test tray on which a plurality of lower electrode units 27 configured by the electrode 11, the second electrode 12, the electrode holder 13, and the lower conductor 14 are mounted at predetermined intervals.

Next, a test procedure for the semiconductor device 5 by the semiconductor device test apparatus will be described. At the mounting position of the semiconductor device 5, the semiconductor device 5 is placed on each lower electrode unit 27 on the test tray 28 in the same manner as the operation of the first embodiment. At this time, the vacuum suction pipes 15 of each lower electrode unit 27 can be operated individually.

Next, a contact unit in which the first lower electrode unit 27 is provided on the track of the test tray transfer module (not shown) in a state where each semiconductor device 5 is vacuum-sucked on the mounting surfaces 11a and 12a of the semiconductor device. The test tray transfer module horizontally moves to a position 24 (see FIG. 1). Next, the contact unit 24 is lowered, and the contact states of the front surface and the back surface of the semiconductor device 5 are determined in the same manner as the contact method of the first embodiment. If the contact is normal, the electrical characteristics of the semiconductor device 5 are checked. Make an actual measurement.

When the measurement is completed, the contact unit 2
4, the test tray 28 is horizontally moved by a predetermined pitch, the contact unit 24 is lowered again to measure the adjacent semiconductor device 5, and the above operation is repeated. In addition,
These operations are automated.

[0030]

As described above, according to the semiconductor device test apparatus of the first aspect of the present invention, the first electrode having the semiconductor device mounting surface for mounting the semiconductor device waiting for inspection, and A lower electrode unit including a second electrode, an electrode holder that holds the first electrode and the second electrode in an insulated state, and a lower conductor that is in a conductive state with the first electrode, and the second electrode The electrode holder in the conductive state is provided with a contact point for contacting the second electrode, and the lower conductor is provided with a contact point for contacting the first electrode,
Not only the front surface of the semiconductor device but also the back surface of the semiconductor device can be easily checked by contacting the contact point with the contact probe pin from above.

Further, since a plurality of sets of contact probe pins for contacting the surface of the semiconductor device, the contact points of the electrode holder and the contact points of the lower conductor are provided, it is possible to simultaneously contact the measurement points at a plurality of locations, which improves workability. There is an effect that the electric characteristics can be improved and the electric characteristics can be measured during the operation of all cells of the semiconductor device. Further, even if the size of the semiconductor device is changed, there is an effect that it can be set by using the corner portion of the semiconductor device mounting surface as a reference.

According to the semiconductor device test apparatus of the second aspect, since the semiconductor device mounting surface of the first electrode and the second electrode is formed in a truncated pyramid shape, it occurs when the semiconductor device breaks. Scraps fall into the gaps on the mounting surface of the semiconductor device, and the probability of being caught between the mounting surface of the semiconductor device and the semiconductor device mounted on it is extremely low, greatly reducing product defects due to damage to the semiconductor device. There is an effect that can be. Further, since the semiconductor device mounting surfaces of the first electrode and the second electrode are formed in a truncated pyramid shape,
The current flowing through the back surface of the semiconductor device is dispersed during the test,
Since the amount of heat generated per location is reduced, there is also an effect that the temperature rise of the semiconductor device is made uniform.

According to the semiconductor device test apparatus of the third aspect of the present invention, the lower electrode unit on which the semiconductor device waiting for inspection is placed is sequentially moved to the position of the contact unit so that the semiconductor device becomes conductive. The check can be continuously performed, and the workability of the semiconductor device test is significantly improved.

[Brief description of drawings]

FIG. 1 is a longitudinal sectional view showing an embodiment of a semiconductor device test apparatus according to claims 1 and 2 of the present invention.

FIG. 2 is a partial perspective view of a test device for the semiconductor device shown in FIG.

3 is a partially exploded perspective view of the semiconductor device test apparatus shown in FIG. 1. FIG.

FIG. 4 is a schematic plan view of a lower electrode unit showing positions of contact points of an electrode holder and a lower conductor.

FIG. 5 is a perspective view showing an embodiment of a semiconductor device test apparatus according to claim 3 of the present invention.

FIG. 6 is a perspective view showing an example of a conventional semiconductor device test apparatus.

FIG. 7 is a cross-sectional view of a contact probe pin.

FIG. 8 is a perspective view showing an example of a semiconductor device.

[Explanation of symbols]

 5 semiconductor device 11 first electrode 12 second electrode 13 electrode holder 14 lower conductor 20 contact probe pin 21 contact probe pin 22 contact probe pin 23 contact probe pin 24 contact unit 13a contact point 13b contact point 14a contact point 14b contact point 27 bottom Electrode unit 28 Test tray 11a Semiconductor device mounting surface 12a Semiconductor device mounting surface

Claims (3)

[Claims] 1. A test device for a semiconductor device used in a step of inspecting an electrical characteristic of a semiconductor device having a common electrode on a back surface thereof, the first electrode having a semiconductor device mounting surface for mounting the semiconductor device, and Two electrodes and a contact point arranged below the first and second electrodes for contacting the second electrode, and in a state where the first electrode and the second electrode are insulated from each other. An electrode holder to hold,
A lower electrode unit disposed below the electrode holder, the lower electrode unit including a lower conductor having a contact point for contacting the first electrode; and a semiconductor electrode disposed above the first electrode and the second electrode. A test device for a semiconductor device, comprising: a contact unit having a plurality of sets of contact probe pins for contacting a surface of the device, a contact point of the electrode holder, and a contact point of the lower conductor from above. 2. The semiconductor device test apparatus according to claim 1, wherein the semiconductor device mounting surfaces of the first electrode and the second electrode are formed in a truncated pyramid shape at predetermined intervals. 3. A test tray for mounting a plurality of lower electrode units at predetermined intervals, and a test tray transfer module for horizontally moving the lower electrode unit on the test tray to the position of the contact unit. The semiconductor device test apparatus according to claim 1, wherein the test apparatus is a semiconductor device.