JPH06232892A - Synchronizing control system - Google Patents

Abstract

PURPOSE:To establish synchronism in a short time without generating phase difference absorbing fluctuation and to control the synchronism so as to main tain it even when a cell is abandoned or any excess cell is inserted later concern ing the synchronizing control system for switching the cells of duplexed systems with no hit. CONSTITUTION:A synchronizing control part 3 continuously reads the same user cell from a buffer 2 of the auxiliary system (hunting) and when the user cell freely read from a buffer 1 of the present system is compared with it by a cell coincidence comparator circuit 5 and coincidence is detected, the synchronism is established. When the coincidence is not detected, however, hunting and free reading is performed until the coincidence is detected. When one buffer is made empty after this synchronism establishment, the reading of the other buffer is stopped and the synchronism is maintained by waiting the other system until the user cell arrives at one system.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous control system, and more particularly to a synchronous control system for synchronizing so that cells of a duplex system can be switched without interruption.

In various communications, the transmission line and the transmission device have a dual structure to improve the reliability of the communication network. In the ATM (Asynchronous Transfer Mode) system, digital audio signals, digital image signals,
Various types of data, etc. are made into fixed-length packets and transmitted as cells, and when the active system and the standby system are duplicated, there is no loss or duplication of valid cells when switching. There is a demand for enabling non-instantaneous switching and redundant switching.

[0003]

2. Description of the Related Art In a duplex system, for example, as shown in FIG. 11, on a transmission side 31, a distribution unit 33 distributes transmission data to transmission units 34 and 35, and transmission units 34 and 3 are distributed.
5 sends data to the transmission lines 38 and 39, respectively.
On the receiving side 32, the receiving units 36 and 37 respectively receive, and the selector 41 selects one of the received data and outputs it. That is, as shown by the chain double-dashed line,
The transmitting unit 34, the transmission line 38, and the receiving unit 36 constitute an active system (0 system) as an active transmission system, and the transmitting unit 35, the transmission line 39, and the receiving unit 37 constitute a standby system (a standby transmission system). 1 system).

In such a duplex system, the AT
A cell according to the M method is transmitted from the transmission side 31 to the reception side 32, and is switched by the selector 41 of the standby system when a failure occurs in the active system.

In this case, as a method of switching without interruption, a switching trigger cell is inserted from the distribution unit 33 of the transmission side 31 from the center (not shown) side of the network and transmitted to both the standby system and the active system, Receiver 3 of receiver 32
A method is conceivable in which, when the switching trigger cells are simultaneously read from buffers 6 and 37 (not shown), it is determined that the cells of the active system and the standby system are synchronized, and the selector 41 is switched. In other words, this is a system in which the cell synchronization between the active system and the standby system is established when the selector 41 is controlled to switch between the active system and the standby system.

For the active and standby cells, the buffers (not shown) of the receiving units 36 and 37 are used to transmit the transmission path 3
It is also possible to absorb the transmission delay difference caused by 8, 39, etc., and keep it in a synchronized state all the time, and immediately switch the selector 41 to switch without interruption when switching to the standby system due to a failure in the active system.

[0007]

In the conventional synchronous control system using the switching trigger cell as described above, the receiving side 32
Since the selector 41 performs the switching when the switching trigger cells are simultaneously read from the buffers of the receiving units 36 and 37, it takes time until the switching trigger cells can be detected at the same time.

Further, since the switching operation is executed every time the switching trigger cells are simultaneously detected, an empty cell is output from the buffer of the system in which the switching trigger cell has arrived first, whereas the switching trigger cell is later output. The valid cells are continuously output from the buffer of the arriving system, and there is a problem that the phase difference absorption fluctuation occurs every time switching is performed between these two systems, and the density difference of the valid cells occurs. is there.

Further, in the system in which the buffers of the receivers 36 and 37 always keep the synchronization state and the selector 41 performs the non-instantaneous interruption switching, even if the synchronization is once established, the cells are discarded or extra cells are inserted after that. If the selector 41 is controlled immediately when the active system is switched to the standby system, there is a defect that cell loss or duplication occurs.

Therefore, according to the present invention, a method of establishing synchronization in a short time without causing phase difference absorption fluctuation and controlling so that the synchronization can be maintained even if cell discard or extra cell insertion is performed thereafter. The purpose is to provide.

[0011]

In order to achieve the above object, the synchronous control system according to the present invention is configured such that, as shown in FIG. 1 (1), the active cells of the duplex system are input and the active cells of the standby system are input. First-in first-out (FIFO) memory buffers 1 and 2 that perform phase difference absorption and a synchronization control unit 3 that controls the buffers 1 and 2, and the synchronization control unit 3 operates the buffers 1 and 2. It is premised on a synchronous control method in which the valid cell is read synchronously from the above and is given to the selector 4, and the selector 4 switches the working system and the standby system without interruption.

A cell coincidence comparison circuit 5 is provided in the preceding stage of the selector 4, and the synchronization control unit 3 causes the same user cell to be continuously read from the buffer of the spare system and the user who freely reads from the buffer of the active system. The cells are compared with each other by the cell coincidence comparison circuit 5, and when a cell that does not match up to a predetermined threshold value is not found, this time, conversely, the same user cell is continuously read from the active buffer, and the standby buffer is read out. The cell match comparison circuit 5 compares the user cell freely read from the cell, and the comparison operation is alternately switched until a matching cell is found. If a matching cell is found, it is assumed that the synchronization is established. After that, the synchronization control unit 3 further activates the buffer of the standby system or the active system when the valid cell can be read from the buffer of the active system or the standby system. If there is no active cell, the reading of the buffer of the active system or the standby system is stopped, empty cells are sent from the active system and the standby system, and when a valid cell is input to the buffer of the standby system or the active system, The present invention is characterized in that the valid cells are read from the buffers of the active system and the standby system in synchronization with each other to maintain synchronization.

Further, according to the present invention, when the predetermined number of cells do not continuously match in the synchronous reading after the synchronization is established, the synchronization control unit 3 causes the same user cell to be continuously read again in the buffer which has continuously read the same user cell. A read operation can be executed.

Further, in the present invention, the cell coincidence comparison circuit 5
However, a certain number of stages of backward protection may be set to perform continuous coincidence comparison of cells.

Further, in the present invention, when the cell match cannot be detected in the continuous match comparison, the continuous match comparison can be repeated.

Further, in the present invention, the cell coincidence comparison circuit 5
However, it is preferable to reduce the number of bits for cell match comparison, and the reduced number of bits for cell match comparison may be used for the decision by majority logic.

Further, in the present invention, the synchronization control unit 3 inserts a dummy cell into the position of the discarded valid cell when the valid cell of the first or standby system is discarded, and inputs the dummy cell into the buffer as a valid cell. You may.

[0018]

The synchronous control system according to the present invention shown in FIG. 1 (1) will be described with reference to the flow chart conceptually shown in FIG. 2 (2). First, one system of the duplex configuration is used as an active system. , The other system is the standby system, and the fluctuation of the active system adversely affects the traffic, while the fluctuation of the standby system does not affect the entire traffic, so the same buffer 2 from the standby system is used. The cells are continuously read to establish synchronization.

For this reason, first, the same user cell is read from the spare buffer 2 (step T1), sent to the cell coincidence comparison circuit 5, and freely read from the active buffer 1, and these buffers are read. The user cells from 1 and 2 are compared by the cell coincidence comparison circuit 5, and the coincidence comparison of the user cells of both systems is performed (step T2).

It should be noted that it is necessary to avoid missing the corresponding cell in this coincidence comparison because it causes fluctuation, and it is possible to reduce the probability of missing the corresponding cell by reducing the number of comparison bits. Further, by adopting the majority logic in which the same cell is determined if the majority of the compared bits are the same, the probability of missing the corresponding cell due to a bit error can be reduced.

As a result of coincidence comparison of the user cells of both systems, when it is found that they coincide with each other, the cells after the coincident user cell are protected backward by a predetermined number of steps (step T3), and the backward protection is performed. When the coincidence of the user cell is detected also by the above, it is determined that the synchronization is established (step T4).

On the other hand, when the coincidence cannot be detected in step T2, it is expected that the phase of the active system is earlier than that of the standby system, so that the same user cell is read from the active buffer 1 this time ( In step T5), the cell coincidence comparison circuit 5 is sent and free reading is performed from the spare system buffer 2. The user cells from these buffers 1 and 2 are compared in the cell coincidence comparison circuit 5, and the user cells of both systems are compared. Is compared (step T6).

When it is found as a result of the matching comparison, the cells after the matched user cell are back-protected by a predetermined number of steps (step T7), and the user cell is also protected by this back-protection. When the coincidence is detected, it is determined that the synchronization is established (step T4).

However, when the coincidence cannot be detected in step T6, the process returns to step T1 to execute the reading of the same user cell from the spare system buffer 2, and the comparison operation is preferably performed until a coincident cell is found. Switching will be performed alternately only the number of times.

After the synchronization thus obtained is established, the synchronization controller 3 performs the synchronous reading from the buffers 1 and 2.
However, when a predetermined number of cells do not continuously match in the synchronous reading after the synchronization is established, the synchronization control unit 3 causes the buffer that has continuously read the same user cell to execute the continuous reading operation of the same cell again. If so, the phase difference can be gradually absorbed.

The above-mentioned synchronous reading will be described with reference to the flow chart of FIG. 2. The synchronous control unit 3 determines whether or not the buffers 1 and 2 of the active system and the standby system are empty, and capacity information from the buffers 1 and 2. A determination is made based on (the number of accumulated valid cells) (steps T11 and T12). And both buffers 1,
When 2 is not empty, that is, when valid cells are accumulated, valid cells of both systems are read synchronously (step T13).

When the active buffer 1 is free due to transmission delay or the like, the reading of the standby buffer 2 is stopped (step T14), and an empty cell is sent from the standby buffer 2 (step T15). If the buffer 1 is not empty but the buffer 2 is empty, the reading of the buffer 1 is stopped (step T16), and an empty cell is sent from the buffer 1 (step T17).

As described above, when there is no user cell in one buffer due to transmission delay or the like, if the user cell is read from the other buffer, the user cells of both systems are displaced, so that the synchronization controller 3 Since the user cell of the buffer 1 and the user cell of the buffer 2 are read in synchronization with each other, once the synchronization is established, the synchronization state is maintained even if there are variations such as transmission delay, and the system selection control signal Thus, the selector 4 is controlled to enable non-instantaneous interruption switching when switching between the active system and the standby system.

Further, at the time of synchronous reading after the establishment of synchronization,
The cell may be discarded due to a bit error in the cell header, and the discarded cell is an empty cell.
It will not be stored in the buffer. Therefore, when cell discard occurs, even if the user cells are read out of the buffers 1 and 2 in synchronization, only cells having different contents are read out at the same time, resulting in a state different from the actual synchronization state.

Therefore, in the present invention, a dummy cell is further inserted instead of the discarded cell, and this dummy cell is input to the buffer as a user cell. As a result, the user cells after the dummy cell have the same contents, and the actual synchronization state can be maintained.

[0031]

3 to 6 show an embodiment of a synchronous control system according to the present invention. Among them, in the flow chart of FIG. 3 and the time chart of FIG. 4, the phase of the spare system is the active system. 5 shows the synchronization establishment mode when it is assumed that it is earlier than the phase, and the flowchart of FIG. 5 and the time chart of FIG. 6 both show the synchronization establishment mode when it is assumed that the phase of the active system is earlier than the phase of the standby system. ing.

As described above, when one system of the duplex configuration is used as the working system, the other system is the standby system,
Fluctuations in the active system adversely affect traffic, while fluctuations in the standby system do not affect the overall traffic. Therefore, synchronization is established by continuously reading the same cell from the buffer 2 in the standby system. There is a need.

Therefore, first, in FIG. 3, it is assumed that the backup system is early (step S1), and the parameter i is initialized to 0 (step S2).

Then, it is judged whether or not the parameter i has reached the set value a (step S3), and when it has not reached the set value a, the hunting operation of reading the same user cell from the buffer 2 of the standby system is first performed (step S4). .

This state is shown in FIG. 4. After the user cells A, B, and C are sequentially read from the buffer 2 of the standby system, hunting is started from the time when the user cell D is read. , The same user cell D is continuously read from the buffer 2 and sent to the cell coincidence comparison circuit 5.

At the time of step S4, free reading is performed from the active buffer 1, and these buffers 1 and 2 are read.
The user cells from are compared in the cell match comparison circuit 5,
The coincidence comparison of the user cells of both systems is performed as shown in FIG. 4 (step S5). It should be noted that it is necessary to avoid missing the corresponding cell in this coincidence comparison because it causes fluctuation, and it is possible to reduce the probability of missing the corresponding cell by reducing the number of comparison bits. Further, by adopting the majority logic that if the majority of the compared bits are the same, it is judged as the same cell, the re-hunting probability (probability of missing the corresponding cell) due to a bit error becomes very small. .

As a result of the match comparison in step S5, for example, as shown in FIG. 4, since there is no match during the constant number of cells after the user cell D is hunted, the number of such mismatch cells is predetermined. If it continues to exceed the threshold value of, the parameter i is incremented through step S6 (step S7), and as shown in steps S8 and S9, the spare system buffer 2 is freely read and the buffer 2 is emptied. Returning to S3, it is determined again whether or not the parameter i has reached the set value a, and when it has not reached this set value a, the same steps as above are executed.

When the set value a is reached, the phase of the active system is expected to be earlier than that of the standby system (step S15). Therefore, the process moves from the flowchart of FIG. 3 to the flowchart of FIG. The operation of the flow will be performed by reversing the standby system and the active system. In the flowchart of FIG. 5, “20” is added to each step of the flowchart of FIG.
It corresponds to the one that added.

In this way, the search process for establishing synchronization shown in FIGS. 5 and 6 is executed assuming that the phase of the active system is earlier, but the comparison operation is performed in the cases shown in FIGS. When a matching cell is not found, the search process of FIG. 3 in which the phase of the spare system is earlier is executed again, and switching is alternately performed until such a matching cell is found, and the matching cell is found in step S5 or S25. When found, it is assumed that synchronization has been established in principle.

However, even when a matching cell is found, it is preferable to execute the following steps.

That is, when cell coincidence is detected (steps S5 and S25), synchronous reading is performed from both buffers 1 and 2 (steps S10 and S30), but as shown in FIGS. It may happen that the same user cell D read by hunting coincides with the user cell A freely read from the active buffer 1, so after that, for example, whether or not a fixed number K of cells are continuously mismatched is determined. First, determination (steps S11, S3
1).

Then, as shown in FIGS. 4 and 6, when continuous disagreement is detected due to erroneous coincidence detection of the user cells D and A, the parameter i is initialized (steps S12 and S32), and step S3. Returning to S23, the user cell hunting is performed again (steps S4 and S2).
4). This indicates that the user cell I is hunted in the spare buffer 2 in the example of FIG. 4, and the user cell I is hunted in the active buffer 1 in the case of FIG.
Indicates hunting.

As a result of reading the same cell from the time when the user cell I is hunted in this way, step S
5 and S25, when the user cell I is detected as coincident as shown in FIGS. 4 and 6, when the synchronous reading (steps S10 and S30) is performed thereafter, the cell disagreement becomes K.
If the cells do not continue, it is further determined whether or not a predetermined number M of cells continuously match (steps S13 and S33).
As shown in FIGS. 4 and 6, it is assumed that the synchronization is established at the time of the user cell Q (steps S14 and S34), and the synchronization establishment flag is turned on.

7 and 8 are time charts showing operation examples for maintaining synchronization from the synchronization established state obtained in the embodiments of FIGS. 3 to 6 in the synchronization control system according to the present invention. In the figure, 1 and 2 are buffers (FIFOs) of the active system and the standby system respectively corresponding to the active system and the standby system shown in FIG. 1, Y, Z, A, B, C, ... Are user cells. , Dotted lines indicate empty cells.

The state shown in (A1) of FIG. 7 shows a state in which the synchronization is established. After the synchronization is established in this way, as shown in (A2), for example, a user of the standby system is set for some reason. If the cells D, E, F, G are delayed from the active system and the buffer 2 of the standby system becomes empty, the reading of the buffer 1 of the active system is stopped and the empty cells are sent to both systems. Therefore, the user cells D, E, and F are stored in the active buffer 1.

Next, as shown in (A3), when the standby user cell D is accumulated in the buffer 2, the read suspension is released, and the user cell D is synchronized as shown in (A4). Read out. Therefore, the synchronization is maintained even in the state of (A5).

In the same manner as described above, (A6) and (A6) in FIG.
In 9), since the buffer 2 of the backup system becomes empty, the reading of the buffer 1 of the active system is stopped, and when a user cell is input to the buffer 2 of the backup system, the buffers 1 and 2 of both systems are read. And keep it in sync.

FIG. 9 is an explanatory diagram when a problem of cell discard occurs in the above-described operation embodiment of the present invention, (B1).
As shown in FIG. 5, for example, the case where the standby user cell G is discarded is shown. Therefore, as shown in (B2), the user cell F
Is stored and the user cell F is read out synchronously as shown in (B3), and then the user cell G is stored at the head of the buffer 1 of the active system. Since the user cell G is not input to the buffer 2, when the buffer 2 becomes empty, the reading of the buffer 1 in the active system is stopped, so that the synchronization control unit 3 sets an empty cell in both systems as shown in (B4). Will be sent.

Next, as shown in (B5), when the user cell H is accumulated in the spare buffer 2, the active buffer 1 to the user cell G, as shown in (B6).
User cells H are simultaneously read out from the buffer 2 of the standby system and transmitted, resulting in a state of out of phase synchronization.
This state will continue after (B7). That is,
If the cell discard does not occur, the synchronization can be maintained by the above-described embodiment, but if the cell discard occurs, the state becomes out of phase synchronization.

Therefore, in the present invention, as shown in FIG. 10, the cell X is used as a dummy cell instead of the discarded cell G, and this is input to the buffer as a user cell. That is, when the user cell G is discarded as shown in (B1) and (B2) of FIG. 9, in this embodiment, the discarded user cell G is replaced with the dummy cell X as shown in (C1) of FIG. And For example, if the cell header is discarded due to a bit error, the header is modified so that it can be treated as a user cell.

After the user cell F, the dummy cell X is input to the buffer 2 of the backup system as shown in (C2), and the user cell G is placed at the beginning of the buffer 1 and the beginning of the buffer 2 is placed as shown in (C3). Then, the dummy cell X is stored in the dummy cell X, the user cell G and the dummy cell X are simultaneously read as shown in (C4), and then (C5).
As shown in FIG.
Is stored, the phase synchronization is maintained thereafter as shown in (C6) and (C7).

It should be noted that the present invention is not limited to the above-mentioned respective embodiments, but various additions and modifications can be made. The present invention is applied to a duplex system for packetizing and transmitting data, and switching without interruption is possible. Can be possible.

[0053]

As described above, in the synchronous control system according to the present invention, the synchronous control unit continuously reads the same user cell from the buffer of the spare system and freely reads from the buffer of the active system. When no matching cell is found by comparing with the cell match comparison circuit, this time, conversely, the same user cell is continuously read from the buffer of the active system and the user cell freely read from the buffer of the standby system. The cells are compared in the cell match comparison circuit, and the comparison operation is alternately switched until a matching cell is found. If a matching cell is found, it is assumed that synchronization has been obtained. When the buffer of the other system becomes empty, the reading of the buffer of the other system is stopped, and the user cell of the other system is stopped until the user cell arrives at the one system. Since it is configured to maintain synchronization by making it wait, it is possible to eliminate the phase difference absorption fluctuation when switching between the active system and the standby system, and it is possible to switch without interruption at any time after synchronization is established. The time until switching can be shortened.

Further, even if a cell in one system becomes insufficient due to a header error or the like, it is possible to maintain synchronization by inserting a dummy cell instead of the dummy cell and inputting the dummy cell into the buffer as a user cell.

[Brief description of drawings]

FIG. 1 is a diagram showing a principle of a synchronous control system according to the present invention.

FIG. 2 is a flowchart for conceptually explaining a synchronization maintaining process in the synchronization control method according to the present invention.

FIG. 3 is a flow chart showing a process of establishing synchronization (when the phase of the standby system is earlier than that of the active system) in the synchronization control system according to the present invention.

FIG. 4 is an operation time chart showing a process of establishing synchronization (when the standby system has an earlier phase than the active system) in the synchronization control system according to the present invention.

FIG. 5 is a flow chart diagram showing a process of establishing synchronization in the synchronization control system according to the present invention (when the phase of the active system is earlier than that of the standby system).

FIG. 6 is an operation time chart showing a process of establishing synchronization (when the phase of the active system is earlier than that of the standby system) of the synchronization control system according to the present invention.

FIG. 7 is a time chart diagram of an operation example (maintaining synchronization) of the synchronization control method according to the present invention.

FIG. 8 is a time chart diagram of an operation example (maintaining synchronization) of the synchronization control method according to the present invention.

FIG. 9 is a time chart diagram for explaining a problem of cell discard in the operation example of the synchronous control method according to the present invention.

FIG. 10 is a time chart diagram of an embodiment in which the problem of cell discard is solved by the synchronous control method according to the present invention.

FIG. 11 is a block diagram showing a conventional duplex system.

[Explanation of symbols]

 1 buffer for active system (FIFO) 2 buffer for standby system (FIFO) 3 synchronization control unit 4 selector 5 cell coincidence comparison circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroya Sakurai 1-2-25 Ichibancho, Aoba-ku, Sendai, Miyagi Prefecture Fujitsu Tohoku Digital Technology Co., Ltd. (72) Inventor Hiroshi Ota 1 Uchisaiwaicho, Chiyoda-ku, Tokyo 1-6 Nihon Telegraph and Telephone Corp. (72) Inventor Hiromi Ueda 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corp.

Claims (7)

[Claims] 1. A first-in system in which active cells of a current system and a standby system of a dual configuration are respectively input to perform phase difference absorption.
First-out memory buffers (1), (2) and a synchronization control unit (3) for controlling the buffers (1), (2), the synchronization control unit (3) is the buffer (1), The valid cell is read synchronously from (2) and given to the selector (4), and the selector (4)
In a synchronous control method for switching the active system and the standby system without interruption, a cell coincidence comparison circuit (5) is provided in front of the selector (4).
The synchronization control unit (3) continuously reads the same user cell from the buffer of the standby system, compares the user cell freely read from the buffer of the active system with the cell coincidence comparison circuit (5), and sets a predetermined threshold value. When no matching cell is found, the same user cell is continuously read from the active buffer, and the user cell freely read from the spare buffer and the cell match comparison circuit (5 )
Then, the comparison operation is alternately switched until a matching cell is found, and if a matching cell is found, it is assumed that synchronization has been established.After that, the synchronization control unit (3) further When the valid cell can be read from the buffer of the active system or the standby system, if there is no valid cell in the buffer of the standby system or the active system, the reading of the buffer of the active system or the standby system is stopped. , Sends empty cells from the active system and the standby system, and when a valid cell is input to the buffer of the standby system or the active system, synchronizes the active cells with the buffers of the active system and the standby system and keeps the synchronization. A synchronous control method characterized by: 2. The synchronization control unit (3), when a predetermined number of cells do not continuously match in the synchronous reading after the synchronization is established, the same user cell is continuously read again in the buffer that has continuously read the same user cell. The synchronous control system according to claim 1, wherein a read operation is executed. 3. The synchronous control system according to claim 1, wherein the cell coincidence comparison circuit (5) sets a predetermined number of stages of backward protection to perform continuous coincidence comparison of cells. 4. The synchronous control method according to claim 3, wherein when no cell match is detected in the continuous match comparison, the continuous match comparison is repeated. 5. The synchronization control system according to claim 1, wherein the cell coincidence comparison circuit (5) reduces the number of bits for cell coincidence comparison. 6. The synchronization control system according to claim 1, wherein the reduced number of bits of the cell coincidence comparison is used for the determination by majority logic. 7. The synchronization control unit (3) inserts a dummy cell at the position of the discarded valid cell when the active cell of the working system or the standby system is discarded, and inputs the dummy cell into the buffer as a valid cell. 6. The synchronous control method according to claim 1, wherein