JPH04369140A - Uninterruptible changeover system - Google Patents

Abstract

PURPOSE:To prevent a phase jump from almost being taken place in a real cell stream of a path and a channel by implementing delay control of an information string in service at and after changeover of a transmission line in the unit of a cell length for a prescribed long period. CONSTITUTION:A parallel transmission circuit 15 of a transmission line changeover means of a sender side equipment 13 sends a same information string as an information string of an active transmission line 11 to a standby transmission line 12. Thus, a transmission line changeover means of a receiver side equipment 14 uses delay insert/ removal circuits 17, 18 to insert/removal of a delay in the unit of cell length for a prescribed period with respect to each information string from the active transmission line 11 and the standby transmission line 12 respectively. Then a control circuit 20 makes a delay set to one delay insert/removal circuit coincident with a delay of an information string controlled and outputted in the unit of cell length for a prescribed period with respect to the active circuit 17 and the standby circuit 18. When the active and standby delay quantities are coincident, a changeover circuit 19 selects an output of the standby circuit 18 from an output of the circuit 17. As a result, a phase jump of a real cell stream in the time division multiplex digital transmission is minimized to the utmost.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention performs instantaneous switching from a working transmission line or working path for transmitting an information sequence in units of cells to a protection transmission line or protection path in time division multiplexing digital transmission. Relating to a no-interruption switching method. In addition, uninterrupted switching of transmission lines, paths, and channels is
This is performed for switching back after transmission line restoration, relocating and switching back sections that are a problem due to transmission line or node construction, switching and switching back transmission lines when the transmission quality of the transmission line deteriorates, and so on.

[0002]Although the following description will mainly discuss switching of transmission lines without interruption, the same explanation will apply to switching of paths or channels without interruption.

0003

2. Description of the Related Art FIG. 18 is a diagram showing an example of the configuration of a transmission line for switching without interruption. In the figure, the sending device 10
1 and the receiving side device 102 are arranged correspondingly via a working transmission line 103 and a protection transmission line 104. Receiving side device 1
02 transmission line changeover switch 105 switches from the working transmission line 103 with a large transmission delay to the backup transmission line 10 with a small transmission delay.
4 without momentary interruption, a delay insertion/extraction circuit 106 is required to temporarily store cells on the protection transmission line 104 side in order to absorb the difference in transmission delay during that time. In other words, when the transmission line changeover switch 105 performs instantaneous switching from the working transmission line 103 to the backup transmission line 104, by sequentially reading out the cells stored in the delay insertion/extraction circuit 106, both transmissions at the time of switching are performed. By matching transmission delay differences between channels, cell loss is avoided and cell arrival order is guaranteed.

[0004] A cell is a fixed length (53 bytes) packet having a header area and an information area, and there are real cells with valid information and empty cells (idle cells) without valid information. Furthermore, the real cell has a virtual channel (hereinafter referred to as “
VC”. ) and an identifier VCI (Virtual Channel Identifier) that identifies the virtual path (
Hereinafter referred to as "VP". ) has an identifier VPI (Virtual Path Identifier) in the header area and terminal-to-terminal information in the information area, OAM cells for switching control used for control within the network, and cells for fixing path capacity. There is an OAM cell for fixing the capacity.

[0005] The capacity fixing OAM cell is a cell that does not include terminal-to-terminal information in its information area, and although it is an empty cell, it is a cell that is distinguished from a normal empty cell for capacity control. Furthermore, the switching control OAM cell may or may not have inter-terminal information in its information area. The VCI indicates the destination to the other terminal, the actual cell flow of the same VCI indicates the channel,
A real cell stream to which the same VPI identifier is assigned to multiple channels indicates a path. A path is a distant node (device)
The same VPI or the route through which the actual cell flow of that VPI passes between networks or between network termination circuits (NTs) is defined. An OAM cell with a certain VPI identifier can traverse the same route as that VPI's path. The transmission path is constructed by multiplexing paths.

FIG. 19 is a diagram showing an example of the configuration of a real cell and an empty cell. (a) shows a real cell, and (b) shows an empty cell. In the figure, the header area of the real cell contains VP
A bit string indicating I, a bit string indicating VCI, a bit string indicating OAM, and a CRC bit string are inserted. A specific pattern of the VCI bit string may be used for OAM display. The switching control OAM cell and the capacity fixing OAM cell are identified by the bit pattern or the insertion position in the header. The CRC bit string is a bit string inserted into each cell so that the header area becomes a shortened cyclic code. Note that the receiving device can detect cell divisions by synchronizing cells using this CRC bit string.

[0007] On the transmission path, the information area of each cell is scrambled by a scrambling circuit, and in the equipment, the information area of real cells and empty cells may remain scrambled or may be descrambled and restored to the original signal. There may be cases where Furthermore, in addition to the empty cells arriving from the transmission path, there are empty cells generated within the device, and these are called non-signal cells. Note that this no-signal cell section is
This occurs when the number of cell phase clocks within the device is greater than the sum of real cells and empty cells on the transmission path within a unit time.

[0008] A cell flow on a transmission path is composed of real cells and empty cells. The cell flow within the device is composed of real cells, empty cells, and no-signal cells, but the cell flow for one path to be switched consists of real cells that have a VPI that identifies that path and other cell sections. (When focusing on that path, it is regarded as a no-signal cell section). When the real cell occupancy rate within a unit time is high, the cell flow rate (actual cells) of the transmission line or path increases, and when it is low, it decreases.

FIG. 20 is a diagram illustrating the time compression operation of the cell flow when switching the transmission path to the one with the smaller transmission delay. (a) shows the original cell flows of the two transmission lines represented by VCa and VCb arriving at the delay insertion/extraction circuit 106. FIG. Thick solid line arrows indicate real cells, and dashed line arrows indicate empty cells. (b) is the delay insertion/extraction circuit 10
6 shows a cell stream that has been subjected to time compression by removing empty cells in transmission delay sections from the original cell stream. That is, since only real cells are read out continuously after switching the transmission path, the cell flow increases at once, the average speed and the peak speed increase significantly, and a phase jump occurs in the real cell flow of the channel and path.

FIG. 21 is a diagram illustrating the time expansion operation of a cell stream when switching the transmission path to the one with the larger transmission delay. (a) shows the original cell flows of the two transmission lines represented by VCa and VCb arriving at the delay insertion/extraction circuit 106. FIG. Thick solid line arrows indicate real cells, and dashed line arrows indicate empty cells. (b) is the delay insertion/extraction circuit 10
6 shows a cell stream whose time has been expanded by adding empty cells in the transmission delay period to the original cell stream. Note that a phase jump of the transmission delay difference similarly occurs in the actual cell flow of the channel and path.

[0011]

[Problem to be Solved by the Invention] As described above, in the conventional uninterrupted switching system, when there is a transmission delay difference between the working transmission line (working path) and the protection transmission line (protection path), ,
A phase jump occurs in the flow of real cells in the path or channel after switching. This phase jump occurs at the receiving end of the channel or at the ATM/
In an STM conversion circuit, when converting to the original signal in synchronization with the average speed of the actual cell flow in a channel or path, momentary interruptions in the information stream may occur because the conversion circuit cannot follow the actual cell flow. was there. In particular, if the transmission delay difference is large, the phase jump will also be very large, and the influence will be large.

Furthermore, as shown in FIG.
When operating in synchronization with the network, if there are large delay variations within the network, a corresponding cell storage memory is required. Note that reference numeral 114 indicates an information string (cell stream) in which each cell is a unit.
It is. In other words, when reading out the actual cell flow stored in the memory using the network clock 113, phase jumps in the actual cell flow are not a problem; instead, a delay is added to the terminal-to-terminal signal in advance to account for delay fluctuations within the network. It is necessary to keep it. Therefore, there is a drawback that the amount of memory required to provide the delay increases and the delay time increases in normal times.

[0013] The present invention provides a working transmission line (
To provide a no-interruption switching method capable of minimizing phase jumps in an actual cell flow when performing instantaneous interruption-less switching of a transmission path between a working path) and a backup transmission path (protection path). The purpose is to

[0014]

[Means for Solving the Problem] The invention as set forth in claim 1 provides a transmitting side device and a receiving side device that are arranged opposite to each other via a working transmission path and a protection transmission path that transmit information strings in units of cells. In the non-interruption switching method in which a transmission line switching means provided in the transmitting side apparatus performs instantaneous interruption switching from a working transmission line to a backup transmission line, the transmission line switching means of the transmitting side apparatus switches the information string of the working transmission line. and parallel transmission means for sending the same information string to the protection transmission path, and the transmission path switching means of the receiving side device transmits the same information string to the protection transmission path for each information string arriving from the working transmission path and the protection transmission path. , a delay insertion/extraction means for performing delay insertion/extraction in units of cell length at a predetermined cycle, a delay insertion/extraction means on the active side, and a delay insertion/extraction means on the standby side, respectively.
Delay control means for controlling the delay amount set in at least one of the delay insertion/extraction means for each cell length at a predetermined cycle to match the delay amount of each output information string; The present invention is characterized by comprising a switching means for switching from the output of the delay insertion/extraction means on the active side to the output of the delay insertion/extraction means on the standby side at the time of coincidence.

The invention as set forth in claim 2 is the non-interruption switching system as set forth in claim 1, in which the transmission line switching means of the transmitting side device selects the same position of each information string of the working transmission line and the protection transmission line. includes means for inserting a specific cell to be subjected to switching control at a predetermined cycle, and the delay control means of the receiving side device is configured to control the arrival time of the specific cell at the output stage of the delay insertion/extraction means on the active side and the delay insertion/extraction on the protection side. It is characterized in that it includes means for detecting the arrival time of the specific cell at the output stage of the means and controlling the amount of delay in insertion/extraction.

[0016] In the invention as claimed in claim 3, in the uninterrupted switching system as described in claim 1, the parallel transmission means of the transmitting side device scrambles the information areas of the real cells and the empty cells constituting the working transmission path. The delay control means of the receiving device includes means for transmitting the same information string as the information string after descrambling to the backup transmission line, and the delay control means of the receiving side device includes delay insertion/extraction means of the working side for writing the information string before descrambling the information area. The present invention is characterized by comprising means for controlling the amount of delay in inserting/extracting the output of the information area and the bit string of the output of the delay insertion/extraction means on the standby side for writing the information string before descrambling the information area by detecting a match or mismatch.

[0017] According to the fourth aspect of the invention, in the non-interruption switching system according to the third aspect, the delay control means of the receiving side device first adjusts the delay of the delay insertion/extraction means on the protection side at a predetermined period. If the bit strings of the outputs of the delay insertion/extraction means do not match, the delay of the delay insertion/extraction output on the protection side is removed, and then the delay of the delay insertion/extraction means on the working side is increased in units of cell length at a predetermined period. It is characterized in that it includes means for increasing the bit strings to match the bit strings.

[0018] The invention set forth in claim 5 provides a method for switching without momentary interruption according to any one of claims 1 to 4,
Each of the delay insertion/extraction means on the working side and the protection side is characterized in that it includes means for replacing the stuffing position of a non-signal cell in the input stage with the stuffing position of a non-signal cell at the same periodic position in the output stage. The invention according to claim 6 is characterized in that the actual cell capacity of the transmission path per unit time is constant in the uninterrupted switching method according to claim 5.

According to a seventh aspect of the present invention, in the non-interruption switching system according to the fifth aspect, the transmission line switching means of the receiving side device switches the parallel transmission means during the non-interruption switching of the working transmission line. The present invention is characterized in that it includes means for making constant the actual cell capacity per unit time of the working transmission line in front of the current transmission line. According to an eighth aspect of the invention, in the non-interruption switching system according to the first aspect, the transmission line switching means of the receiving side device connects the backup transmission line by delay insertion/extraction means on the backup side after the instantaneous interruption switching. The delay inserted in the information string of is extracted in units of cell length at a predetermined period, and
It is characterized by comprising means for disconnecting the delay insertion/extraction means on the protection side from the protection transmission line when the delay is eliminated, and means for inserting the delay insertion/extraction means on the working side into the working transmission line before switching without momentary interruption. shall be.

[0020] The invention according to claim 9 is the non-interruption switching system according to any one of claims 1 to 8,
It is characterized by a configuration that performs instantaneous interruption switching for a plurality of paths or channels that are multiplexed to form a transmission path.

[0021]

In the invention as set forth in claims 1, 2, and 5 to 9, the amount of delay of each transmission path is controlled so that the difference in arrival time of a specific cell subjected to switching control is the same for each transmission path. That is, when the transmission delay on the working side is large, a delay equal to the transmission delay difference is added to the protection side, and on the other hand, when the transmission delay on the working side is small, a transmission delay in units of cell length is added to the working side at a predetermined period, The transmission delay difference is set to zero and uninterrupted switching is executed.

[0022] In the invention described in claims 1, 3 to 9, the bit strings of the information strings arriving on each transmission path are compared, and the transmission delay on the protection side is first determined at a period at which it is possible to determine whether each information string matches/mismatches. The delay is increased in units of cell length, and at the point where the information strings match, a seamless switch is performed from the working side to the backup side. Also,
If a matching point in the information strings cannot be found, after removing the delay on the protection side, the delay on the working side is increased in units of cell length at a predetermined period, and the delay is changed from the working side to the protection side at the matching point in the information string. Executes uninterrupted switching.

That is, in the present invention, since the delay control of the information stream during service is performed for each cell length at a predetermined long period, the phase jump of the actual cell stream is prevented at the terminal or the input stage of the ATM/STM conversion circuit. It can be made so that it hardly occurs. Therefore, the receiving terminal of the channel, AT
The M/STM conversion circuit is capable of converting a received information sequence into an original signal in synchronization with the average speed of a real cell stream of a channel or path (or a particular real cell stream containing a periodic signal of 8 kHz, for example).

As described above, the present invention replaces the difference in transmission delay in non-stop switching with a slight frequency change that does not cause a deterioration in transmission quality at the receiving terminal, and can achieve non-stop switching without increasing the transmission delay between terminals. It is possible to realize disconnection switching. Further, in the invention as set forth in claim 8, the delay insertion/extraction means can be disconnected from the transmission line or path on the standby side after switching without momentary interruption, so that even if a switching system without interruption is introduced in the network, the network reliability is improved. It is possible to avoid a decline in sexual performance.

[0025]

Embodiment FIG. 1 is a block diagram showing the configuration of a first embodiment of the present invention. In the figure, a transmitting side device 13 and a receiving side device 14 are arranged opposite to each other via a working transmission line 11 and a protection transmission line 12. The transmission side device 13 includes a parallel transmission circuit 15 that sends out transmission signals in parallel to the working transmission line 11 and the protection transmission line 12, and a switching control OAM in which sequential numbers are assigned to empty cell positions in the working transmission line 11.
It also includes a switching control OAM cell generation circuit 16 that inserts cells almost periodically. The receiving side device 14 is connected to the working transmission line 1
a delay insertion/extraction circuit 17 on the active side inserted into the active transmission line 11, a delay insertion/extraction circuit 18 on the protection side inserted into the protection transmission line 12, and a switching circuit 19 for switching between the active transmission line 11 and the protection transmission line 12; The control circuit 20 controls the delay insertion/extraction circuits 17 and 18 to adjust the transmission delay difference of each transmission line, and controls the switching operation of the switching circuit 19 when the transmission delay difference is zero.

FIG. 2 is a block diagram showing an embodiment of the configuration of the receiving side device 14. As shown in FIG. In the figure, the delay insertion/extraction circuits 17 and 18 on the active side and the standby side have the same configuration. The delay insertion/extraction circuits 17 and 18 include a FIFO (first-in-first-out memory) 21, a control circuit 22 that controls writing and reading of the FIFO 21, and a control circuit 22 that controls writing and reading of the FIFO 21.
The switching control OAM cell detection circuit 23 detects the switching control OAM cell from the output of the switching control OAM cell. The FIFO 21 includes a memory 24 that stores real cells of the working transmission line 11 or the backup transmission line 12, and a write address that sends a write address to the memory 24 in response to a real cell write control signal 31 that indicates whether or not a real cell has arrived. A generating circuit 25;
Actual cell read control signal 3 output from control circuit 22
2, and a read address generation circuit 26 that sends a read address to the memory 24 in response to the read address. The memory 24 reads out cells in order from the first written cell according to the read address output from the read address generation circuit 25. Note that each circuit operates according to a clock 33, and an empty signal 34 is output to the control circuit 22 when all cells are read from the memory 24.

O for switching control of each delay insertion/extraction circuit 17, 18
OAM for switching control output from AM cell detection circuit 23
The cell detection signals 35 and 36 are input to the control circuit 20, and the control circuit 20 is connected to the control circuit 22 of each delay insertion/extraction circuit 17, 18.
Control signals 37 and 38 for controlling the switching circuit 19 and a switching signal 39 for controlling the switching circuit 19 are output. First, the transmission line switching operation will be explained.

The FIFO 21 of the delay insertion/extraction circuits 17 and 18 writes only real cells in response to the real cell write control signal 31. Further, the control circuit 22 synchronizes a bit string of 1 and 0 from the real cell write control signal 31 with the arrival of a real cell as "1" and the arrival of an empty cell as "0" in synchronization with the cell phase clock in the receiving side device 14. Record. That is, the actual cell arrival history recorded in the FIFO 21 is recorded in the control circuit 22. Next, the control circuit 22 sequentially reads out the arrival history information until the empty signal 34 is given, and when it is "1", sends out the real cell read control signal 32 and reads out the real cells in the memory 24. . In addition, when the arrival history information is "0", the real cell read control signal 3
Stop sending out 2. Note that the empty cell generated at this time is a time interval for each cell other than the actual cell in the receiving side device 14, and together with the empty cell on the transmission path, when the cell phase clock in the device is faster than the transmission path. Also included are cells with no signal during the idle time that occurs.

Control signal 37 sent from control circuit 20
, 38 are a cell read stop signal, a cell arrival interval compression signal, or a cell read interval expansion signal. The delay insertion/extraction circuits 17 and 18 normally perform cell writing and reading in the same way as a normal FIFO, but when given control signals 37 and 38 as cell read interval extension signals, the delay insertion/extraction circuits 17 and 18 write and read cells in the control circuit 22 at a predetermined period. 1 of the arrival history recorded in
Stop reading the 0 bit string. That is, at that timing, a delay is given by inserting an empty cell, and the time of the cell flow is expanded. Furthermore, when control signals 37 and 38 as cell arrival interval compression signals are given, "0" is written to one empty cell or no-signal cell that arrives at the delay insertion/extraction circuits 17 and 18 at a predetermined periodic position. When the bit string of 1 and 0 of the arrival history recorded in the control circuit 22 is read out, the reading of "0" is ignored at a predetermined period and skipped to the reading of the next bit. That is, empty cells are removed at that timing, and time compression of the cell flow is performed.

FIG. 3 is a diagram illustrating the principle of time compression of cell flow. (a) is the delay insertion/extraction circuit 17,1
8 (FIFO 21) shows the original cell flow of a transmission path in which two paths represented by VPa and VPb are multiplexed. Thick solid arrows indicate real cells, thin solid arrows indicate empty cells, and broken arrows indicate no-signal cells. A no-signal cell section occurs when the number of cell phase clocks in the device is greater than the sum of real cells and empty cells on the transmission path within a unit time, but the delay insertion/extraction circuit 17, which writes only real cells, In step 18, both empty cells and non-signal cells are treated as non-signal cells. It is assumed that the information areas of real cells and empty cells that arrive at the delay insertion/extraction circuits 17 and 18 have been descrambled and converted into original signals.

(b) is a cell stream obtained by time-compressing the cell at the output of the delay insertion/extraction circuits 17 and 18 by removing a cell whose periodic position is an empty cell or a no-signal cell from the original cell stream. shows. Here, time compression is performed by removing the empty cell {circle around (2)} corresponding to period position 1, but time compression is not performed at period position 2 because a real cell arrives. That is, since only empty cells or non-signal cells located at predetermined periodic positions are removed, an increase in cell flow rate can be appropriately suppressed, and an increase in average speed and peak speed can be alleviated. Further, by setting the period N to be sufficiently large, the increase in cell flow rate in the output of the delay insertion/extraction circuit can be suppressed to an extremely small value. According to the above principle, in addition to recording the presence or absence of the arrival of a real cell as a bit string of "0" and "1", it is also possible to record directly in the FIFO 21 the real cell and the empty cell excluding the empty cell at the periodic position. It can also be realized with a configuration that writes .

Furthermore, if a predetermined periodic position does not become a continuous empty cell or a no-signal cell, the original cell flow cannot be time-compressed. In that case, time compression becomes possible by removing empty cells or non-signal cells near the periodic position or by shifting the periodic position. By the way, the cell stream accumulated in the backup delay insertion/extraction circuit 18 at the time of switching the transmission path becomes a cell stream time-compressed from the original cell stream at its output stage, and is read out in its entirety after a predetermined period of time has elapsed. Due to the above-mentioned time compression principle, there is almost no need to cause phase jumps in the actual cell flow.

FIG. 4 is a diagram illustrating the principle of time expansion of cell flow. (a) Similarly, delay insertion/extraction circuit 1
The original cell flow arriving at 7,18 is shown. (b) shows a cell stream obtained by inserting non-signal cells at predetermined periodic positions in the original cell stream to perform time expansion at the outputs of the delay insertion/extraction circuits 17 and 18. Here, no-signal cells are inserted at cycle positions 1, 2, and 3 to perform time expansion, and a delay can be added to the cell stream. Furthermore, by making the cycle of inserting the no-signal cells sufficiently long, it is possible to hardly cause phase jumps in the actual cell flow at the output of the delay insertion/extraction circuit.

In addition, by controlling the compression and expansion of the actual cell stream at a cycle of, for example, 106 cells, the receiving side device 14 can use a PLL to regenerate the reception clock from the average speed of the actual cell stream.
It is possible to suppress the frequency fluctuation of the actual cell flow to a lower value than the cutoff frequency of the circuit or other circuits, and avoid deterioration of transmission quality due to transmission delay differences during uninterrupted switching of the transmission path. Based on the operating principle shown above, the procedure for switching the transmission line without momentary interruption will be explained.

The delay insertion/extraction circuit 17 on the working side is normally not inserted into the working transmission line 11, but is inserted before switching. Furthermore, if the cell has been inserted in advance, control is performed to allow the cell flow to pass through without delay. It is assumed that the switching circuit 19 of the receiving side device 14 selects the working transmission line 11 side. The delay insertion/extraction circuit 18 on the protection side is inserted into the protection transmission line 12 before switching or is inserted in advance, and controls writing and reading of the actual cells. Also,
The control circuit 20 receives a switching control OAM cell detection signal 35,
36 is taken in, and the transmission delay difference between the working transmission line 11 and the protection transmission line 12 is detected according to the difference in arrival time of switching control OAM cells having the same sequential number.

Here, when the transmission delay of the working transmission line 11 is small, the control circuit 20 connects the delay insertion/extraction circuit 17 on the working side.
In response, a cell read interval extension signal is sent as a control signal 37. In the control circuit 22 of the delay insertion/extraction circuit 17,
In response to this cell read interval extension signal, the switching control O
Reading of the real cell arrival history recorded at a predetermined cycle longer than the AM cell arrival cycle is stopped. That is, the time extension shown in FIG. 4 is performed, and thereafter, the control circuit 20 detects the timing when the difference in the arrival time of the switching control OAM cells having the same sequential number from the switching control OAM cell detection signals 35 and 36 becomes zero. Then, a switching signal 39 is sent to the switching circuit 19 to execute switching from the working transmission line 11 to the protection transmission line 12. Alternatively, when the difference in the arrival times of switching control OAM cells with the same sequential number becomes equal to or less than a predetermined value, each delay insertion/extraction is performed when each switching control OAM cell detection circuit 23 detects a switching control OAM cell. circuit 1
It is also possible to stop the reading from 7 and 18, switch from the working transmission line 11 to the backup transmission line 12, and then restart the reading.

If the memory for recording the arrival history of actual cells in the control circuit 22 on the active side overflows before the switching operation is performed, time compression processing of the cell flow is performed. That is, the cell arrival interval compression recording or cell readout interval expansion operation is repeated until the switching operation is performed. On the other hand, when the transmission delay of the working transmission line 11 is large, the control circuit 20 sends a cell reading stop signal as a control signal 38 to the delay insertion/extraction circuit 18 on the protection side. Control circuit 22 of delay insertion/extraction circuit 18
Then, in response to this cell reading stop signal, reading out the actual cell arrival history is stopped for a time longer than the transmission delay difference. Here, if the memory for recording the arrival history of actual cells in the control circuit 22 on the standby side overflows, reading of the memory is started. Next, the control circuit 20 sends a control signal 3 to the delay insertion/extraction circuit 18 on the standby side.
7, a cell arrival interval compression signal is transmitted. In response to this cell arrival interval compression signal, the control circuit 22 of the delay insertion/extraction circuit 18 outputs "0" indicating the arrival of an empty cell or a no-signal cell.
Writing is prohibited at a predetermined cycle longer than the switching control OAM cell arrival cycle. That is, the time compression shown in FIG. 3 is performed, and from then on, the control circuit 20 detects the timing when the difference in the arrival time of the switching control OAM cells with the same sequential number becomes zero from the switching control OAM cell detection signals 35 and 36. in,
A switching signal 39 is sent to the switching circuit 19 to execute switching from the working transmission line 11 to the protection transmission line 12. Or OAM for switching control with the same sequential number
When the difference in the arrival times of the cells becomes less than a predetermined value and each switching control OAM cell detection circuit 23 detects a switching control OAM cell, reading from each delay insertion/extraction circuit 17 and 18 is stopped. from the working transmission line 11 to the backup transmission line 1.
2, and reading may be resumed thereafter.

In this case as well, if the memory for recording the arrival history of actual cells in the control circuit 22 becomes empty before the switching operation is performed, time expansion processing of the cell flow is performed. . Furthermore, when the switching control OAM cell detection circuit 23 on the spare side detects a switching control OAM cell with a certain sequential number, reading from the delay insertion/extraction circuit 18 on the spare side is stopped, and the switching control with the same sequential number is stopped. When the switching control OAM cell detection circuit 23 on the active side detects the OAM cell for use, reading from the delay insertion/extraction circuit 18 on the protection side is started, and the same switching procedure is executed thereafter to determine the switching timing. You can hasten it.

Next, the operation when switching paths without momentary interruption will be explained. In the case of path switching, the path to be switched is extracted from the transmission line and input to the delay insertion/extraction circuit, so that the cell flow arriving at the delay insertion/extraction circuit is equal to all time periods other than the actual cells in the path to be switched. Regarded as a no-signal cell section. Therefore, the actual cell arrival history recorded in the control circuit 22 includes "1" indicating the arrival of the real cell of the VPI to be switched, and "1" indicating the other cell times.
0" bit string.

FIG. 5 is a diagram illustrating the principle of time compression of cell flow in path switching. (a) is
V arriving at the delay insertion/extraction circuits 17, 18 (FIFO 21)
The original cell flow of the two channel multiplexed path represented by Ca and VCb is shown. Thick solid line arrows indicate actual cells, and broken line arrows indicate non-signal cells. (b) is
In the outputs of the delay insertion/extraction circuits 17 and 18, a cell stream is shown in which time compression is performed by removing a cell whose periodic position is a no-signal cell in the original cell stream. Here, time compression is performed by removing the non-signal cell (3) corresponding to periodic position 1, but time compression is not performed at periodic position 2 because a real cell arrives. Note that by making the period N sufficiently large, the increase in cell flow rate in the output of the delay insertion/extraction circuit can be suppressed to an extremely small value. In addition, if a predetermined periodic position does not become a continuous no-signal cell,
Time compression of the original cell stream cannot be performed. In that case, time compression becomes possible by removing non-signal cells near the periodic position or by shifting the periodic position.

By the way, the cell stream accumulated in the backup delay insertion/extraction circuit 18 at the time of switching the transmission path becomes a cell stream time-compressed from the original cell stream at the output stage, and is read out completely after a predetermined time elapses. However, due to the above-mentioned time compression principle, there is almost no need to cause phase jumps in the actual cell flow. FIG. 6 is a diagram illustrating the principle of time expansion of cell flow in path switching.

(a) Similarly, the delay insertion/extraction circuit 17,1
The original cell stream arriving at 8 is shown. (b) shows a cell stream obtained by inserting non-signal cells at predetermined periodic positions in the original cell stream to perform time expansion at the outputs of the delay insertion/extraction circuits 17 and 18. Here, no-signal cells are inserted at cycle positions 1, 2, and 3 to perform time expansion, and a delay can be added to the cell stream. Furthermore, by making the cycle of inserting the no-signal cells sufficiently long, it is possible to hardly cause phase jumps in the actual cell flow at the output of the delay insertion/extraction circuit.

Note that in path switching, since delay fluctuation occurs in the intermediate device between the transmitting side device 13 and the receiving side device 14 shown in FIG. The arrival times of cells rarely match. Therefore, when the difference in the arrival times of switching control OAM cells with the same sequential number becomes equal to or less than a predetermined value, each switching control OAM cell detection circuit 2
When the switching control OAM cell is detected in step 3, reading from each delay insertion/extraction circuit 17 and 18 is stopped and switching from the working transmission line 11 to the protection transmission line 12 is performed. The subsequent operation is similar to switching the transmission path.

[0044] Furthermore, channel switching without momentary interruption can be explained in the same manner as the above-mentioned path switching. FIG. 7 is a block diagram showing the configuration of a second embodiment of the present invention. In the figure, a transmitting side device 41 and a receiving side device 42 are arranged facing each other via a working transmission line 11 and a protection transmission line 12. The transmitting side device 41 includes a cross-connect switch 43, a scrambling circuit 44 that scrambles the information areas of real cells and empty cells, and a transmission signal sent from the cross-connect switch 43 and the scrambling circuit 44 between the working transmission line 11 and the backup. A parallel transmission circuit 15 that sends out data in parallel to the transmission path 12 is provided. The receiving side device 42 includes a cell receiving circuit 45 that is inserted into each of the working transmission line 11 and the protection transmission line 12 and establishes the boundaries of receiving cells, and a clock conversion circuit 46 that switches from the transmission line clock to the internal clock of the device. A delay insertion/extraction circuit 47 on the active side, a delay insertion/extraction circuit 48 on the protection side, a bit comparison circuit 49 that compares the bit strings of cells arriving from each transmission path, and a switch for switching between the active transmission path 11 and the protection transmission path 12. It takes in the outputs of the circuit 19 and the bit comparison circuit 49 and controls each delay insertion/extraction circuit 47 and 48 to adjust the transmission delay difference of each transmission line, and controls the switching operation of the switching circuit 19 when the transmission delay difference is zero. A descrambling circuit 51 that descrambles the real cell and vacant information areas output from the switching circuit 19, and a cross-connect switch 52 are provided.

The descrambling circuit 51 is configured to ignore the arriving non-signal cells and descramble the data strings of only the information areas of the continuously arriving real cells and empty cells to restore the original signal. , they may be placed between the delay insertion/extraction circuits 47 and 48 and the switching circuit 19, respectively, if the circuits have the same delay. Furthermore, if the scrambling period is sufficiently long, by comparing the bits before the descrambling circuit 51, even if empty cells arrive continuously for a long time, the transmission between the working transmission line 11 and the protection transmission line 12 can be maintained. Matching/mismatching of delay times can be identified.

FIG. 8 is a block diagram showing an embodiment of the configuration of the receiving side device 42. As shown in FIG. In the figure, delay insertion/extraction circuits 47 and 48 on the active side and on the standby side have the same configuration. The delay insertion/extraction circuits 47 and 48 include a FIFO 21 and a control circuit 53 that controls writing and reading of the FIFO 21. The FIFO 21 includes a memory 24 that stores actual cells of the working transmission line 11 or the backup transmission line 12, and a write address generation circuit 25 that sends a write address to the memory 24 in response to a write control signal 61 for the actual cell or empty cell. and a read address generation circuit 2 that sends a read address to the memory 24 in response to a real cell or empty cell read control signal 62 output from the control circuit 53.
6. The memory 24 reads out cells in order from the first written cell according to the read address output from the read address generation circuit 25. Note that each of the delay insertion/extraction circuits 47 and 48 operates according to the clock 33 and outputs an overflow signal or an empty signal 63 to the control circuit 53.

A bit comparison circuit 49 which branches and takes in the outputs of the respective delay insertion/extraction circuits 17 and 18 outputs a match/mismatch detection signal 64 to the control circuit 50. The control circuit 50 and the control circuit 53 of each delay insertion/extraction circuit 47, 48 receive control signals 65,
66 , and the control circuit 50 outputs a switching signal 39 that controls the switching circuit 19 . Here, the transmission line switching operation in the configuration of this embodiment will be explained.

The FIFO 21 of the delay insertion/extraction circuits 47 and 48 writes real cells and empty cells in response to the write control signal 61. No signal cells are not written to. Control circuit 53
is created on the output side of the delay insertion/extraction circuit by periodically stopping the readout control signal 62 to periodically read the same number of no-signal cells as the number of no-signal cells arriving at the delay insertion/extraction circuit per unit time. The read control signal 62 is stopped at the same timing by synchronizing the active side and the standby side. In addition, the delay insertion/extraction circuit 4
7 and 48, the read control signal 62 is stopped at a predetermined cycle, in addition to the cycle control when creating a no-signal cell. The control signals 65 and 66 are signals or overflow signals that synchronize the operations of the two control circuits 53 via the control circuit 50.

The bit comparison circuit 49 is connected to each delay insertion/extraction circuit 4.
The bit strings of the outputs 7 and 48 are constantly compared, and if they match, the match/mismatch detection signal 64 is set to "0", and if they do not match, the match/mismatch detection signal 64 is set to "1". The control circuit 50 detects a match/mismatch between the information strings of the working transmission line 11 and the backup transmission line 12 in response to the match/mismatch detection signal 64. However, in each delay insertion/extraction circuit 47, 48, the read control signal 6
2 is stopped synchronously, its detection operation is stopped.

FIG. 9 is a diagram illustrating the operation of the bit comparison circuit 49 and the operation of each delay insertion/extraction circuit 47 and 48. In the figure, (a) shows the input signal and output signal of the delay insertion/extraction circuit 47 on the active side, (b) shows the input signal and output signal of the delay insertion/extraction circuit 48 on the protection side, and (c) shows the input signal and output signal of the delay insertion/extraction circuit 48 on the protection side.
indicates a match/mismatch detection signal 64. Here, A to Z
indicates a real cell or an empty cell, and "None" indicates a no-signal cell. The random no-signal cell sections at the inputs of the delay insertion/extraction circuits 47 and 48 are at the same and predetermined periodic position on the output side on the working side and the standby side. This is the delay insertion/extraction circuit 4
Random stuff positions on the input side of 7 and 48 are converted to the same stuff position on the output side on the working side and the standby side. This operating principle can be applied if the stuffing rate at the input of the delay insertion/extraction circuit is constant and known. As a result, the information strings on the active side and the backup side can be kept in a matching state for a long time, so that the bit comparison operation can be facilitated. Furthermore, by stopping the stuffing operation using non-signal cells on the output side of the delay insertion/extraction circuits 47 and 48, it is possible to remove unnecessary non-signal cells and compress the time. It becomes possible to separate. In the figure, in order to increase the transmission delay on the working side, cell reading is stopped at periodic position (3) for delay control, and a no-signal cell is inserted. As a result, the bit comparison circuit 49 can finally see that both bit strings match. Note that the same applies when increasing the transmission delay on the backup side.

[0051] The transmission line switching operation will now be explained. In the two control circuits 53, it is assumed that the periodic positions at which reading is stopped are synchronized. First, the control circuit 50 sends a control signal 66 to the backup control circuit 53.
A cell read stop signal is sent as follows. In response to this cell readout stop signal, the standby side control circuit 53 stops the readout control signal 62 periodically for one cell period, and also stops the readout control signal 62 at a predetermined period.
stop. Thereby, the delay of the cell flow on the standby side can be periodically increased by one cell. Control circuit 50
The match/mismatch detection signal 64 is "
0 (match), it is assumed that the delays of the working transmission line 11 and the protection transmission line 12 match, and the switching signal 39 switches the switching circuit 19 from the working side to the protection side, and also switches the switching circuit 19 from the working side to the protection side. The control circuit 53 is controlled to return to normal operation.

However, when the control circuit 53 on the standby side receives the overflow signal 63 of the delay insertion/extraction circuit 21 before the switching is performed, it notifies the control circuit 50 of this fact. In response to this notification, the control circuit 50 controls the current transmission line 11.
It is determined that the transmission delay of is smaller than that of the backup transmission line 12,
It compresses the time in the delay insertion/extraction circuit 48 on the protection side, and sends a cell readout stop signal as a control signal 65 to the control circuit 53 on the active side. The delay insertion/extraction circuit 47 on the working side periodically increases the delay of the cell stream by one cell, similar to the operation of the delay insertion/extraction circuit 48 on the protection side described above. The control circuit 50 determines that the match/mismatch detection signal 64 is “
0 (match), the switching circuit 19 is similarly switched from the active side to the standby side.

After switching to the standby side, the control circuit 53 periodically reads out the delay in the delay insertion/extraction circuit using the readout control signal 6.
Time compression can be achieved by stopping the operation that is being stopped in 2 at a cycle that is an integral multiple of that cycle. Note that the second embodiment of the present invention described above is preferably a clock synchronous network.

FIG. 10 is a block diagram showing the configuration of a third embodiment of the present invention. In the figure, a transmitting side device 71 and a receiving side device 72 are arranged facing each other via a working transmission line 11 and a protection transmission line 12. The transmission side device 71 includes a cross-connect switch 43 and a cross-connect switch 4.
A parallel transmission circuit 73 scrambles the information areas of real cells and empty cells sent out from 3 and sends them out in parallel to the working transmission line 11 and the protection transmission line 12, and a parallel transmission circuit 73 that scrambles the information areas of the real cells and empty cells sent out from Multiplexing circuit 74 for multiplexing
Equipped with. The receiving side device 72 includes a cell receiving circuit 75 inserted into each of the working transmission line 11 and the protection transmission line 12, which establishes the boundaries of the receiving cells and descrambles the information areas of real cells and empty cells, and the transmission line. Clock conversion circuit 4 that switches from clock to device internal clock
6, a demultiplexing circuit 76 that separates paths or channels from the transmission path, a delay insertion/extraction circuit 47 on the active side, a delay insertion/extraction circuit 48 on the protection side, and a bit comparison that compares the bit strings of cells arriving from each transmission path. Circuit 49 and working transmission line 11
and a switching circuit 19 that switches between the transmission line 12 and the backup transmission line 12, and each delay insertion/extraction circuit 47 that receives the output of the bit comparison circuit 49.
, 48 to adjust the transmission delay difference of each transmission line, and a cross-connect switch 52. Note that the multiplexing circuit 74 and the demultiplexing circuit 76
is used in case of path or channel switching.

Here, two delay insertion/extraction circuits 47, 48,
Bit comparison circuit 49, control circuit 50 and switching circuit 19
The operation is similar to that of the second embodiment shown in FIGS. 7 and 8, and the principle of operation will be similarly explained using FIG. In addition, in the parallel transmission circuit 73, in order to easily identify the difference between the information strings on the working side and the backup side by bit comparison,
A function of inserting a sequential number into the information area of an empty cell may be added.

Note that in this embodiment as well, it is desirable that the network be a clock synchronous network. Furthermore, although this embodiment is an example in which empty cells are also written to the delay insertion/extraction circuits 47 and 48, there is no CB on the transmission path.
In the case where only signals obtained by converting continuous signals such as R into cells are multiplexed and the bit rate of the actual cell flow on the transmission path (or path or channel) is fixed, the operating principle shown in FIG. By regarding the area other than the cell as the stuffing time area of the no-signal cell, the same function as in the second embodiment can be realized. That is, the delay insertion/extraction circuits 47, 48
Only the actual cells of the transmission line (or path or channel) are written to the , and the read control signal 62 of the delay insertion/extraction circuits 47 and 48 is periodically stopped based on the difference between the number of actual cells per unit time and the cell phase clock in the device. By configuring it to do so, it becomes possible to switch the transmission line (or path or channel) without any interruption. Incidentally, in the instantaneous switching of paths and channels, it is also possible to set the cell phase clock speed of the delay insertion/extraction circuits 47 and 48 to a channel corresponding to the bit rate of the path or channel.

FIG. 11 is a block diagram showing the configuration of a fourth embodiment of the present invention. The features of this embodiment are as follows:
In the configuration of the third embodiment shown in FIG.
In place of the cross-connect switch 43 in FIG. 1, the transmission side device 80 is provided with an OAM cell insertion circuit 81 for capacity control. FIG. 12 shows the capacity control OAM cell insertion circuit 81.
FIG. 2 is a block diagram showing the configuration of an embodiment.

In the figure, the actual cells of the transmission lines (or paths) to be switched are written in the FIFO 82, and the capacity is set equal to the fixed capacity of each transmission line (or path) according to the read control signal output from the control circuit 83. It is read out at a predetermined speed and sent to the selector 84. The control circuit 83 switches the input of the selector 84 from the FIFO 82 to the capacity control OAM cell generation circuit 85 in response to an empty signal indicating that there is no real cell in the FIFO 82 . Further, when the empty signal disappears, the selector 84 is returned to its original state. This provides the output of the selector 84 with a fixed capacitance real cell flow.

Note that it is also possible to insert a sequential number into the information area of the OAM cell for capacity control. Similar capacity control is also possible for one channel. In the normal state before and after switching without interruption, the insertion of OAM cells for capacity control is stopped.
An empty cell will be inserted in its place. The capacity control OAM cell is removed before the cross-connect switch 52 of the receiving device 72 or at a path termination circuit (not shown).

[0060] In this embodiment as well, it is desirable that the network be a clock synchronous network. FIG. 13 is a block diagram showing the configuration of a fifth embodiment of the present invention. The feature of this embodiment is that in the configuration of the fourth embodiment shown in FIG. 12, the parallel transmission circuit 15 and the parallel transmission circuit 15 shown in FIG. OAM for switching control
It has a configuration in which the cell generation circuit 16 is provided, the delay insertion/extraction circuits 88 and 89 of the receiving side device 87 are provided with the switching control OAM cell detection circuit 23 shown in FIG. 2, and the bit comparison circuit 49 is omitted.

FIG. 14 shows a delay insertion/extraction circuit 88 of the fifth embodiment.
, 89 is a block diagram showing the configuration of the embodiment. In the figure, only real cells including capacity control OAM cells are written into the FIFO 21 of delay insertion/extraction circuits 88 and 89. No signal cells are not written to. The control circuit 53 periodically reads the same number of non-signal cells as the number of non-signal cells that arrive at the delay insertion/extraction circuit per unit time and creates them on the output side of the delay insertion/extraction circuit by stopping the control signal 62. This operating principle is the same as that explained in FIG. The cell flow control method in the delay insertion/extraction circuits 88 and 89 is also similar.

[0062] The transmission line switching operation will now be explained. In the two control circuits 53, it is assumed that the periodic positions at which reading is stopped are synchronized. First, the control circuit 90 takes in the switching control OAM cell detection signals 35 and 36, and selects the switching control OAM cells with the same sequential number.
The transmission delay difference between the working transmission line 11 and the protection transmission line 12 is detected according to the difference in cell arrival times.

First, when the transmission delay of the working transmission line 11 is large, the control circuit 90 sends a cell reading stop signal as a control signal 66 to the control circuit 53 of the delay insertion/extraction circuit 89 on the standby side. Control circuit 5 of delay insertion/extraction circuit 89
3, in response to this cell readout stop signal, in addition to the previous operation of periodically stopping the readout control signal 62 for one cell section, the readout control signal 62 is stopped at a predetermined period. Thereby, the delay of the cell flow on the standby side can be periodically increased by one cell. If the difference in the arrival times of switching control OAM cells with the same sequential number on the working side and the protection side is zero for a predetermined number of times, the control circuit 90 eliminates the delay of the working transmission line 11 and the protection transmission line 12. Assuming that the switching signal 39 is in use, the switching circuit 19 is switched from the current side to the standby side, and the control circuit 53 on the standby side is controlled to return to normal operation.

On the other hand, when the transmission delay of the currently used transmission line 11 is small, the control circuit 90 sends a cell read stop signal as a control signal 65 to the delay insertion/extraction circuit 88 on the currently used side. Similarly, the control circuit 53 of the delay insertion/extraction circuit 88 periodically increases the delay of the current cell flow by one cell. Similarly, the working transmission line 11 and the backup transmission line 12
Switch from the active side to the standby side at the point where the delays of .

After switching to the standby side, the control circuit 53 periodically reads out the delay in the delay insertion/extraction circuit using the readout control signal 6.
Time compression can be achieved by stopping the operation that is being stopped in 2 at a cycle that is an integral multiple of that cycle. In this embodiment as well, it is desirable that the network be a clock synchronous network. FIG. 15 is a block diagram showing the configuration of a sixth embodiment of the present invention.

In the figure, the feature of this embodiment is that in the configuration of the fifth embodiment shown in FIGS. 13 and 14, the capacity control OAM cell insertion circuit 8
1, the transmission side device 91 is provided with a cross-connect switch 43. Therefore, this embodiment is applied to a case where only signals obtained by converting continuous signals such as CBR into cells are multiplexed on a transmission path, and the bit rate of the actual cell stream on the transmission path is fixed. Only real cells are written to the delay insertion/extraction circuits 88, 89, and the delay insertion/extraction circuits 88, 89 write the actual cells based on the difference between the number of actual cells per unit time and the cell phase clock in the device.
The read control signal 62 of 89 is configured to be stopped periodically. Note that if the bit rate of the actual cell stream is fixed, it can also be applied to path or channel switching.

In the case of transmission line switching, if real cells and empty cells are written to the delay insertion/extraction circuit,
It also becomes possible to switch transmission lines whose actual cell capacity changes without momentary interruption. In this embodiment as well, it is desirable that the network be a clock synchronous network. FIG. 16 is a block diagram showing the configuration of a seventh embodiment of the present invention. In the figure, the feature of this embodiment is that a switching control OAM cell generation circuit 16 is connected to a network termination device 92, and the switching control OAM cell is inputted to a transmission side device 93 via the network termination device 92. It's in the configuration. Note that a terminal 94 is connected to the network termination device 92. This embodiment can be applied to each of the embodiments shown in FIGS. 1, 13, and 15. In the network terminal device 92, a VPI switching control OAM cell having a sequential number or a VPI switching control OAM cell having a cycle of, for example, 1 millisecond is inserted. The receiving side device 14 (87) performs switching according to the above-described procedure using this switching control OAM cell.

[0068] In the embodiment using the OAM cell for switching control described above, the time obtained by subtracting the time for changing the sequential number from the time for the sequential number of the OAM cell for switching control to complete one cycle is less than the transmission delay difference due to switching. It needs to be at least long. It is also possible to switch using an OAM cell for switching control that does not include a sequential number, but in that case, the OAM cell for switching control
It is necessary to make the transmission cycle of AM cells longer than twice the transmission path length difference due to switching.

Furthermore, in all the embodiments described above, the disconnection of the delay insertion/extraction circuit from the transmission line, path, or channel in service after switching is described in Japanese Patent Application No. 63-23783.
As described in No. 6 "Line switching system", when there are no more cells in the delay insertion/extraction circuit, the empty cell or no-signal cell detection circuit placed in front of the delay insertion/extraction circuit continuously detects empty cells. Or when a no-signal cell is detected. However, if there is a delay insertion/extraction circuit before the descrambling circuit, use the continuous no-signal cell section, or use the clock conversion circuit 46 to switch from the transmission line clock to the internal clock.
Disconnection is possible by stopping reading of the data.

By the way, as shown in FIG. 17, between terminal devices transmitting cell streams via a synchronous network, the transmitting side device 9
5 operates in synchronization with the network clock 113, and the receiving side device 9
6 operates in synchronization with a specific periodic cell 97 sent from the transmitting device 95. That is, the transmitting device 95 refers to the network clock 113 received from the network 112, performs encoding operations, etc., inserts a predetermined periodic signal into a specific cell containing the encoded information string, and transmits the signal to the receiving device. 96, and the receiving device 96 uses a PLL circuit to create an internal operating clock from the periodic signal in the receiving cell and performs decoding processing. Therefore, even if the amount of delay variation in the network 112 is large, if the delay variation is performed slowly, the reception clock generation circuit passes the delay variation, so that the required memory amount of the receiving side device 96 can be reduced. . Moreover, the delay time between encoding and decoding processing for this purpose does not become large.

As described above, since the decoding process has a low-pass filter characteristic, if the delay variation is gentle, the signal passes through this low-pass filter. On the other hand, although the amount of delay variation is small, high-speed delay variation is suppressed by the PLL circuit, and the decoding clock at the PLL output is stable. Therefore, if the delay variation in the non-interruption switching within the network is made extremely gentle so as to pass through the low-pass filter of this PLL circuit, it is possible to avoid the influence of the non-interruption switching on the terminal.

[0072]

As explained above, in the present invention, the delay control of the information sequence in service at the time of switching the transmission path and after the switching is performed in units of cell length at a predetermined long cycle. It is possible to make almost no phase jump occur in the actual cell flow.

[0073] Furthermore, in the uninterrupted switching according to the present invention,
Since the transmission delay difference can be converted into a slight frequency change that prevents deterioration of transmission quality at the receiving terminal, it is possible to handle switching of large transmission delay differences without adversely affecting the terminal. Furthermore, after switching, the difference in transmission delay is gradually absorbed, and the delay insertion/extraction circuit can be disconnected from the path or transmission line in service. It does not cause deterioration of sex. Furthermore, since no transmission delay is constantly inserted between the transmitting and receiving terminals, an increase in delay time can be suppressed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a first embodiment of the present invention.

FIG. 2 is a block diagram showing an example configuration of a receiving side device.

FIG. 3 is a diagram illustrating the principle of time compression of cell flow.

FIG. 4 is a diagram illustrating the principle of time expansion of cell flow.

FIG. 5 is a diagram illustrating the principle of time compression of cell flow in path switching.

FIG. 6 is a diagram illustrating the principle of time expansion of cell flow in path switching.

FIG. 7 is a block diagram showing the configuration of a second embodiment of the present invention.

FIG. 8 is a block diagram showing an example configuration of a receiving side device 42. FIG.

FIG. 9 is a diagram illustrating the operation of the bit comparison circuit 49 and the operation of each delay insertion/extraction circuit 47, 48.

FIG. 10 is a block diagram showing the configuration of a third embodiment of the present invention.

FIG. 11 is a block diagram showing the configuration of a fourth embodiment of the present invention.

FIG. 12 is a block diagram showing an example configuration of a capacity control OAM cell insertion circuit 81.

FIG. 13 is a block diagram showing the configuration of a fifth embodiment of the present invention.

FIG. 14 is a block diagram showing an example configuration of delay insertion/extraction circuits 88 and 89 of a fifth example.

FIG. 15 is a block diagram showing the configuration of a sixth embodiment of the present invention.

FIG. 16 is a block diagram showing the configuration of a seventh embodiment of the present invention.

FIG. 17 is a diagram illustrating a synchronization method between terminals to which the present invention is applied.

FIG. 18 is a diagram illustrating an example of the configuration of a transmission line that performs uninterrupted switching.

FIG. 19 is a diagram showing a configuration example of a real cell and an empty cell.

FIG. 20 is a diagram illustrating a cell flow time compression operation when switching the transmission path to the one with the smaller transmission delay.

FIG. 21 is a diagram illustrating a time expansion operation of a cell stream when switching a transmission path to a direction with a larger transmission delay.

FIG. 22 is a diagram illustrating a conventional synchronization method between terminals.

[Explanation of symbols]

11 Working transmission line 12 Backup transmission line 13, 41, 71, 80, 86, 91 Transmitting side device 1
4, 42, 72, 87 Receiving side device 15 Parallel transmission circuit 16 OAM cell generation circuit for switching control 17, 18
Delay insertion/extraction circuit 19 Switching circuit 20 Control circuit 21 FIFO 22 Control circuit 23 OAM cell detection circuit for switching control 24 Memory 25 Write address generation circuit 26 Read address generation circuit 43, 52 Cross connect switch 44 Scramble circuit 45 Cell reception circuit 46 Clock conversion Circuits 47, 48 Delay insertion/extraction circuit 49 Bit comparison circuit 50 Control circuit 51 Descrambling circuit 53 Control circuit 73 Parallel transmission circuit 74 Multiplexing circuit 75 Cell receiving circuit 76 Demultiplexing circuit 81 OAM cell insertion circuit for fixing capacity 82 FIF
O 83 Control circuit 84 Selector 85 OAM cell generation circuit for fixing capacity 88, 89
Delay insertion/extraction circuit 90 Control circuit 92 Network termination circuit 93 Transmission side device 94 Terminal

Claims (9)

[Claims] Claim 1: Transmission path switching means provided in a transmitting device and a receiving device that are arranged opposite to each other via a working transmission path and a backup transmission path that transmit information strings in units of cells, are configured to switch between the working transmission path and the protection transmission path. In the non-interruption switching method for switching from a transmission line to a backup transmission line without instantaneous interruption, the transmission line switching means of the transmitting side device sends the same information sequence as the information sequence of the working transmission line to the protection transmission line. The transmission line switching means of the receiving side device inserts and removes a delay in units of cell length at a predetermined period for each information string arriving from the working transmission line and the protection transmission line. The delay amount set in at least one of the delay insertion/extraction means is controlled and output in cell length units at a predetermined cycle for the delay insertion/extraction means on the working side and the delay insertion/extraction means on the standby side. When the delay control means matches the amount of delay of the information strings on the working side and the amount of transmission delay on the protection side,
1. A non-interruption switching system comprising: switching means for switching from the output of the delay insertion/extraction means on the active side to the output of the delay insertion/extraction means on the standby side. 2. In the uninterrupted switching method according to claim 1, the transmission line switching means of the transmitting side device performs switching control at a predetermined period at the same position of each information string of the working transmission line and the backup transmission line. The delay control means of the receiving side apparatus includes means for inserting a specific cell for use in the output stage of the delay insertion/extraction means on the active side, and the arrival time of the particular cell at the output stage of the delay insertion/extraction means on the protection side. A non-interruption switching system characterized by comprising means for detecting the arrival time of a cell and controlling the amount of delay in insertion/removal. 3. In the uninterrupted switching system according to claim 1, the parallel transmission means of the transmitting side device generates the same information string after scrambling the information areas of the real cells and empty cells that constitute the working transmission path. The delay control means of the receiving device includes means for sending an information string of A non-interruption switching system characterized by comprising means for controlling the amount of delay in insertion/extraction by detecting whether or not the bit strings output from the delay insertion/extraction means on the standby side write the information string before being descrambled. 4. In the uninterrupted switching system according to claim 3, the delay control means of the receiving side device first increases the delay of the delay insertion/extraction means on the protection side in units of cell length at a predetermined period, and If the bit strings output from the delay insertion/extraction means do not match, the delay of the delay insertion/extraction output on the protection side is removed, and then the delay of the delay insertion/extraction means on the active side is increased in units of cell length at a predetermined cycle to make the bit strings match. 1. A non-interruption switching system characterized by comprising a means for achieving instantaneous interruption. 5. In the non-interruption switching system according to claim 1, each of the delay insertion/extraction means on the working side and the protection side inserts the stuff position of the non-signal cell in the input stage in the output stage. A non-interruption switching system characterized by comprising means for replacing the staff position of a signalless cell with the same periodic position. 6. The instantaneous uninterruptible switching system according to claim 5, wherein the actual cell capacity per unit time of the transmission line is constant. 7. In the non-interruption switching system according to claim 5, the transmission line switching means of the receiving side device switches the current transmission line in front of the parallel transmission means during the non-interruption switching of the active transmission line. An uninterrupted switching system characterized by including means for keeping the actual cell capacity constant per unit time. 8. In the non-interruption switching system according to claim 1, after the non-interruption switching, the transmission line switching means of the receiving side device converts the information string of the protection transmission line into the information string by the delay insertion/extraction means on the protection side. A means for extracting the inserted delay in units of cell length at a predetermined period, and disconnecting the delay insertion/extraction means on the protection side from the protection transmission line when the delay is eliminated, and before switching without interruption,
and means for inserting delay insertion/extraction means on the working side into the working transmission line. 9. The uninterrupted switching method according to any one of claims 1 to 8, wherein the uninterrupted switching is performed for a plurality of paths or channels that are multiplexed and constitute a transmission path. This is a switching system with no momentary interruption.