JPH06232326A - Package for semiconductor device and its preparation - Google Patents

Abstract

PURPOSE: To improve a bonding strength between a lead frame and a molding resin by forming a plurality of through-holes in a mosaic array in a die pad and forming its through-hole section as recessed lower than a top surface of the die pad. CONSTITUTION: A die pad 30 is formed therein with a multiplicity of through- holes 32, arranged in a mosaic array. Then a part of the pad corresponding to the entire through-holes 32 forms a swaging space 33 thereon in the pad. A suitable amount of conductive adhesive agent is dropped on a stepped part 35, which is formed at an outer peripheral surface of the swaging space 33 with use of a dotting tool. Next, a semiconductor chip is compressed under a constant load, while heat is applied to the pad to harden the adhesive. At this time, the adhesive is compressed to spread onto the entire top surface of the stepped part 35 and partly flow into the swaging space 33 lower than the stepped part 35. Accordingly, a bonding strength between a lead frame and molding resin can be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device package and a method of manufacturing the same, and more particularly, to forming a through hole and a swaging space in a die pad of a lead frame to bond the lead frame and a molding resin. The present invention relates to a semiconductor device package capable of improving force and preventing overflow of an adhesive from a die bonding process, and a method for manufacturing the same.

[0002]

2. Description of the Related Art In response to the demand for lighter, thinner, shorter and smaller electronic devices and the demand for higher integration, highly integrated devices using fine processing technology for semiconductor integrated circuits have been developed.

As the degree of integration of semiconductor integrated circuits increases, the size of semiconductor chips increases and the number of pins increases. Therefore, development of a semiconductor package has become an important issue in order to rationalize the mounting of electronic products along with the reduction in size and weight.

The semiconductor packaging technology up to the present time has been promoted with the aim of miniaturization, thinning, and high functionality. In accordance with such a trend, the conventional insertion type package is changed to the surface mounting type package for high density mounting. It has been transformed and has made a lot of progress in terms of efficiency.

The surface mount package, eg TSO
P (Thin Small Outline Package) etc. are very thin and weigh the conventional SOJ (Small Outline J-Be).
nd Package) is not as heavy as 1/3, but there are many problems in the manufacturing process such as package design and material selection.

In particular, there are problems that the adhesive force is reduced and package cracks are generated due to the formation of the interface between the lead frame and the molding resin.

That is, when the area of the die pad of the lead frame becomes larger than a certain size due to the increase in the size of the semiconductor chip due to the high integration, the bonding force between the die pad and the molding resin becomes poor. VPS (Va
Many defects occur during por phase soldering.

In the conventional surface mount type package having such a problem, various methods such as forming dimples and through holes in the lead frame are applied as a countermeasure against the package crack and the decrease in the adhesive force, and the mold is molded. The adhesive strength with resin is improved.

FIG. 4A is a plan view of a lead frame of a semiconductor device in which a dimple according to the prior art is formed.
FIG. 4B is a sectional view of a semiconductor device package using the lead frame of FIG. In such a lead frame for a semiconductor device, only a die pad 10 for mounting a semiconductor chip is shown. The internal leads and the external leads around the die pad 10 are not shown in the drawings for convenience of description.

On the die pad 10 of the semiconductor device lead frame, a large number of dimples 12 having a constant shape and depth are regularly arranged. These dimples 12 are formed on the bottom surface of the die pad 10 on which the semiconductor chip is mounted by a semi-etching process using a chemical substance after the lead frame is manufactured.

Further, as shown in FIG. 4B, the semiconductor chip 1 is bonded to the upper surface of the die pad 10 with an adhesive agent 14.
6 is bonded to the semiconductor chip 16 and the lead 1
8 is connected by a bonding wire 17 which is a fine metal wire such as gold Au. The entire structure is molded with the molding resin 19.

The above structure has a large number of dimples 1 formed on the bottom surface of the die pad 10 in the etching process.
The molding compound 2 is filled by 2 and the adhesive force between the die pad 10 and the mold resin 19 is somewhat strengthened.

However, in the method of manufacturing a semiconductor device having dimples formed by such an etching process, when the shape of the dimples 12 is incomplete or the size thereof is small, the mold resin 19 and the lead frame are bonded together. There is a problem of weakness.

In addition, since the method of manufacturing a semiconductor device cannot be manufactured by using a stamping lead frame, the semiconductor device can only be manufactured by using an etching lead frame, which is inferior in productivity to the stamping lead frame and has a high manufacturing cost, which is not suitable for mass production. There is a problem.

On the other hand, a method of forming a large number of through holes instead of dimples in a stamping lead frame which is excellent in mass productivity is also often used. Examples of the lead frames 20a and 20b having through holes 23a and 23b used in this method are shown in FIGS.
It is shown in (b).

In the method of manufacturing a semiconductor device in which the through holes 23a and 23b are formed by such stamping, package cracks are induced from the portions of the through holes 23a and 23b due to a decrease in adhesion between the semiconductor chip and the molding resin. Sometimes. In addition, in such a method, the adhesive flows from the die bonding process through the through holes 23a and 23b, and when the gap between the semiconductor chip and the die pad is narrow, the adhesive excessively overflows to the outside of the die pad. Therefore, there is a problem that reliability is deteriorated.

[0017]

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor device package which can improve the adhesive force between the lead frame and the molding resin.

Another object of the present invention is to provide a method of manufacturing a semiconductor device package which can prevent the adhesive from overflowing in the die bonding step.

[0019]

To achieve the above object, the present invention provides a lead frame having a plurality of leads on a die pad, and a semiconductor chip mounted on the die pad through an adhesive. And a plurality of bonding wires for connecting the semiconductor chip and the plurality of leads, and a mold resin for sealing the entire structure excluding a part of the plurality of leads. In the above, the lead frame is formed by forming a plurality of through holes formed in a mosaic shape in the die pad and a portion in which the plurality of through holes are arranged, lower than the upper surface of the die pad. And a step having a predetermined width on the outer peripheral surface of the swaging space.

In another method for manufacturing a semiconductor device package according to the present invention, a plurality of mosaic through holes are formed on the upper surface of the die pad by a stamping method, and the surfaces of these through holes are the surfaces of the die pad. Form a swaging space so that it will be more depressed,
A step of preparing lead frames each having a step formed at the same height as the through hole and the swaging space, and after this step, dotting on the step formed on the outer peripheral surface of the swaging space A step of dropping a suitable amount of conductive adhesive with a tool, a die bonding step of mounting the semiconductor chip on the upper surface of the die pad after this step, and a molding compound after this step to mold the die pad and the semiconductor chip. And a molding step.

[0021]

According to the package and the method of manufacturing the same having the above structure, since a plurality of through holes and swaging spaces are formed in the die pad, during the die bonding step of mounting the semiconductor chip on the upper surface of the die pad, The adhesive spreads over the entire top surface of the step while part of it flows to the swaging space side below the step, which prevents the adhesive from overflowing, improving the epoxy coverage, reducing the space on the bottom surface of the semiconductor chip, and reducing the leads. It is possible to improve the adhesive force between the frame and the molding resin.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor device package and a method of manufacturing the same according to the present invention will be described in detail below with reference to the accompanying drawings.

1 (a) and 1 (b) are drawings showing a lead frame used in a method for manufacturing a semiconductor device package according to the present invention. FIG. 1 (a) is a plan view of the lead frame. FIG. 1B is a sectional view taken along the line AA ′ of FIG.

As shown in FIG. 1A, in the lead frame used in the present invention, a die pad 30 to which a semiconductor chip is attached is arranged at the center and is supported by a fixing bar 31. A large number of leads 31a are arranged on both sides.

The die pad 30 has a large number of through holes 32 arranged in a mosaic pattern. Here, the through-hole 32 is not limited to a particular shape, as it can be modified into various shapes such as a circle and a polygon.

A swaging space 33 is formed in the entire portion where a large number of through holes 32 are formed.

The lead frame is manufactured by first stamping the die pad 30 into a large number of through holes 3.
2 is formed, and then the upper surface of the die pad 30 is pressed so that the entire large number of through holes 32 are sufficiently covered to form the swaging space 33.

The shape of the lead frame after the formation of the swaging space 33 is, as shown in FIG. 1B, the original die pad on the upper surface of the portion where a large number of through holes 32 are arranged in a mosaic shape. A swaging space 33 that is recessed and appears to be lower than the thickness of 30 is formed, and a step 35 having a predetermined width is formed on the outer peripheral surface of the swaging space 33.

FIG. 2 (a) is a schematic diagram of FIG. 1 according to this embodiment.
It is sectional drawing of the semiconductor package which used the lead frame for semiconductor devices shown to (a), (b), and FIG. 2 (b) is a principal part enlarged view of FIG. 2 (a).

As shown in FIG. 2A, a semiconductor chip 36 is attached with an adhesive 34 on a die pad 30 having a large number of through holes 32, a swaging space 33 and a step 35.
It is installed through the media. The semiconductor chip 36 is connected to the leads 38 by bonding wires 37 such as gold wires.

As described above, the lead frame to which the semiconductor chip 36 is bonded is molded with the molding resin 39 such as epoxy.

The semiconductor device having the above structure has the mold resin 3
Numerous through holes 32 in which 9 are arranged in a mosaic shape
Also, the entire swaging space 33 below the semiconductor chip 36 is filled up, and the lead frame and the molding resin 39 are forcibly bound together.

FIG. 3 shows a method of manufacturing such a semiconductor device.
A brief description will be given with reference to the joining process diagrams of FIGS.

First, referring to FIG. 3A, as described above, a large number of through holes 32 and the swaging space 3 are provided.
3. Prepare a lead frame on which a step 35 (FIG. 3C) is formed, and use a dotting tool on the upper part of the step 35 formed on the outer peripheral surface of the swaging space 33 to obtain an appropriate amount of conductivity. The adhesive 34 is dropped.

Here, as the adhesive 34, silver epoxy having silver Ag, which has excellent conductivity, as a main component is used. Further, as the adhesive 34, an epoxy-based or polyimide-based resin, or a synthetic resin added with silver, silica, an aluminum filter or the like for the purpose of improving conductivity, thermal conductivity, mechanical properties, etc. is also used. can do.

Next, the semiconductor chip 36 is squeezed to a constant load while applying heat to cure the adhesive using an oven or a high frequency oven. At this time, the adhesive 34 is squeezed and the entire surface of the upper portion of the step 35 is squeezed. Since a part of the adhesive flows to the swaging space 33 side below the step 35 while spreading over, the adhesive does not flow through the through hole or excessively overflow to the outside of the die pad 30 unlike the conventional case.

According to such a method, the step 3
Since the adhesive 34 is used only on the upper part of 5, the epoxy cover which is the adhesive 34 can be oriented.

That is, in the past, there were cases where the design of the dotting tool was incorrect and the epoxy coverage was not good, but as in this embodiment, the semiconductor chip 36 was used.
The thin space phenomenon can be prevented by the space formed between the bottom surface of the die pad and the die pad 30.

Therefore, it can be seen that the resulting structure after the die bonding step is as shown in FIGS. 3 (b) and 3 (c). Finally, after the die bonding step, molding is performed with a molding compound to complete the method for manufacturing a semiconductor device.

Needless to say, the present invention is not limited to this embodiment and various changes can be made without departing from the technical idea of the present invention.

[0041]

As described above, according to the semiconductor device package and the method of manufacturing the same according to the present invention, a plurality of through holes and a swaging space are formed in the die pad to improve the epoxy coverage. However, it is possible to prevent the adhesive from overflowing excessively, to reduce the space on the bottom surface of the semiconductor chip and to improve the adhesive force between the lead frame and the molding resin, which can enhance the mass productivity and improve the reliability. .

Further, according to the method for manufacturing a semiconductor device package of the present invention, in the die bonding step of mounting the semiconductor chip on the upper surface of the die pad after forming the plurality of through holes and the swaging space in the die pad. To
Since the adhesive spreads over the entire upper surface of the step and part of the adhesive flows toward the swaging space under the step, the adhesive can be prevented from overflowing.

[Brief description of drawings]

FIG. 1A is a plan view of a lead frame used in a method for manufacturing a semiconductor device package according to the present invention, and FIG. 1B is an AA ′ shown in FIG. It is sectional drawing which concerns on a line.

FIG. 2A is a sectional view of a semiconductor device package according to an embodiment of the present invention, and FIG.
It is a principal part enlarged view of (a).

FIG. 3 is a view for sequentially showing a process before and after die bonding during a manufacturing process of a semiconductor device package according to the present invention, and FIGS. 3 (a) and 3 (b) are plan views and FIG. 3 (c). Is a sectional view.

4A is a plan view of a lead frame in which dimples are formed, and FIG. 4B is a semiconductor device using the lead frame of FIG. 4A. FIG. 3 is a cross-sectional view of a package for a vehicle.

FIG. 5A and FIG. 5B are plan views of a lead frame for a semiconductor device in which a through hole according to a conventional technique is formed.

[Explanation of symbols]

 30 Die Pad 31a Lead 34 Adhesive 36 Semiconductor Chip 37 Bonding Wire 37 39 Mold Resin 32 Through Hole 33 Swaging Space 35 Step

Claims (8)

[Claims] 1. A lead frame having a plurality of leads on a die pad, a semiconductor chip mounted on the die pad via an adhesive, and a plurality of wires connecting the semiconductor chip and the plurality of leads. In a package for a semiconductor device including individual bonding wires and a mold resin that seals the entire structure excluding a part of the plurality of leads, a plurality of lead frames are formed on a die pad in a mosaic shape. A plurality of through holes, a swaging space formed by recessing a portion in which the plurality of through holes are arranged lower than the upper surface of the die pad, and a predetermined outer peripheral surface of the swaging space. A semiconductor device package comprising a step having a width. 2. The package for a semiconductor device according to claim 1, wherein the adhesive is applied to an upper portion of the step. 3. The adhesive is an epoxy resin or a polyimide resin added with silver, silica, or an aluminum filter.
The semiconductor device package described. 4. The package for a semiconductor device according to claim 1, wherein the shape of the through hole is circular or polygonal. 5. The package for a semiconductor device according to claim 1, wherein the mold resin is filled in the swaging space through the through hole. 6. The semiconductor device package according to claim 1, wherein the step has a role of preventing the adhesive from overflowing. 7. The package for a semiconductor device according to claim 1, wherein the lead frame is made of a stampable material. 8. A stamping method is used to form a plurality of mosaic through holes on an upper surface of a die pad, and a swaging space is formed such that the surfaces of the through holes are recessed from the surface of the die pad. A step of preparing a lead frame with a step formed at the same height as the hole and the swaging space, and after this step, using a dotting tool on the step formed on the outer peripheral surface of the swaging space And a suitable amount of conductive adhesive are removed, after this step the semiconductor chip is mounted on the upper surface of the die pad, the die bonding step, and after this step, the molding compound is used to mold the die pad and the semiconductor chip. A method of manufacturing a package for a semiconductor device, comprising: