JPH0622233B2 - Multilayer wiring formation method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for forming a multilayer wiring of a semiconductor device, and more particularly to a method for opening a contact hole when a polyimide resin film is used as an interlayer insulating film.

[Conventional technology]

Conventionally, this type of multilayer wiring formation method first forms an ohmic electrode 2 and a gate electrode 3 on a semiconductor substrate 1 as shown in FIG. 3 (a), and then shows it in FIG. 3 (b). As described above, the polyimide resin film 5 is spin-coated, the insulating film 9 is grown, and then the photoresist 8 is formed in a mask pattern. Then, as shown in FIG. 3C, the insulating film 9 and the polyimide resin are formed. After the film 5 was etched into a photoresist pattern to remove the insulating film 9, next, the upper wiring 7 was formed as shown in FIG. 3 (d).

[Problems to be solved by the invention]

Since the polyimide resin film is etched using the insulating film pattern as a mask, the multilayer wiring obtained by the above-described conventional method for forming a multilayer wiring expands the diameter of the contact hole from the dimension of the photoresist pattern by side etching, and In addition to the drawback that it is difficult to realize, there is a drawback that it is difficult to achieve flattening so that the surface becomes horizontal by completely absorbing the steep steps of the base electrode because the polyimide resin film is only spin coated. .

An object of the present invention is to eliminate the drawbacks of the conventional method, and to provide a method for forming a multilayer wiring in which the diameter of a contact hole is equal to that of a photoresist pattern and a flat polyimide resin film can be formed as an interlayer insulating film.

[Means for solving problems]

A method of forming a multilayer wiring according to the present invention comprises a step of forming an electrode on a semiconductor substrate and forming a first photoresist pattern on the electrode, and a step of forming an electrode and the first photoresist on the semiconductor substrate. A step of applying a first polyimide resin film, and a step of applying a second photoresist or a second polyimide resin film on the first polyimide resin film,
Etching back the first polyimide resin film and the second photoresist or the second polyimide resin film under the same etching rate to expose a part of the surface of the first photoresist; It includes a step of removing the photoresist and forming an opening and a step of forming an upper wiring.

〔Example〕

Next, the present invention will be described with reference to the drawings. FIG. 1 (f) is a sectional view of a multi-layer wiring formed according to an embodiment of the present invention. In FIG. 1 (f), 1 is a semiconductor substrate, 2 is an ohmic electrode, 3 is a gate electrode, 4 and 6 are photoresists, 5 is a polyimide resin film, and 7 is an upper layer wiring.

Further, FIGS. 1A to 1F are cross-sectional views of the multilayer wiring shown in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG. 1A, the ohmic electrode 2 and the gate electrode 3 are processed and formed on the semiconductor substrate 1. next,
As shown in FIG. 1B, the photoresist pattern 4 having the same size as the contact hole formed on the electrode 2 is formed.
To process. Next, as shown in FIG. 1C, the polyimide resin film 5 and the photoresist 6 are spin-coated and planarized. Next, as shown in FIG. 1D, the photoresist 6 and the polyimide resin film 5 are etched back under the condition that the etching rates of the polyimide resin film 5 and the photoresist 6 are equal to expose a part of the photoresist 4. Let After that, as shown in FIG. 1 (e), the photoresist 4 is removed under the condition that the etching rate of the photoresist 4 is sufficiently higher than that of the polyimide resin film 5 (for example, etching with a mixed solution of hydrazine and ethylenediamine), and then, By forming the upper layer wiring 7, the multilayer wiring shown in FIG. 1 (f) is obtained.

FIG. 2D is a cross-sectional view of a multilayer wiring formed by another embodiment of the present invention, in which 1 is a semiconductor substrate,
Reference numeral 2 is an ohmic electrode, 3 is a gate electrode, 4 is a photoresist, 5 is a polyimide resin film, 7 is an upper layer wiring, and 25 is a polyimide resin film. 2 (a) to 2 (d) are cross-sectional views of the multilayer wiring shown in the order of steps for explaining another embodiment of the present invention.

First, as shown in FIG. 2 (a), a pattern is formed on the electrodes with photoresist 4 as in the first embodiment, a polyimide resin film 5 is spin-coated, and a polyimide resin film 25 is spin-coated. Flatten. Next, as shown in FIG. 2B, the polyimide resin films 25 and 5 are etched,
The surface of the photoresist 4 is exposed. Next, as shown in FIG. 2C, the photoresist 4 is removed under the condition that the etching rate of the photoresist 4 is sufficiently faster than the etching rates of the polyimide resin films 5 and 25, and the upper wiring 7 is formed. 2 Obtain the structure of FIG.

In this embodiment, since the second polyimide resin film is applied on the first polyimide resin film, there is an advantage that the thickness of the electrode is large and the semiconductor surface having large unevenness can be made flat.

〔The invention's effect〕

As described above, according to the present invention, the first photoresist pattern formed on the electrode is covered with the first polyimide resin film, and the second photoresist or the second polyimide resin film is provided on the first polyimide resin film. Is spin-coated, and the second photoresist or the second polyimide resin film is removed under the condition that the etching rates of the second photoresist or the polyimide resin film are equal. By removing a part of the first photoresist under the condition that the etching rate of the first photoresist is sufficiently higher than the etching rate of the first polyimide resin film, the contact hole diameter is equal to the photoresist pattern, Moreover, there is an effect that a flat polyimide resin film can be formed.

[Brief description of drawings]

1 (a) to 1 (f) are sectional views of the multilayer wiring shown in order of process for explaining one embodiment of the present invention, and FIGS. 2 (a) to 2 (f).
(D) is a cross-sectional view of the multilayer wiring shown in order of steps for explaining another embodiment of the present invention, and FIGS. 3 (a) to (d) are for explaining an example of a conventional method for forming the multilayer wiring. FIG. 5 is a cross-sectional view showing the steps in the order of. 1 ... Semiconductor substrate, 2 ... Ohmic electrode, 3 ... Gate electrode, 4 ... First photoresist, 5 ... First polyimide resin film, 6 ... Second photoresist, 7 ...
Upper layer wiring, 8 ... Photoresist, 25 ... Second polyimide resin film.

Claims (1)

[Claims] 1. A step of forming an electrode on a semiconductor substrate and forming a first photoresist pattern on the electrode, and a first polyimide resin on the semiconductor substrate on which the electrode and the first photoresist are formed. A step of applying a film, a step of applying a second photoresist or a second polyimide resin film on the first polyimide resin film, and a step of applying the first polyimide resin film and a second photoresist or the second polyimide resin film. Etching back the second polyimide resin film under the same etching rate to expose a part of the surface of the first photoresist, removing the first photoresist and forming an opening, and an upper layer And a step of forming wiring, the method including the steps of forming a multilayer wiring.