JPH0621090A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enhance photoelectron resistance for a transistor or the like and provide a manufacturing method for a semiconductor device which has enhanced gate with stand voltage. CONSTITUTION:This manufacturing method comprises a process which forms a device isolation area 15 on a silicon board 11, a process which forms a gate oxide film 16 between the device isolation areas and a heat treatment process which heat-treats the surface of the silicon board 11 and the gate oxide film 16 by pulse-lasering from above the device isolation areas and the gate oxide film 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a gate oxide film in a transistor manufacturing process.

[0002]

2. Description of the Related Art As the integration of semiconductor devices progresses, for example, the gate length of MOS transistors becomes shorter, and the gate oxide film thickness tends to become thinner.

FIG. 3 shows an example of a sectional view of the structure of an nMOS FET (field effect transistor).

In FIG. 3, reference numeral 1 is P-type silicon (Si).
Substrates 2a and 2b are n-type source regions and drain regions, 3 is a gate oxide film, 4 is a channel stop region, 5 is a LOCOS oxide film (SiO ₂ ), 7 is a polysilicon (poly-Si) gate electrode, 8 is a PSG film, 9
Is aluminum wiring.

As described above, the nMOS having the structure shown in FIG.
In the FET, the electric field generated by the gate voltage and the voltage applied between the source electrode and the drain electrode is concentrated directly under the poly-Si gate electrode 7 on the drain region 2b side, that is, in the portion A of FIG.

[0006]

When such electric field concentration occurs, the kinetic energy of electrons flowing through the channel increases, and electrons (hot electrons) directly enter the gate oxide film to form traps in the gate oxide film. In addition, there is a problem that the probability of forming an interface state at the interface of the gate oxide film (SiO ₂ ) / Si substrate is increased and the current driving capability of the transistor is reduced by using it for a short time, that is, the life is shortened.

At present, a stress (mechanical stress) generated between the gate oxide film 3 and the Si substrate 1 is known as one of the causes for shortening the life of the transistor.

Therefore, in order to reduce the stress,
It is known that the gate oxide film 3 is annealed and nitrided in NH ₃ or N ₂ O gas, and as a result, hot electron resistance is improved.

However, in the above-mentioned nitriding anneal, when NH ₃ gas is used, the nitriding concentration becomes too high and the surface of the Si substrate 1 is warped, and when N ₂ O gas is used, the oxidation reaction proceeds simultaneously with the nitriding. The thickness of the oxide film 3 is also increased, which causes a problem against high integration.

Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor device having improved resistance to hot electrons such as a transistor and improved gate breakdown voltage.

[0011]

According to the present invention, there are provided the above-mentioned objects, a step of forming an element isolation region on a silicon substrate, a step of forming a gate oxide film between the element isolation regions, the element isolation region and a gate. The method for manufacturing a semiconductor device includes the step of irradiating a pulse laser from above the oxide film to heat treat the surface of the silicon substrate and the gate oxide film.

[0012]

According to the present invention, as shown in FIG. 2, since the pulse laser using XeCl or the like is irradiated from above the gate oxide film 16 formed on the P-type silicon (Si) substrate 11, short wavelength light is emitted. (XeCl: 308 nm) has a large power density (10 ⁷ W / cm ² ) at the time of irradiation and a short irradiation time (10 to 60 nsec), so that the gate oxide film 16
However, the irradiation energy is absorbed only on the very surface of the Si substrate 11, and the outermost surface (10 to 20 nm) of Si is melted for a short time of several 100 nsec.

Thus, in the pulse laser irradiation, SiO ₂
Since only the / Si interface can be heated to the melting point in a short time, pulse laser irradiation can relax the stress at the SiO ₂ / Si interface.

Further, by laser irradiation according to the present invention, Si
Since the surface of the substrate (interface with the gate oxide film) is modified with good flatness, concentration of electric field is alleviated, which contributes to improvement of gate breakdown voltage.

Therefore, the peripheral (surrounding) leak of the LOCOS oxide film 15 can also be reduced.

Conventional furnace annealing and RTA (Rapid
In the thermal annealing method, the entire Si substrate is heated, and dislocation defects and warpage are likely to occur in the substrate even when the temperature is below the melting point, but such defects do not occur in the present invention.

In the present invention, xenon chloride (XeCl), argon fluoride (ArF), krypton fluoride (KrF), xenon fluoride (XeF) or the like is used as the pulse laser.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

1 and 2 are process sectional views for explaining one embodiment of the present invention.

First, as shown in FIG. 1 (a), a thermal oxide film 12 is formed on a P-type silicon (Si) substrate 11, and silicon is selectively formed thereon as shown in FIG. 1 (b). A nitride film (Si ₃ N ₄ ) pattern 13 is formed.

Next, as shown in FIG. 1C, boron ions (B ⁺ ) are ion-implanted to form the channel stop region 1.
4 is formed.

Next, as shown in FIG. 1D, thermal oxidation is performed using the silicon nitride film pattern 13 as a mask to form a LOCOS oxide film 15 as an element isolation film. At this time, a thin oxide film 15a is also formed on the silicon nitride film pattern 13.

After that, as shown in FIG.
After selectively removing the oxide film 12 and the nitride film 13 between the OS oxide films 15, the gate oxide film 16 is formed by thermal oxidation again as shown in FIG. 2B.

Then, as shown in FIG. 2C, a pulse laser using XeCl was irradiated from above the gate oxide film 16.

The XeCl pulsed laser has a power density at the time of irradiation of about 10 ⁷ W / cm ² and an irradiation time of 10 to 60 n.
It was as short as sec, and the outermost surface 10 to 20 nm of the Si substrate 11 was melted only for a time of several 100 nsec.

The energy density of the pulse laser using this XeCl is preferably about 600 to 1200 mJ / cm ² . No effect of laser annealing with an energy density of less than 600 mJ / cm ^2, whereas 1200 mJ / cm ²
If the energy density exceeds, the surface of the P-type Si substrate 11 becomes coarse.

After irradiating the pulse laser as described above, the nMO having the structure shown in FIG.
SFET etc. can be manufactured.

[0028]

As described above, according to the present invention, Si
Since the stress at the interface of O ₂ / Si is relieved, the hot electron resistance of the semiconductor device such as a transistor can be improved and the peripheral leak of LOCOS can be reduced.

Moreover, the heat treatment (annealing) by laser irradiation of the present invention can simplify the process as compared with the conventional furnace annealing and RTA.

[Brief description of drawings]

FIG. 1 is a first-half process sectional view for explaining an embodiment of the present invention.

FIG. 2 is a sectional view of a second half process for explaining an embodiment of the present invention.

FIG. 3 is a structural cross-sectional view of an nMOS FET for explaining a conventional technique.

[Explanation of symbols]

 1,11 P-type silicon (Si) substrate 2a Source region 2b Drain region 3,13 Gate oxide film 4,14 Channel stop region 5,15 LOCOS oxide film 7 Polysilicon (poly-Si) gate electrode 8 PSG film 12 Thermal oxidation Film 16 Silicon nitride film pattern

Claims (1)

[Claims] 1. A step of forming an element isolation region on a silicon substrate, a step of forming a gate oxide film between the element isolation regions, and a pulse laser irradiation from above the element isolation region and the gate oxide film to the silicon substrate. And a step of heat treating the surface and the gate oxide film.