JPH06209566A - Protection method and protective circuit for mos type semiconductor element - Google Patents

Abstract

PURPOSE:To surely detect the abnormal state of a main MOS type semiconductor element and prevent the breakdown of when connecting, in series, a switching circuit comprising the main MOS type semiconductor element and a semiconductor element for detection connected in parallel with this, and using it as the component of a power converter. CONSTITUTION:This is a protective circuit for a MOS type semiconductor element being characterized by having connected the gate of a semiconductor element 12 for detection with a gate drive circuit 6-1 through an OFF-DELAY circuit 13, and the gate of a main MOS semiconductor element 10 with the gate drive circuit 6-1 through an ON-DELAY circuit 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a protection method and a protection circuit for a MOS type semiconductor device.

[0002]

2. Description of the Related Art A conventional technique will be described with reference to FIGS. In FIG. 4, 1-1 and 1-2 are main MOSs
In this case, an IGBT is used here as an example. 2-1 and 2-2 are DC power supplies, 3 is a reactor, and the circuit of FIG. 4 is a circuit generally called a half bridge circuit.

In the circuit as shown in FIG. 4, the main IGBT 1-
If 1 and the main IGBT 1-2 are turned on at the same time, the current will pass through the main IGBTs 1-1 and 1-2 without passing through the reactor 3, which is a load, and the power supply will be short-circuited. As shown in FIG. 6, O of the main IGBT 1-1
Between the N section and the ON section of the main IGBT1-2, a dead time section is provided in which neither the main IGBT1-1 nor the main IGBT1-2 is ON.

However, in spite of that, the main IGBT 1-
1, 1-2 are mistakenly turned on at the same time due to noise, etc.
There is a failure mode in which an overcurrent flows in T1-1 and 1-2. A conventional protection circuit for preventing element destruction due to this overcurrent will be described. FIG. 5 shows the main IGBT 1 of FIG.
It is an enlarged view of the (A) part surrounded by the collector terminal 7-1 of -1, and the emitter terminal 8-1.

The structure of the conventional protection circuit is such that the detection semiconductor element 4-1 (here, an IGBT is used as an example) and the detection resistor 5 as an example of the current detection for the energization current of the detection semiconductor element 4-1. -Connect one in series with the main I
It is configured to be connected in parallel to the GBT1-1. or,
The main IGBT 1-1 and the detection IGBT 4-1 are operated by the same gate from the gate drive circuit 6-1. When an overcurrent flows through the main IGBT1-1, the detection IG
An overcurrent proportional to BT4-1 also flows.

The overcurrent is read from the voltage of the detection resistor 5-1 to detect the short circuit overcurrent of the main IGBT 1-1, the gate signal is narrowed down to reduce the short circuit overcurrent, and finally the gate is detected. Protection is provided by stopping the signal and interrupting the short-circuit current.

[0007]

In a conventional protection circuit for a MOS type semiconductor device as shown in FIG. 5, the main IGBT 1-
1 is ON and the detection IGBT 4-1 is not firing, that is, when the protection circuit is not operating, the main I
The main IGBT1 from the overcurrent due to the ignition of GB1-1
-1 cannot be protected. Or main IGBT1-1 is ON
Before the detection, the IGBT 4-1 for detection is connected to the main IGBT1-1.
There is a safety problem in that it is impossible to prevent the main IGBT 1-1 from being damaged by overcurrent by detecting an abnormal state such as a short circuit breakdown.

The object of the present invention is to provide a main MO as shown in FIG.
Regarding the operation timing of the S-type semiconductor element and the detection semiconductor element, when the main MOS type semiconductor element is turned on, the detection semiconductor element is turned on early, and when the main MOS type semiconductor element is turned off, the detection semiconductor element is turned off late. Therefore, when the main MOS type semiconductor element is operating, the detection semiconductor element is always operating, or the main M type semiconductor element is operating.
An object of the present invention is to provide a protection method and a protection circuit for a MOS type semiconductor device, which can detect an abnormal situation in advance before the OS type semiconductor device operates.

[0009]

In order to achieve the above object, the present invention is directed to a semiconductor device 1 for detection as shown in FIG.
OFF-DDE the 2nd gate and the gate drive circuit 6-1.
The gate of the main MOS type semiconductor device 10 and the gate drive circuit 6-1 are connected to each other via the LAY circuit 13 and the ON-DEL is performed.
It is characterized by being connected via the AY circuit 14.

[0010]

When the main MOS type semiconductor device 10 is turned on, the main MOS type semiconductor device 10 has an ON-DEL
AY is applied, and the detection semiconductor element 12 turns on earlier than the main MOS type semiconductor element 10.

When the main MOS type semiconductor element 10 is turned off, an OFF-DEL is connected to the gate of the detection semiconductor element 12.
AY is applied, and the detection semiconductor element 12 is turned off later than the main MOS type semiconductor element 10. With the above-described operation, it is possible to prevent the conventional detection delay.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 2 is a circuit configuration diagram embodying the embodiment of the present invention shown in FIG.

In this embodiment, the OFF-DELAY circuit 13 is composed of a parallel circuit of a resistor 15 and a diode 16. Next, the ON-DELAY circuit 14 is composed of a parallel circuit of a diode 17 and a resistor 18.
In this embodiment, the main MOS type semiconductor device 10 is composed of the IGBT 1-1 and the detection semiconductor device 12 is composed of the IGBT 4-1.

Gate drive circuit 6-1 and detection IGBT 4
The -1 gate is connected via the OFF-DELAY circuit 13, and the gate drive circuit 6-1 and the main IGBT1-1 gate are connected to the ON-DELAY circuit 14.

When the main IGBT 1-1 of FIG. 2 is turned on, if a positive gate voltage is applied to the gate drive circuit 6-1 and the emitter terminal 7-1, the gate of the detection IGBT 4-1 is detected. The gate voltage applied between the emitters is OFF-DELA
The diode 16 of the Y circuit 13 performs a normal ON operation without delay, and the gate voltage applied between the gate and the emitter of the main IGBT 1-1 is changed by the resistor 18 of the ON-DELAY circuit 14 to the main IGBT 1-. Delay the ON operation of 1. As a result, when the main IGBT1-1 turns on, O
With the N-DELAY circuit 14, the detection IGBT 4
1 is turned on before the main IGBT 1-1.

Next, when the main IGBT 1-1 is turned off, a negative gate voltage is applied to the gate drive circuit 6-1 and the emitter terminal 8-1, and the main IGBT 1-1 turns on-D.
The diode 17 of the ELAY circuit 14 performs a normal OFF operation without delay, and the detection IGBT 4-1 is turned off.
The OFF operation is delayed by the resistor 15 of the FF-DELAY circuit 13.

As a result, the main IGBT 1-1 is turned off.
When operating, the OFF-DELAY circuit 13
The main IGBT1-1 is OF before the detection IGBT4-1
F

Due to the above operation characteristics, the main IGBT 1-1
Since the detection IGBT 4-1 is always operating during operation, there is no detection delay and the overcurrent flowing in the main IGBT 1-1 can be detected reliably, and the main IGBT is protected by the protection operation such as the gate diaphragm.
The effect that the BT1-1 can be reliably protected is obtained.

In the above description, the main IGBTs 1-1, 1-
2 has been described as a single element, but the main IGBTs 1-1, 1
The same effect can be obtained when a plurality of -2 are connected in series or in parallel.

In addition, ON-DELAY and OFF-DELA
The Y circuit may be physically formed as a separate circuit from the main IGBT1-1 or the detection IGBT4-1, or the main IGBT1-1-
The same effect can be obtained by manufacturing 1 or the detection IGBT 4-1 on the same semiconductor pellet or in the same semiconductor package.

[0021]

As described above, according to the present invention, the detection semiconductor element is always in the ON state during the operation of the main MOS semiconductor element, and the main MOS semiconductor from the overcurrent generated by the detection delay is generated. The element can be protected surely and the main MO
Before the operation of the S-type semiconductor element, the remarkable effect that the abnormal state can be detected by the detecting semiconductor element in advance and the main MOS type semiconductor element can be prevented from being destroyed by overcurrent or the like is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a circuit configuration diagram showing a specific example of FIG.

FIG. 3 is an operation timing chart for explaining the operation of the present invention.

FIG. 4 is a half bridge circuit showing an application example of a MOS semiconductor device.

FIG. 5 is a partial detailed view of FIG.

FIG. 6 is a timing diagram for explaining the principle of protecting a MOS semiconductor device.

[Explanation of symbols]

1-1, 1-2 ... Main IGBT 2-1, 2-
2 ... DC power supply 3 ... Reactor 4-1
… Detecting IGBT 5-1… Detecting resistor 6-1
... Gate drive circuit 7-1 ... Collector terminal 8-1
... Emitter terminal 10 ... Main MOS type semiconductor element 12 ... Detection semiconductor element 13 ... OFF-DELAY circuit 14 ... ON-DELAY circuit 15, 18 ... Resistor 16, 17 ... Diode

Claims (2)

[Claims] 1. A switching circuit in which a series circuit of a detection semiconductor element and a current detector for detecting a current flowing through the detection semiconductor element is connected in parallel to a main MOS semiconductor element between at least two sets of DC power supplies. A method for protecting a MOS type semiconductor element, characterized in that the detection semiconductor element is turned on earlier than the main MOS type semiconductor element and turned off later than the main MOS type semiconductor element. 2. A series circuit of a detection semiconductor element and a current detector for detecting a current flowing through the detection semiconductor element is connected in parallel to the main MOS semiconductor element, and the current detection semiconductor element and the main semiconductor element are connected. In a circuit in which at least two sets of switching circuits each having a gate driving circuit for supplying a gate signal to the MOS type semiconductor device at the same timing are connected between DC power supplies, each switching circuit is a gate driving circuit. OFF-DEL between the gate and the gate of the semiconductor device for detection
A protection circuit for a MOS type semiconductor device, characterized in that an ON-DELAY circuit is provided between the gate drive circuit and the gate of the main MOS type semiconductor device.