JPH06207970A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To provide a semiconductor integrated circuit device easy in dynamic burn-in test before shipping and low in cost. CONSTITUTION:A semiconductor integrated circuit device contains an ROM 2, RAM 3 and transits to a test mode for inspection. A control circuit 12 supplies a CPU 4 with bus hold signal when it receives a test signal from a test terminal 11 and cuts off the CPU 4 from an address bus 8. When a counter 13 receives an enable signal from the control circuit 12, it counts clock pulses supplied from clock pulse input terminal 15 and outputs the count value to an inner address bus 8. An incrementer 14 read out the data contained in the address specified by the output of the counter 13 from the above ROM 2, RAM 3, etc., and increases or decreases the read out data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device such as a one-chip microcomputer having a built-in circuit for a test before shipment.

[0002]

2. Description of the Related Art Generally, in the production of a semiconductor integrated circuit device such as a one-chip microcomputer, a test called a burn-in test is carried out before the shipment of the semiconductor integrated circuit device in order to remove the initial failure.
This test is usually accomplished by subjecting the device to elevated temperatures under bias. At this time, it is known that the effect is improved by performing so-called dynamic burn-in, in which burn-in is performed while the target device is operating.

Conventionally, a one-chip microcomputer has a structure as shown in FIG. 3, for example. That is, the one-chip microcomputer 1 described above
Includes a ROM storing a program, a RAM storing data, a CPU 4 executing a program stored in the ROM 2, an input / output interface circuit 5 communicating with an external circuit connected to an I / O port 6. . Data is transmitted between the CPU 4, the ROM 2, the RAM 3, and the input / output interface circuit 5 via the data bus 7. The address signal from the CPU 4 is sent to the ROM 2 and R via the address bus 8.
It is supplied to the AM 3 and the input / output interface circuit 5.

In the one-chip microcomputer 1 having the above-mentioned configuration, the dynamic burn-in test before shipment is performed by replacing the program stored in the ROM 2 with a pattern generator as shown in FIG. 9 is connected to the one-chip microcomputer 1, 1, ... To be tested, and the test program is sent from the pattern generator 9 to the one-chip microcomputer.
This is performed by supplying the computer 1 and causing each CPU 4 to execute the above-mentioned program for testing.

[0005]

In order to perform a dynamic burn-in test in the above conventional one-chip microcomputer, a dedicated burn-in test apparatus equipped with the above pattern generator 9 is used. In addition to the above, it is necessary to create a test pattern for the pattern generator 9, and means for monitoring that the one-chip microcomputer 1 is operating during the burn-in test. However, there is a problem that the cost of the pre-shipment test becomes high.

When the ROM 2 of the one-chip microcomputer 1 is a mask ROM, the operation of the one-chip microcomputer 1 is the RO.
Since it depends on the content of M2, it is necessary to create a test pattern for each ROM code, which further increases the cost of the pre-shipment test, and when the data bus for the test is not output outside the chip, There was also a problem that test patterns could not be created.

Further, the one-chip microcomputers 1, 1, ... Under test connected to the pattern generator 9 receive the common test pattern from the pattern generator 9 and are subjected to the burn-in test. Therefore, there is a problem that different types of semiconductor integrated circuits cannot be burn-in tested at the same time.

An object of the present invention is to provide a dynamic
It is an object of the present invention to provide a semiconductor integrated circuit device which is easy to burn-in test and has a low cost before the shipping test.

[0009]

In order to achieve the above object, the invention according to claim 1 is a semiconductor integrated circuit device having a storage means and a test mode for inspection, wherein a test mode transition signal is supplied. Control means for receiving the control signal to shift the semiconductor integrated circuit device to a test mode for inspection, receiving control signals from the control means, counting clock pulses, and outputting the count value to an internal address bus; Data updating means for reading the data of the address of the storage means designated by the output of the counting means and incrementing or decrementing the read data is provided.

The invention according to claim 2 provides the invention according to claim 1.
In the invention described in (3), a ring oscillator is provided, and the clock pulse is supplied from the ring oscillator.

Further, the invention according to claim 3 is characterized in that, in the invention according to claim 2, the frequency dividing output terminal of the counting means is provided.

[0012]

In the test mode, the address is designated by the count value output from the counting means for counting the clock pulses, and the contents stored in the designated address of the storage means are read out. Then, the contents read from the storage means are updated by the data updating means.

[0013]

According to the first aspect of the invention, in the test mode, the address of the storage means is designated by the count value of the clock pulse, and the contents stored at the designated address are read and read. Since the contents are updated to operate the semiconductor integrated circuit device, the internal state of the semiconductor integrated circuit device can be dynamically changed only by the clock pulse without using a program. Mask RO without using expensive test equipment such as
It is possible to easily carry out a pre-shipment test of not only the semiconductor integrated circuit device having the M therein but also a normal semiconductor integrated circuit device.

According to the second aspect of the invention, since the semiconductor integrated circuit device has the ring oscillator built therein, it is not necessary to supply a clock pulse from outside the semiconductor integrated circuit device, and the semiconductor integrated circuit device is not required. Operates only by supplying power, and the pre-shipment test of the semiconductor integrated circuit device can be performed more easily and at low cost.

Further, according to the invention of claim 3,
Since it has a frequency division output terminal of the counting means, by connecting a light emitting diode or the like to this frequency division output terminal,
The oscillation of the ring oscillator can be monitored very easily.

[0016]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows an embodiment in which the semiconductor integrated circuit device according to the present invention is applied to the one-chip microcomputer 1 described in FIG. Note that, in FIG. 1, parts corresponding to those in FIG. 3 are denoted by corresponding reference numerals, and redundant description will be omitted.

Each of the one-chip microcomputers 21 shown in FIG. 1 is the ROM described in FIG.
2, a RAM 3, an input / output interface circuit 5, a control circuit 12, a counter 13, and an incrementer 14.

When the test signal is input from the test terminal 11, the control circuit 12 activates the bus hold signal and supplies the bus hold signal to the CPU 4. When the CPU 4 receives this bus hold signal,
While being separated from the address bus 8, the counter 1
3 and the incrementer 14 are enabled.

The counter 13 counts the clock pulses supplied from the clock pulse input terminal 15,
The count value is output to the address bus 8 as an address designation signal. The data of either the ROM 2 or RAM 3 or the input / output interface circuit 5 read by the address designation signal supplied to the address bus 8 is incremented or decremented by the incrementer 14.

As a result, the RAM 3 and the input / output interface circuit 5 are read in all states, and R
The OM2 reads out the contents of all addresses, and the processing result of these contents by the CPU 4 is taken out from the I / O port 6 via the data bus 7 and the input / output interface circuit 5.

As can be seen from the above, in the one-chip microcomputer 21 of FIG. 1, the clock pulse is supplied to the clock pulse input terminal 15 and the test terminal 11 is supplied.
It can be seen that the dynamic burn-in test can be performed simply by supplying a test signal to the.

Next, another embodiment of the present invention is shown in FIG. The one-chip microcomputer 22 of this embodiment is the same as the one-chip microcomputer 21 described in FIG.
With a ring oscillator composed of 9,
The frequency dividing terminal of the counter 13 is pulled out to the outside, and the light emitting diode 16 is connected between the frequency dividing terminal and the ground.

By doing so, the pulse generator for generating the clock pulse is not required for the dynamic burn-in test, and the one-chip microcomputer 22 is supplied with power to the test terminal 11. A dynamic burn-in test can be performed very simply by supplying a test signal. Further, by the light emission of the light emitting diode 16, it is possible to easily confirm the oscillation of the ring oscillator.

In the above embodiment, the parts corresponding to those in FIG. 1 are designated by the corresponding reference numerals, and the duplicated description will be omitted.

The present invention can be applied to a semiconductor integrated circuit device including a one-chip microcomputer.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a semiconductor integrated circuit device according to the present invention.

FIG. 2 is a block diagram showing the configuration of another embodiment of the semiconductor integrated circuit device according to the present invention.

FIG. 3 is a block diagram showing an example of a configuration of a conventional semiconductor integrated circuit device.

4 is a dynamic circuit diagram of the semiconductor integrated circuit device of FIG.
It is explanatory drawing of a burn-in test.

[Explanation of symbols]

 2 ROM 3 RAM 4 CPU 5 Input / output interface circuit 6 Input / output port 7 Data bus 8 Address bus 11 Test signal input terminal 12 Control circuit 13 Counter 14 Incrementer 15 Clock pulse input terminal 16 Light emitting diode 17 Inverter 18 Inverter 19 Inverter 21 One Chip Micro Computer 22 One-chip Micro Computer

Claims (3)

[Claims] 1. A semiconductor integrated circuit device having built-in storage means and having a test mode for inspection, comprising: a control means for receiving the test mode transition signal and shifting the semiconductor integrated circuit device to a test mode for inspection. , A count means for receiving a control signal from the control means, counting clock pulses, outputting the count value to an internal address bus, and reading and reading data at an address of the storage means designated by the output of the count means. A semiconductor integrated circuit device comprising: a data updating unit that increments or decrements the issued data. 2. A semiconductor integrated circuit device according to claim 1, further comprising a ring oscillator, wherein the clock pulse is supplied from the ring oscillator. 3. The semiconductor integrated circuit device according to claim 2, further comprising a frequency division output terminal of said counting means.