JPH06187055A - Overcurrent protecting circuit - Google Patents

Abstract

PURPOSE:To provide the overcurrent protecting circuit which extremely reduces power consumption and improves the protecting function at the time load short- circuiting. CONSTITUTION:A counter 20 is set based on an overcurrent detecting transistor 11 for detecting an overcurrent corresponding to voltages at both of terminals of a current detecting resistor 4, a current suppressing transistor 15 is turned on, and an output transistor 3 is turned off. When the counter 20 reaches a prescribed count value, a count-up signal is generated, the current suppressing transistor 15 is turned off, and the output transistor 3 is turned on. Such an operation is repeatedly continued in a fixed cycle until the fault of an output circuit is recovered.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an output circuit section of an electronic device,
In particular, the present invention relates to an overcurrent protection circuit for protecting the output circuit unit or its external device against an overcurrent that may occur in an interface unit with an external device.

[0002]

2. Description of the Related Art As is well known, an interface is placed at the interconnection between the above-mentioned electronic devices and external devices. As this interface, power is often required to directly operate the external devices. An output circuit capable of handling For example, a program controller or a sequencer as an electronic device has its own or an attached output circuit unit, and it is necessary to operate a relay or a solenoid valve in an external device by this. Alternatively, in many cases, an electronic circuit incorporated in the sensor requires an output circuit section capable of directly driving an external solenoid valve, an alarm device or the like. In such an output circuit unit, an output transistor is provided for each operation or control channel so that the operation or control in the external device as described above can be performed based on a weak signal in the electronic circuit.

However, in an object operated or controlled by such an output circuit section, troubles may occur due to various causes, and wirings leading to the object often have a failure such as a short circuit. In the case of such a short-circuit accident, the output transistor in the output circuit is naturally overloaded and may be burnt out.Also, even if a short circuit does not result in a trouble, an overcurrent flows for a long time. The output transistor may be damaged and, at the same time, may be damaged within the operation or controlled object.

For this reason, conventionally, the output circuit section as an interface is often equipped with a function of protecting the output transistor in the output circuit from an overcurrent generated in the output circuit, and FIG. Here is an example of a typical protection circuit. In the figure, the internal circuit of the electronic device is simply indicated by reference numeral 1, and the output circuit 2 for one channel is shown on the right side of the one-dot chain line on the right side thereof. The main body of the output circuit 2 is the output transistor 3, which receives a command S for on / off or analog control from the drive transistor for driving the output circuit or the like in the internal circuit 1 at its base, and externally via a B power source (not shown). It generates a load current IL as an output signal to an operation or controlled object in the device. When an accident occurs in the target, this load current IL becomes excessive, and the load current is naturally the collector current of the output transistor 3, so the output transistor 3 may be damaged due to the excessive collector current. For this protection, a current detection resistor 4 is connected to the emitter side of the output transistor 3, and the voltage drop flowing in the resistor 4 is shown between the base and emitter of the protection transistor 5 shown on the left side thereof. Given. Therefore, when an overcurrent due to a failure flows through the current detection resistor 4, the transistor 5
The base potential of the output transistor 3 rises and the transistor 5 is turned on to bring the base potential of the output transistor 3 closer to the ground potential to reduce the base potential of the output transistor 3 to limit the load current IL to the allowable current value or less.

Even with such a conventional technique, overcurrent protection can be performed with a relatively simple circuit structure, but as can be seen from the above description, the continuous current continues to flow in the output transistor 3 until the failure is recovered. become. That is,
Now, let Vbe be the base-emitter voltage for turning on the transistor 5, Rs be the resistance value of the current detection resistor 4, and ILm be the limiting current of the load current IL when overcurrent protection is performed, ILm = Vbe / The limiting current of the value of Rs will flow continuously. The value of this limiting current is determined by the output transistor 3 or its load, but it is necessary to select a relatively low value for the transistor 3, especially in the case of a continuous current. On the other hand, the value of Vbe in the above equation is determined by the transistor 5 and cannot be reduced below a certain limit. Therefore, in order to reduce the value of the limiting current ILm, it is necessary to increase the value of the resistance value Rs for current detection. However, this resistance value is always inserted into the load current IL not only at the time of failure but also at the time of normal operation, so it is necessary to keep it as low as possible from this aspect.

[0006]

As described above, in the prior art, there is a dilemma between the demand for avoiding unnecessary power consumption in the output circuit and the demand for sufficient overcurrent protection. It was the current situation that we had to close our eyes and choose the perfect protection for some power consumption. In addition, in such a conventional technique, it is not desirable from the original purpose of protection to let a completely useless current flow to the output transistor or the load at the time of failure, regardless of power consumption in a normal state.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems of the prior art and to obtain an overcurrent protection circuit for use as described in the opening paragraph, which has minimal power consumption and a more complete protection function.

[0008]

Means for Solving the Problems In order to achieve the above object, the means of the present invention is such that a collector is connected to the base of an output transistor of an output circuit which generates a predetermined load current based on a command. A current suppression transistor that controls and suppresses the output current of the output transistor, a current detection resistor connected between the emitter of the output transistor and ground, and a base connected to a connection portion between the emitter and the current detection resistor. An overcurrent detection transistor that conducts when the detection resistor end voltage exceeds the base-emitter voltage, a flip-flop circuit set based on the output of the overcurrent detection transistor, and one output of the flip-flop circuit Start counting the clock pulses from the clock pulse generator and generate a count-up signal when the number reaches a predetermined number. A counter and the count-up signal reset the flip-flop circuit and are connected to one input of a NOR circuit, and the other output of the flip-flop circuit resets the counter and is input to the other input of the NOR circuit. And the output of the NOR circuit is connected to the base of the current suppressing transistor.

[0009]

In the circuit of the present invention, when the overcurrent occurs in the output circuit, the load current is immediately cut off or suppressed to an extremely small suppression current value as compared with the conventional limiting current. This suppression or interruption state continues until the time limit circuit (counter circuit) outputs a time end (count up) signal. At the time of generation of the time end (count up) signal, the suppression state is released and the output circuit is in the pre-control operation. Is returned to the state of. At this time, if the output circuit has recovered from the overcurrent state, this causes the output circuit to enter the normal state, but if the overcurrent state is still continuing, the above-mentioned current suppression operation and its release operation Is repeated until the output circuit state is restored to the normal state or the cause of the failure is artificially removed. At this time, although the overcurrent flows into the output circuit when the current suppression operation is canceled, the time until the current suppression operation starts again after the cancellation can be extremely short. And the power loss in the output circuit can be made extremely smaller than in the conventional protection circuit. In the case of the circuit of the present invention, even if the failure in the output circuit happens to be recovered during the current suppressing operation, the current suppressing operation is continued until the time limit end (count up) signal is issued from the time limit circuit including the counter circuit. However, if the time value is properly selected, there will be no problem for most applications.

[0010]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is an embodiment circuit of the present invention, and FIG. 2 is a waveform diagram of signals of main parts in the embodiment circuit. A digital counter circuit is used for the time circuit. The overcurrent detection transistor 11 conducts when the current value signal Vs from the current detection resistor 4 exceeds a predetermined value due to overcurrent,
As a result, its collector output becomes "0" and the flip-flop 17 which has been in the reset state until then is set via the inverter 16. The Q output of the flip-flop 17 becomes "1" by this setting, and the AND circuit 18 shown above is enabled to enable the clock pulse CP from the clock generator 19 to keep the counter 20 in the clear state until then. And start the timed operation by starting counting. At the same time as the flip-flop 17 is set, its QB output is also inverted and becomes "0", so that the NOR gate 21 which inputs the QB output satisfies the NOR condition and the output becomes "1". It is applied to the suppression transistor 15. Then, the current suppressing transistor 15 is turned on, and the output transistor 3 cuts off the load current IL after a small delay time ΔToff. This pattern is shown in FIG. 2 (a) for the current value signal Vs, and the waveform of the current suppression command Sl is shown in FIG. 2 (c). In the NOR gate 21, the input state before the NOR condition is satisfied receives "1" as the QB output of the flip-flop 17, while the count output COP from the counter 20 is of course the counter 20 is still in the clear state. As shown in FIG. 2 (b), it is "0". Therefore, the NOR condition is satisfied only after the QB output of the flip-flop 17 is inverted.

The load current IL becomes zero due to the cutoff operation of the output transistor 3, and therefore the current value signal Vs received by the overcurrent detection transistor 11 is also "0" as shown in the figure.
Therefore, the transistor is turned off and the set input of the flip-flop 17 returns to "0", but since the flip-flop 17 is in the set state, its output state does not change, and the NOR gate 21 causes the counter 20 to count-up output COP. Continues the current state until the
Continue to emit Sl. When the counter 20 as a time limit circuit counts up, that is, when a predetermined time period comes,
The counter 20 outputs a count-up output COP as shown in FIG.
The NOR condition of 1 is no longer satisfied, the current suppression command as its output is canceled, and the output transistor 3 closes the output circuit again after a delay time ΔToff of a small time. The count-up output from the counter 20 is the flip-flop 1
It is also applied to the reset input of 7 to reset the flip-flop 17, the Q output becomes "0" and the AND gate 18 is closed, and at the same time the QB output is received and the count 20 is cleared. The flip-flop 17 and the counter 20 return to a state in which they can receive the next overcurrent detection signal. Therefore, the waveform of the count-up output COP of the counter 20 becomes pulsed as shown in FIG. 2 (b) and returns to "0", but the flip-flop 17
Since the QB output of "1" is given to the NOR gate 21, the unsatisfied state of the NOR condition of the gate remains unchanged. After that, the current suppression and its canceling operation are repeated and continued in cycle T until the output circuit recovers from the failure at time tr.

In the description of this embodiment, the example in which the current suppressing transistor is made to act on the base circuit of the output transistor has been introduced, but the current suppressing circuit is not limited to such a mode, and various known circuits may be adopted. You can For example, the current suppressing circuit can be directly inserted in the output circuit, or the output transistor itself can function as the current suppressing transistor.

[0013]

According to the present invention, it is possible to extremely shorten the time until the current suppressing operation starts again after the overcurrent is detected and the time-out signal is issued from the time-out circuit from the counter and released. Since the influence of the time overcurrent on the output transistor and the load and the power loss in the output circuit can be made extremely small, the value of the average load current during the failure period in the output circuit can be greatly reduced. This reduces unnecessary power consumption in the output circuit at the time of failure, and has a significant power consumption reduction effect for devices such as sensors that are used continuously for a long period of time and devices such as sequence controllers with multiple output circuits. is there. Further, it is possible to prevent the power consumption from generating heat in the output circuit element such as the output transistor and the load side operation or the circuit to be controlled, and damaging the circuit element. As described above, the present invention has the effect of making the overcurrent protection function for the output circuit more completely closer than before, and also has the function of preventing the protection circuit device itself from being damaged by overcurrent.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment.

FIG. 2 is a waveform diagram of main signals in the embodiment circuit shown in FIG.

FIG. 3 is a circuit diagram showing an example of a conventional overcurrent protection circuit.

[Explanation of symbols]

1: Internal circuit for issuing a command to the output circuit 3: Output transistor as output circuit means 4: Current detection resistor as current detection means 5,15: Current suppression transistor constituting current suppression circuit 11: As overcurrent detection circuit Overcurrent detection transistor 20: Counter as a timed circuit element Sl: Current suppression command Vs: Current value signal

Claims (1)

[Claims] 1. A current suppressing transistor, a collector of which is connected to a base of an output transistor of an output circuit which generates a predetermined load current based on a command to control and suppress the output current of the output transistor, and an emitter of the output transistor. And a current detection resistor connected between the ground and a ground, and an overcurrent detection transistor which has a base connected to a connection portion between the emitter and the current detection resistor and which conducts when a voltage across the current detection resistor exceeds a base-emitter voltage. , A flip-flop circuit set on the basis of the output of the overcurrent detection transistor, and receiving one output of the flip-flop circuit to start counting clock pulses from a clock pulse generator and count up when a predetermined number is reached. A counter that generates a signal and the count-up signal are used to reset the flip-flop circuit. Connected to one input of the NOR circuit, the other output of the flip-flop circuit resets the counter and is connected to the other input of the NOR circuit, and the output of the NOR circuit suppresses the current. An overcurrent protection circuit characterized by being connected to the base of a transistor.