JPH06177171A - Charge transfer device - Google Patents

Abstract

PURPOSE:To increase a breakdown voltage between electrodes sufficiently without increasing the power consumption and to manufacture the device with high yield without damaging its characteristics even in the case of a CCD of a large number of pixels by forming a side wall consisting of insulating film or polycrystalline silicon film on side surface of a first gate electrode. CONSTITUTION:On a semiconductor substrate 1 formed on a first gate insulating film 2., first gate electrode 5 on whose upper surface an insulating film 4 is formed is formed. On a side surface of the first gate electrode 5, a side wall 6 consisting of insulating film or polycrystalline silicon film is formed. Further, after the first gate insulating film 2 except that the part right under th first gate electrode 5 is removed, a second gete insulating film 7 is formed on the semiconductor substrate 1 and a second gate electrode 8 is formed through the second insulating film 7. For example, a side wall consisting of a silicon nitride film 6 is formed, after which the second gate insulating film 7 consisting of silicon oxide film formed by a CVD method is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge transfer device,
In particular, it relates to a charge transfer device having a sufficiently high dielectric breakdown voltage between electrodes.

[0002]

2. Description of the Related Art Currently, a charge-coupled device (hereinafter referred to as CCD), which is a charge transfer device widely used in a solid-state image pickup device, has a large number of Ms electrically separated at extremely narrow intervals.
It has a structure in which OS capacitors are arranged, and a voltage pulse is applied to each MOS capacitor one after another.
It has a mechanism for transferring charges along the columns of the OS capacitors.

The most important point in forming such a row of MOS capacitors is that each electrode must be formed with an extremely narrow interval of about several hundreds nm, which is so narrow in the current photolithography technology. It is difficult to separate the electrodes at intervals.

Conventionally, the following method has been used to form an electrode array having such a structure. That is, as shown in FIG. 4, after the first gate electrode 11 of polycrystalline silicon is formed on the semiconductor substrate 9 via the gate insulating film 10 by the CVD method and the photolithography method, the surface of the first gate electrode 11 is heated. A silicon oxide film 12 of about 200 nm is formed by oxidation, and then a second gate electrode 13 of polycrystalline silicon is formed on the silicon oxide film 12 by CVD and photolithography. With the structure in which the electrodes of a plurality of layers are overlapped with each other with the thin insulating film interposed therebetween, several hundreds of nanometers can be provided by the photolithography technique at present.
Rows of gate electrodes can be formed at intervals of about m. Also the first
Since the conductive impurities are added to the gate electrode 11 at a high concentration, the thermal oxidation rate is high, and the gate oxide film and the interlayer insulating film having different thickness scales can be simultaneously formed by one thermal oxidation.

[0005]

SUMMARY OF THE INVENTION The conventional CCD described above.
The method of manufacturing uses a silicon oxide film formed by thermally oxidizing polycrystalline silicon as an interlayer insulating film of the polycrystalline silicon layer forming the first gate electrode and the second gate electrode. However, compared with a silicon oxide film formed by thermally oxidizing single crystal silicon, this silicon oxide film contains a large amount of unoxidized silicon and phosphorus added as a conductive impurity at a high concentration, and thus the film quality is extremely poor and the withstand voltage is low. It has the problem of being low. Further, since the thermal oxidation proceeds along the grain boundaries of the polycrystal, the unevenness of the surface of the electrode after oxidation becomes extremely large, which is one of the causes of the low dielectric strength between layers. Therefore, particularly in the case of a large-area CCD having a large number of pixels, there is a problem that insulation failure between electrodes is highly likely to occur and the manufacturing yield of the CCD is significantly reduced.

As a technique for solving the above-mentioned problems of the prior art, the first gate in which the insulating film 14 is laminated on the upper surface as shown in FIG. 5 (a) is disclosed in JP-A-2-292834. The side wall 16 of the insulating film is formed on the side surface of the electrode 15 by the CVD method and the etching method.
As shown in (b), there has been proposed a method of improving the inter-electrode breakdown voltage by forming the second gate electrode 17. Further, in JP-A-3-30439, as shown in FIG. 6, a silicon nitride film 23 is further laminated on the silicon oxide film 22 formed on the first gate electrode 21 by the CVD method, and the surface thereof is thermally oxidized. Thin silicon oxide film 24
There is proposed a method of improving the inter-electrode breakdown voltage by forming the first gate electrode 25 and then forming the second gate electrode 25.

However, in the case of the method disclosed in Japanese Patent Laid-Open No. 2-292834, when the side wall 16 of the insulating film is formed by etch back, the surface of the semiconductor substrate 19 which is to be the second gate must be used as an etching stopper. However, when this portion is excessively damaged and a solid-state image pickup device is produced, there is a problem that dark current increases and image scratches occur.

Further, in the case of the method disclosed in Japanese Patent Application Laid-Open No. 3-30439, since the second gate film and the interelectrode insulating film are formed at the same time, this insulating film cannot be made sufficiently thick. Therefore, there is a limit to the withstand voltage, and a large levitation capacity is provided between the electrodes, resulting in an increase in power consumption for driving the CCD.

According to the present invention, the dielectric breakdown voltage between the electrodes can be sufficiently increased in addition to solving the above problems, and even a CCD having a large number of pixels can be manufactured with a high yield without impairing its characteristics.
To provide a CD.

[0010]

A charge transfer device according to the present invention comprises: a semiconductor substrate on which a first gate insulating film is formed;
A first gate electrode having an insulating film laminated on the upper surface is formed, and a sidewall of an insulating film or a polycrystalline silicon film is formed on a side surface of the first gate electrode, except for a portion directly below the first gate electrode. Has a structure in which a second gate insulating film is formed on the conductor substrate after the first gate insulating film is removed, and a second gate electrode is formed through the second gate insulating film. ing.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.
FIG. 1 is a sectional view of a CCD transfer electrode according to the first embodiment of the present invention. 2 (a) to 2 (d), 3 (a) and 3 (b) are sectional views showing a procedure for forming the transfer electrode of the first embodiment of the present invention shown in FIG.

First, as shown in FIG. 2A, a gate insulating film 2 made of a silicon oxide film having a thickness of 70 nm and a polycrystalline silicon film 3 for a gate electrode are formed on a semiconductor substrate 1 and further polycrystalline silicon is formed. A silicon oxide film 4 is grown to a thickness of 200 nm on the film 3 by the CVD method. Next, as shown in FIG. 2B, the silicon oxide film 4 and the polycrystalline silicon film 3 are etched by photolithography to form a first gate electrode 5. Next, as shown in FIG. 2C, a silicon nitride film 6 is formed on the entire surface of the semiconductor substrate 1 by 100.
After that, the sidewalls of the silicon nitride film 6 are formed by etching as shown in FIG. 2D. At this time, since the silicon oxide film 4 and the gate insulating film 2 have an etching selection ratio of 2 or more with respect to the silicon nitride film 6, a film having a sufficient thickness is left. Next, as shown in FIG. 3A, after removing the gate insulating film 2 except the portion directly below the first gate electrode 5, a silicon oxide film is grown to a thickness of 70 nm on the entire surface of the semiconductor substrate 1 by the CVD method. Then, the second gate insulating film 7 is formed. Next, as shown in FIG.
Of polycrystalline silicon by photolithography and photolithography
The gate electrode 8 is formed.

By thus forming the transfer electrode array and forming the interlayer film between the electrodes as a CVD film having a sufficient thickness, the withstand voltage is remarkably improved, and even in a CCD having a large number of elements, the yield is stable and high. It can be manufactured.

7 (a) to 7 (d) are sectional views for explaining the manufacturing process of the second embodiment of the present invention. This embodiment is almost the same as the procedure described with reference to FIGS.
A polysilicon film 66 is formed instead of the silicon nitride film 6 formed in (c), and a sidewall of the polysilicon film is formed on the side wall of the first gate electrode 5 by etching back (FIG. 7C, (D)). Since the silicon oxide film 4 and the gate insulating film 2 have a selection ratio with respect to polysilicon of 10 or more, a film having a sufficient thickness remains after etching back. The subsequent steps are performed in the same manner as described with reference to FIGS. 2 and 3 to form the structure shown in FIG. In this embodiment, a 70-nm-thick second gate insulating film is provided as an insulating film between the first gate electrode 5 and the second gate electrode 8. However, since this film is formed by the CVD method, the withstand voltage is high. It is as excellent as 50 V or more and does not lower the yield.

Although polycrystalline silicon is used as the gate electrode material in FIGS. 2, 3 and 7, a laminated structure electrode of polycrystalline silicon and tungsten silicide or a single layer structure electrode of tungsten silicide is used as the gate electrode. You can also In this case, since the wiring resistance is significantly reduced, it is possible to prevent the occurrence of transfer failure due to rounding of the drive pulse even in a CCD requiring high-speed driving or a CCD having a large chip size, and further, the light transmittance of the electrode is significantly reduced. It has an advantage that the smear of the solid-state imaging device can be significantly reduced.

[0016]

As described above, according to the present invention, since the interlayer insulating film which is thicker than the gate insulating film can be formed by the CVD method, the characteristics of the CCD are not impaired and the power consumption is not increased. Moreover, there is an effect that the withstand voltage between the electrodes can be sufficiently improved.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a first embodiment of the present invention.

2 (a) to 2 (d) are cross-sectional views showing the first half of the manufacturing steps of the first embodiment of the present invention.

3 (a) and 3 (b) are cross-sectional views showing the latter half of the manufacturing process of the first embodiment of the present invention.

FIG. 4 is a sectional view of a conventional CCD.

5A and 5B are cross-sectional views showing a manufacturing process proposed to solve the problems of the conventional CCD.

FIG. 6 is a cross-sectional view showing another technique proposed to solve the problem of the conventional CCD.

7 (a) to 7 (d) are cross-sectional views showing the manufacturing process of the second embodiment of the present invention.

[Explanation of symbols]

 1,9 Semiconductor substrate 2,10 Gate insulating film 3 Polycrystalline silicon 4,12 Silicon oxide film 5,11 First gate electrode 6 Silicon nitride film 7 Second gate insulating film 8,13 Second gate electrode 66 Polysilicon film

Claims (1)

[Claims] 1. A first gate electrode having an insulating film laminated on an upper surface thereof is formed on a semiconductor substrate having a first gate insulating film formed thereon, and an insulating film or a multi-layered film is formed on a side surface of the first gate electrode. A side wall of a crystalline silicon film is formed, and after removing the first gate insulating film except a portion directly below the first gate electrode, a second gate insulating film is formed on the semiconductor substrate. A charge transfer device having a structure in which a second gate electrode is formed via a second gate insulating film.