JP2004200319A - Imaging device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a charge transfer device which causes no reduction of the yield even when the electrodes are reduced in thickness and micronized and is capable of transferring electric charges at high speed by reducing the resistance of the charge transfer electrodes. <P>SOLUTION: When the charge transfer electrodes are formed, an amorphous silicon film is formed by is doping impurities. The amorphous silicon film is turned to a polycrystalline silicon film by a thermal treatment, and the polycrystalline silicon film is used to make the electrodes low in resistance and uniform in film quality. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device and a manufacturing method thereof, and more particularly to formation of a charge transfer electrode.
[0002]
[Prior art]
A CCD solid-state imaging device used for an area sensor or the like includes a photoelectric conversion unit such as a photodiode and a charge transfer unit including a charge transfer electrode for transferring a signal charge from the photoelectric conversion unit. A plurality of charge transfer electrodes are arranged adjacent to each other on a charge transfer path formed on the semiconductor substrate.
[0003]
In recent years, in solid-state imaging devices, the number of imaging pixels has increased to more than gigapixels, but with the increase in the number of pixels, high-speed transfer of signal charge, that is, driving by high-speed pulses of the charge transfer electrode, There is a demand for miniaturization and low resistance of charge transfer electrodes.
[0004]
Conventionally, a polycrystalline silicon film doped with impurities has been used for the charge transfer electrode.
[0005]
However, conventional solid-state imaging devices are prone to short-circuit defects such as inter-electrode leakage due to miniaturization, and sufficient accuracy cannot be obtained by photolithography. The problem of becoming has become apparent.
[0006]
In addition, demands for miniaturization of charge transfer electrodes and low resistance of charge transfer electrode materials are increasing.
In such a demand, the thickness of the charge transfer electrode tends to be reduced, and as the polycrystalline silicon film becomes thinner, the breakdown voltage of the gate oxide film decreases.
[0007]
As a result of various investigations, the present inventors have discovered that these problems are caused by polycrystalline silicon crystal grains and grain boundaries.
[0008]
That is, in the case of a polycrystalline silicon film, the surface has irregularities due to crystal grains. Usually, in a charge transfer electrode using a polycrystalline silicon film, the surface of the polycrystalline silicon film is oxidized to form an interelectrode insulating film.
[0009]
When a silicon oxide film is formed by oxidizing the surface of the polycrystalline silicon film in this way, the stress caused by the volume expansion works due to the influence of the crystal grains, and the force is relaxed. Therefore, the surface of the silicon oxide film formed on the electrode surface Also, irregularities may be formed.
[0010]
In this case, when this protrusion approaches an adjacent electrode through the insulating film, a leak between the electrodes may occur and a short circuit failure may occur.
[0011]
In addition, as miniaturization progresses, there is a problem that short-circuiting between electrodes occurs due to deterioration of exposure accuracy due to irregular reflection in the photolithography process due to the unevenness of the electrode surface, electrode wiring becomes thin, resistance rises and wiring breakage is likely to occur. There is.
[0012]
In addition, there is a problem that it is difficult to apply a voltage evenly under the electrodes or between adjacent electrodes due to non-uniformity of crystal grain size when forming a polycrystalline silicon film and non-uniformity of impurity doping during phosphorus treatment. . For this reason, the potential of the transfer path is non-uniform and transfer failure is likely to occur.
[0013]
Further, when patterning a thin polycrystalline silicon film, an etching gas permeates from the grain boundary in the etching process, and the gate oxide film disappears in a region corresponding to the grain boundary of the polycrystalline silicon film constituting the gate electrode. Sometimes it became thinner. For this reason, the gate breakdown voltage decreases.
[0014]
Thus, the problem that the flatness of the electrode surface is lowered due to the influence of crystal grains has been a problem in the past, and various measures have been taken. For example, in the formation of a capacitor electrode of a DRAM, a method has been proposed in which the film formation process is divided into two steps, and the film is formed again at a reduced temperature, thereby flattening the surface and reducing the resistance (patent). Reference 1).
[0015]
[Patent Document 1]
JP-A-5-347258
[0016]
In this case, it is a polycrystalline silicon film formed on the insulating film, and since the base is not as thin as the gate oxide film, it is caused by the grain boundary of the polycrystalline silicon film as in the case of the charge transfer electrode. There is no problem such as reduced pressure resistance.
[0017]
In the case of a DRAM, there are problems in reducing the specific resistance of the capacitor electrode itself and reducing the irregularities on the surface of the capacitor electrode.
[0018]
Since the lower layer of the capacitor electrode is a thick interlayer insulating film, the impurity distribution at the interface with the gate oxide film existing in the lower layer did not become a problem as in the case of the charge transfer electrode.
[0019]
On the other hand, as described above, the solid-state imaging device has a problem that the gate oxide film becomes thin in the region corresponding to the grain boundary in the etching process, and the gate breakdown voltage is lowered.
[0020]
In particular, in the case of a multilayer electrode structure, the level difference becomes large. Therefore, in the case of an interlayer insulating film between the first layer electrode and the second layer electrode, unevenness is formed on the surface at the edge and the film thickness is also thin. In particular, a portion having a thin film thickness is likely to be formed at the edge, and an electric field is applied. Therefore, in particular, the problem of thinning of the interlayer insulating film due to the grain boundary is serious.
[0021]
[Problems to be solved by the invention]
As described above, the conventional solid-state imaging device has a problem that a short circuit is likely to occur in the oxide film due to fine unevenness caused by crystal grains on the surface of the charge transfer electrode.
In addition, even if a short circuit does not occur, the impurity concentration and film quality in the electrode are non-uniform, so the in-plane potential under the electrode is non-uniform, and the electric field strength applied between adjacent electrodes is likely to vary, resulting in characteristic deterioration. It was the cause.
In particular, in the case of a fine and thin charge transfer electrode, the breakdown voltage of the gate oxide film due to the grain boundary is serious.
The present invention has been made in view of the above circumstances, and an object thereof is to provide a charge transfer element capable of high-speed transfer without causing a decrease in yield even when an electrode is thinned and miniaturized.
[0022]
It is another object of the present invention to provide a method for manufacturing a solid-state imaging device that is easy to manufacture and highly reliable.
[0023]
[Means for Solving the Problems]
Therefore, in the present invention, when forming the charge transfer electrode, an amorphous silicon film is formed while doping impurities, and this is polycrystallized by heat treatment to form an electrode having a uniform film quality.
[0024]
That is, in the solid-state imaging device according to the present invention, in the solid-state imaging device including the photoelectric conversion unit formed on the surface of the semiconductor substrate and the charge transfer unit that transfers the charge generated in the photoelectric conversion unit, the charge transfer unit The charge transfer electrode includes a polycrystalline silicon film formed by annealing a doped amorphous silicon film.
[0025]
According to such a configuration, since the charge transfer electrode is configured to include a polycrystalline silicon film formed by annealing a doped amorphous silicon film, the crystal grain size and impurity concentration in the electrode are uniform, The voltage applied between the electrodes below and between adjacent electrodes is constant, and transfer defects do not occur. Transfer is possible even when thinning and miniaturization and high integration without thinning, withstand voltage failure due to loss of gate oxide film, etc. It is possible to provide a solid-state imaging device having excellent characteristics.
Further, since unevenness on the electrode surface is reduced, irregular reflection in the photolithography process is also reduced, and as a result, the exposure accuracy is improved and the reliability of the transfer electrode wiring is improved.
[0026]
The charge transfer electrode includes a first layer electrode including a polycrystalline silicon film formed by annealing a doped amorphous silicon film formed on the semiconductor substrate surface via a gate oxide film, and the gate oxide film. Two layers including a second layer electrode including a polycrystalline silicon film formed by annealing a doped amorphous silicon film formed so as to run on the first layer electrode via an interelectrode insulating film from above It has an electrode structure.
[0027]
According to such a configuration, even if the interelectrode insulating film is thinned, the first layer electrode and the second layer electrode are formed by crystallization of doped amorphous silicon, so that the impurity concentration is uniform and there are no irregularities due to crystal grains. Therefore, it is possible to provide a solid-state imaging device having good transfer characteristics without causing electric field concentration and without causing a short circuit or a transfer failure.
[0028]
Further, if a metal silicide film is formed on the surface of the doped amorphous silicon film, silicidation proceeds uniformly, so that local rise does not easily occur, and a short circuit between electrodes can be suppressed. Even if the thickness of the doped amorphous silicon film is further reduced, the resistance can be reduced and a uniform impurity concentration can be maintained. Therefore, the transfer characteristics can be further improved. In addition, since crystallization is performed during the heat treatment for silicidation, the number of man-hours is not increased.
[0029]
According to the method for manufacturing a solid-state imaging device of the present invention, a solid-state imaging device including a photoelectric conversion unit formed on the surface of a semiconductor substrate and a charge transfer unit that transfers charges generated by the photoelectric conversion unit. In the manufacturing method, the step of forming the charge transfer electrode of the charge transfer unit includes a step of forming a doped amorphous silicon film on the surface of the semiconductor substrate via a gate oxide film, and a step of forming the doped amorphous silicon film. And a crystallization step of polycrystallizing by heat treatment.
[0030]
According to such a configuration, the charge transfer electrode is formed by annealing the doped amorphous silicon film to form a polycrystalline silicon film, so that a doping step is not required, and crystal grains and impurity concentrations in the electrode are eliminated. Therefore, it is possible to provide a solid-state imaging device having a uniform transfer voltage under the electrodes and between adjacent electrodes and having excellent transfer characteristics. Further, it can be easily formed without increasing the number of man-hours.
[0031]
In addition, when crystallization is performed simultaneously with the oxidation step for oxidizing the surface of the doped amorphous silicon film, the number of man-hours is not increased.
[0032]
Desirably, if a metal film is formed on the doped amorphous silicon film and silicidation is performed simultaneously with crystallization, a charge transfer electrode having low resistance and high reliability can be obtained without increasing the number of steps. Can be obtained.
[0033]
Further, if the metal film remaining without being silicidized is selectively removed, and the metal silicide film is further annealed, crystallization is performed in these silicidation and annealing processes, so that it can be easily reduced. It becomes possible to obtain a charge transfer electrode having high reliability with resistance.
[0034]
Further, if titanium silicide is used as the metal silicide film, the resistance can be further reduced.
[0035]
More preferably, if cobalt silicide is used as the metal silicide film, it is possible to form a silicide film having a lower resistance without aggregation due to heat in the subsequent process.
[0036]
The metal silicide film may be nickel, palladium, platinum, or tantalum silicide.
[0037]
Note that this silicidation step is preferably heated to 690 to 800 ° C. in a nitrogen atmosphere.
Moreover, if the first annealing after the removal of the metal film that has not been silicided is insufficient, the silicide film can be reduced in resistance by heating to 800 ° C. or higher.
[0038]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
(First embodiment)
FIG. 1 shows a schematic configuration of the solid-state imaging device according to the first embodiment of the present invention. FIG. 1A is a schematic plan view showing the photoelectric conversion portion to the charge transfer electrode, and FIG. 1B is a cross-sectional view taken along the line AA in FIG.
As shown in FIG. 1, a plurality of photodiodes 30 are formed on the silicon substrate 1 to form a photoelectric conversion unit, and a charge transfer electrode 40 for transferring signal charges detected by the photodiodes is formed by a photo diode. Between the diodes 30, a meandering shape is formed. A charge transfer channel (not shown) through which a signal charge transferred by the charge transfer electrode 40 moves is formed to have a meandering shape in a direction intersecting with the direction in which the charge transfer electrode 40 extends. In FIG. 1A, the description of the interelectrode insulating film 3 formed near the boundary between the photodiode region and the charge transfer electrode 40 is omitted.
[0039]
As shown in FIG. 1B, a photodiode 30, a charge transfer channel (not shown), a channel stop region 31, and a charge readout region (not shown) are formed in the silicon substrate 1. An insulating film (hereinafter referred to as a gate oxide film) 2 is formed on the surface. On the surface of the gate oxide film 2, an interelectrode insulating film 3 made of a silicon oxide film and a charge transfer electrode 40 made of polycrystalline silicon films 4a and 4b formed by crystallizing doped amorphous silicon are formed. The interelectrode insulating film 3 is formed from one of the polycrystalline silicon films 4a and 4b, for example, from the side wall of the polycrystalline silicon film 4a.
[0040]
Above the solid-state imaging device, a light shielding film 50 is provided except for the photodiode 30, and a color filter 60 and a microlens (not shown) are further provided. An insulating material is filled between the charge transfer electrode 40 and the light shielding film 50 and between the light shielding film 50 and the color filter 60. Since the charge transfer electrode 40 and the interelectrode insulating film 3 are the same as those of the prior art except for the charge transfer electrode 40 and the interelectrode insulating film 3, description thereof will be omitted. Further, FIG. 1 shows a so-called honeycomb-structured solid-state imaging device, but it goes without saying that the present invention can also be applied to a square lattice type solid-state imaging device.
[0041]
Next, the manufacturing process of this solid-state image sensor will be described with reference to FIG. First, as shown in FIG. 2A, a 15 nm thick silicon oxide film, a 50 nm thick silicon nitride film, and a 10 nm thick silicon oxide film are formed on the surface of an n-type silicon substrate 1. A gate oxide film 2 having a three-layer structure is formed. Subsequently, on this gate oxide film 2, SiH _Four And PH _Three And mixed gas (flow rate ratio: SiH _Four : PH _Three = 1000: 91.1, where PH _Three Is 1% N ₂ A doped amorphous silicon film 4as having a thickness of 0.4 μm is formed by a low pressure CVD method using a dilution gas as a reactive gas. The substrate temperature at this time shall be 500-600 degreeC. Subsequently, a silicon oxide film 6 to be an etching stopper layer is formed by a low pressure CVD method, and a resist is applied to the upper layer so as to have a thickness of 0.8 to 1.4 μm.
[0042]
Then, exposure is performed using a desired mask by photolithography, and development and washing are performed to form a resist pattern R having a pattern width of 0.5 μm.
[0043]
Thereafter, as shown in FIG. 2B, HBr and O ₂ Then, the doped amorphous silicon film 4as and the silicon oxide film 6 are selectively removed by etching using the resist pattern R as a mask and the gate oxide film 2 as an etching stopper by reactive ion etching using a mixed gas of R is peeled off. Here, it is desirable to use an etching apparatus such as ECR or ICP.
[0044]
Subsequently, as shown in FIG. 2 (c), RTA at 900 ° C. for 30 seconds is performed in an oxygen atmosphere, and TEOS and O 2 are obtained by thermal oxidation. ₂ A second insulating film 3a made of a silicon oxide film having a film thickness of 30 nm is formed by a low pressure CVD method using a mixed gas. At this time, the doped amorphous silicon film 4as is crystallized to become a polycrystalline silicon film 4a.
[0045]
Then, as shown in FIG. 2D, the etching is advanced only in the vertical direction by anisotropic etching so that the second insulating film (silicon oxide film) 3a is left only on the side wall of the polycrystalline silicon film 4a. Etching is performed to form an interelectrode insulating film 3 made of a sidewall insulating film.
[0046]
Next, as shown in FIG. 2E, SiH is formed in the same manner as the doped amorphous silicon film forming step. _Four And PH _Three A doped amorphous silicon film 4bs having a film thickness of 0.4 to 1.4 μm is formed by a low pressure CVD method using a mixed gas of
[0047]
Then, as shown in FIG. 2F, the surface of the substrate is polished by CMP, and further etched by chemical etching until the upper surface of the interelectrode insulating film 3 is exposed, so that the polycrystalline silicon film 4a serving as a charge transfer electrode is obtained. And the doped amorphous silicon film 4bs is separated individually. Then, RTA at 900 ° C. for 30 seconds is performed to crystallize the doped amorphous silicon film 4bs to form a polycrystalline silicon film 4b.
Then, an insulating film, a light shielding film, and the like are formed on this upper layer to obtain a solid-state imaging device as shown in FIG.
[0048]
According to this method, an amorphous silicon film is formed while doping impurities, and this is polycrystallized in a subsequent heat treatment step to obtain a doped polycrystalline silicon film. It becomes possible to form a charge transfer electrode made of a polycrystalline silicon film.
[0049]
Further, even when the charge transfer electrode is thin, the gate oxide film is not damaged due to the grain boundary, and the interface between the gate oxide film and the doped amorphous silicon film is flat and uniform.
Therefore, it is possible to improve transfer characteristics.
[0050]
In addition, since it is crystallized in a heating process for thermal oxidation without passing through a special heat treatment process, it is possible to form a fine and highly reliable solid-state imaging device without increasing the diffusion length.
Furthermore, the number of man-hours can be reduced, and the manufacturing cost can be reduced and the yield can be improved.
[0051]
(Second Embodiment)
Next, a second embodiment of the present invention will be described. In the first embodiment, the conductive layer of the charge transfer electrode is formed of one polycrystalline silicon film formed by crystallizing a doped amorphous silicon film. However, in the second embodiment, the charge transfer electrode has a low conductivity layer. In order to achieve resistance, a two-layer structure in which a conductive film containing metal silicide is formed on the surface side is employed. Here, the amorphous silicon film is crystallized into a polycrystalline silicon film simultaneously with silicidation.
[0052]
FIG. 3 shows a schematic configuration of the solid-state imaging device according to the second embodiment of the present invention. FIG. 3 is a cross-sectional view corresponding to FIG. 1A, in which a conductive film such as a titanium silicide film 5S is stacked on the polycrystalline silicon films 4a and 4b. As the conductive film, tungsten, tantalum, titanium, molybdenum, nickel, a silicide thereof, aluminum, or the like may be used. The other parts are the same as those of the solid-state imaging device of FIG.
[0053]
FIGS. 4A to 4H show the process diagrams. FIGS. 4A to 4E show the process diagrams of the first embodiment. FIGS. Since it is the same as that, the description is omitted.
[0054]
Thereafter, as shown in FIG. 4 (f), HBr and O ₂ The surfaces of the polycrystalline silicon film 4a and the doped amorphous silicon film 4bs are removed by reactive ion etching using a mixed gas with the above, and the top of the interelectrode insulating film 3 is exposed to a position lower than the upper end surface. Then, as shown in FIG. 4G, a titanium or cobalt film 5 having a film thickness of 600 to 800 nm is formed on the polycrystalline silicon film 4a and the doped amorphous silicon film 4bs by sputtering. The substrate temperature at this time was 0-500 degreeC. At this time, there is no unevenness on the surface, and the surface is flat.
[0055]
Then, silicidation is performed by RTA at 900 ° C. for 30 seconds, and the doped amorphous silicon is crystallized. As a result, the doped amorphous silicon film becomes a polycrystalline silicon film. Then, the interface between the polycrystalline silicon films 4a and 4b and the titanium film 5s is silicided.
[0056]
Subsequently, as shown in FIG. 4 (h), SC-1 (NH _Four OH: H ₂ O ₂ : H ₂ O = 1: 1: 5) The titanium film 5s remaining on the interelectrode insulating film 3 without being silicided is removed by wet etching (35 ° C., 10 minutes).
[0057]
In this way, the charge transfer electrodes made of the polycrystalline silicon films 4a and 4b and the titanium silicide film 5 are individually separated. Then, an insulating film, a light shielding film, and the like are formed on this upper layer to obtain a solid-state imaging device as shown in FIG. In this case, the light shielding film can be omitted by setting the thickness of the titanium film 5 so as to obtain a sufficient light shielding effect.
[0058]
(Third embodiment)
Next, a third embodiment of the present invention will be described. In the first and second embodiments, the crystallization of doped amorphous silicon is performed in the silicon oxide film forming step and the silicidation step, but may be performed as a separate step. Even when ion implantation is performed on the polycrystalline silicon film, it can be seen that the number of man-hours does not increase as a separate process even if a drive-in heat treatment at 900 to 950 ° C. for about 30 minutes is required.
[0059]
In this way, it is possible to form a charge transfer electrode that is easy to manufacture and highly reliable.
[0060]
In the above-described embodiment, the single-layer electrode structure has been described. However, the present invention can also be applied to a structure in which the second-layer electrode runs on the first-layer electrode, and the heat treatment for crystallization is performed at the same time later. Therefore, it is possible to form a highly reliable electrode without increasing the number of steps.
[0061]
(Fourth embodiment)
Next, a method for manufacturing a solid-state imaging device having a two-layer electrode structure will be described as a fourth embodiment of the present invention.
[0062]
This solid-state imaging device is formed in the same manner as that described in FIG. 1 of the first embodiment except that the structure of the charge transfer electrode has a two-layer structure.
[0063]
That is, as shown in the sectional view of the main part in FIG. 5 (e), the first composed of the polycrystalline silicon 4a arranged on the surface of the silicon substrate 1 on which the desired element region is formed with the gate oxide film 2 interposed therebetween. A charge transfer electrode 4 having a two-layer structure including a layer electrode and a second layer electrode made of polycrystalline silicon 4b formed so as to run on the gate oxide film and on the first layer electrode. The end portions of the layer and the second layer electrode are separated through the sidewall insulating film 6, and a titanium silicide film 5S is formed in a self-aligned manner on the surface of the first layer and the second layer electrode exposed from the sidewall insulating film 6, In order to reduce the resistance of the charge transfer electrode, a solid-state imaging device free from defective withstand voltage or short circuit is formed.
[0064]
This gate oxide film is constituted by a three-layer structure film of a silicon oxide film 2a, a silicon nitride film 2b, and a silicon oxide film 2c.
[0065]
In this solid-state imaging device, the charge transfer electrode 4 having a two-layer structure arranged on the surface of the silicon substrate 1 on which a desired element region is formed via the gate oxide film 2 has a first layer having a sidewall insulating film. Further, a titanium film is formed on the second layer electrode, silicided, and the titanium film remaining without being silicided is selectively removed, whereby a metal silicide layer is formed in a self-aligning manner.
[0066]
The interelectrode insulating film 3 is formed by photolithography after the first layer electrode is formed.
[0067]
Next, the manufacturing process of this solid-state image sensor will be described.
First, a silicon oxide film having a thickness of 15 nm, a silicon nitride film having a thickness of 50 nm, and a silicon oxide film having a thickness of 10 nm are formed on the surface of the n-type silicon substrate 1 to form a gate oxide film 2 having a three-layer structure. To do.
[0068]
Subsequently, on the gate oxide film 2, PH _Three And SiH diluted with He _Four A first amorphous silicon film 4as having a thickness of 0.4 μm is formed by a low pressure CVD method using as a reactive gas. The substrate temperature at this time shall be 500-600 degreeC.
[0069]
Subsequently, a positive resist is applied to the upper layer so as to have a thickness of 0.5 to 1.4 μm.
[0070]
Then, exposure is performed using a desired mask by photolithography, and development and washing are performed to form a resist pattern having a pattern width of 0.3 to several μm.
[0071]
After this, HBr and O ₂ The first polysilicon film is selectively removed by etching using the resist pattern as a mask by reactive ion etching using a mixed gas with the gate oxide film 2 as an etching stopper, and then the resist pattern is peeled and removed. A single layer electrode is formed. Here, it is desirable to use an etching apparatus such as ECR or ICP.
[0072]
Subsequently, an interelectrode insulating film 3 made of a silicon oxide film having a thickness of 80 nm is formed on the surface of the first layer electrode by thermal oxidation.
[0073]
In this way, the interelectrode insulating film 3 is formed.
[0074]
Next, PH3 and SiH _Four A second layer amorphous silicon film 4bs having a film thickness of 0.4 to 0.7 μm is formed by a low pressure CVD method using gas, and patterned by photolithography in the same manner as in the case of the first layer amorphous silicon film. Form.
[0075]
Then, as shown in FIG. 5A, a silicon oxide film 6 is formed on this upper layer by a low pressure CVD method.
[0076]
Then, as shown in FIG. 5 (b), the amorphous silicon films of the first and second layer electrodes are exposed by anisotropic etching, and the silicon oxide film 6 is formed on the side walls of the first and second layer electrodes. Leave behind. Note that the width of the sidewall insulating film can be controlled by the thickness of the silicon oxide film, and as the thickness of the silicon oxide film is increased, the width of the sidewall insulating film is increased and the short-circuit margin between adjacent electrodes is increased. Can do. When the thickness of the silicon oxide film on the first and second electrodes is 160 nm, the width of the sidewall insulating film is 160 nm. Also, the doped amorphous silicon film becomes a polycrystalline silicon film in this thermal oxidation process. This silicon oxide film is formed by a low pressure CVD method, but may be a thermal oxide film or a laminated structure of a thermal oxide film and a silicon oxide film formed by the CVD method.
[0077]
Then, as shown in FIG. 5C, a titanium film 5 having a film thickness of 50 to 300 nm is formed on the polycrystalline silicon films 4a and 4b constituting the first and second layer electrodes by sputtering or the like. To do.
[0078]
Subsequently, as shown in FIG. 5D, RTA (rapid heat treatment) at 760 ° C. for 90 seconds is performed, and the interface between the polycrystalline silicon films 4a and 4b as the first and second layer electrodes and the titanium film 5 is performed. At the same time, titanium silicide 5S is formed. Note that the heating temperature for silicidation is optimal at 760 ° C. for polycrystalline silicon doped with phosphorus to a degenerate concentration. At this time, the reaction between the polycrystalline silicon and titanium occurs only on the first and second electrodes, and titanium on the photodiode covered with the sidewall insulating film 6 and on the peripheral circuit covered with the insulating film It remains unreacted. However, this titanium silicide has a C-49 crystal structure and has a relatively high specific resistance as a charge transfer electrode composed of the first and second layer electrodes.
[0079]
Thereafter, as shown in FIG. 5 (e), SC-1 treatment using a mixed solution of ammonia and hydrogen peroxide solution is performed, the unreacted titanium film is removed, and an annealing process is performed at 800 ° C. for 90 seconds. The resistance of titanium silicide is reduced, and a charge transfer electrode having a two-layer structure of a polycrystalline silicon film and titanium silicide is formed.
[0080]
Then, after forming a P-TEOS film with a thickness of 100 nm on this upper layer, a BPSG film with a thickness of 700 nm is formed, and reflowed at 850 ° C. and planarized to obtain the insulating film 70. Thereafter, a light shielding film, a color filter 50, a microlens 60, and the like are formed to obtain a solid-state imaging device as shown in FIG.
[0081]
According to this method, the doped amorphous silicon film constituting the first layer and the second layer electrode can be polycrystallized using heat treatment in the thermal oxidation step and the silicidation step, and the impurity concentration is uniform. In addition, a polycrystalline silicon film having high crystallinity can be obtained.
[0082]
Further, a sidewall insulating film is formed on the sidewalls of the doped amorphous silicon film constituting the first layer and second layer electrodes, and a titanium silicide film is formed on the surface of the doped amorphous silicon film exposed from the sidewall insulating film. Therefore, no breakdown voltage failure or short circuit occurs. Accordingly, it is possible to obtain a fine and highly reliable solid-state imaging device.
[0083]
Further, it is not necessary to pattern a metal film that has a high surface reflectance and is difficult to process due to halation or the like. In other words, the doped amorphous silicon film pattern is formed and the edge is covered with a sidewall insulating film without reducing accuracy due to the influence of surface reflection, and silicidation occurs only on this pattern, thereby forming a metal silicide film. By selectively forming the charge transfer electrode, a charge transfer electrode having a two-layer structure can be formed in a self-aligned manner. In addition, since the charge transfer electrode having a two-layer structure is polycrystallized and silicided in one silicidation process, the number of high-temperature processes can be reduced. Therefore, it is possible to form a solid-state imaging device having a highly accurate and reliable charge transfer electrode without mask displacement.
[0084]
In addition, when a photodiode is formed, if metal is touched when the silicon surface is exposed, contamination may be caused. In this example, the metal film and the heat treatment for silicidation are required only once, and RTA is used. So it takes a short time. Therefore, even when the electrodes are formed after the formation of the photodiode, a high-quality solid-state imaging device can be formed with little displacement of the joint surface due to the extension of the diffusion length. Therefore, contamination of the photodiode by metal ions can be prevented, and reliability can be improved.
[0085]
For n-type polycrystalline silicon with a thickness of 400 nm, the sheet resistance is usually 20 Ω / cm. ² However, in this embodiment, when titanium having a thickness of 120 nm is formed by sputtering, a transfer electrode having a width of 1 μm is 2 Ω / cm. ² It was possible to greatly reduce the resistance.
[0086]
In the honeycomb CCD of the present embodiment, the transfer electrode can be configured with a two-layer electrode structure even in the all-pixel readout method, and the longitudinal direction of the electrode can be achieved without the silicide layer being interrupted by the transfer electrode of another phase. Can be formed continuously. Therefore, the resistance can be reduced over the entire length of the transfer electrode in the longitudinal direction. In addition, since the transfer electrode is uniformly silicided, potential fluctuations in the charge transfer path due to changes in the work function of the electrode material do not occur, and the resistance of the electrode in the non-silicided portion may increase. Absent.
[0087]
In the above embodiment, the doped amorphous silicon is once made into a C49 structure by RTA at about 760 ° C. for about 90 seconds, SC-1 treatment is performed, the unnecessary portion of the titanium film is removed, and then heat treatment at about 800 ° C. for about 90 seconds. Although the process of reducing the resistance by forming the C54 structure is used, the titanium silicide film having the C54 structure may be formed at a time by setting the heat treatment temperature for silicidation to 800 ° C. The titanium silicide film thus formed is stable and has a low resistance (specific resistance: 15 Ω · cm).
[0088]
Further, no increase in the transfer electrode due to the titanium silicide aggregation reaction was observed. This is considered to be because it is formed without a high-temperature and long-time heat treatment step.
[0089]
Further, in the above-described embodiment, sidewall insulating films are formed at the ends of the first layer and second layer electrodes, and silicidation is selectively performed only on the surfaces of the first layer and second layer electrodes exposed from the sidewall insulating films. Therefore, even if a titanium silicide film having a C54 structure is formed at a time by setting the heat treatment temperature for silicidation to 800 ° C., the presence of the sidewall insulating film ensures high reliability without any short circuit between the electrodes. Can be maintained.
[0090]
Furthermore, in the above-described embodiment, the BPSG film is formed after the P-TEOS film is formed, but a tungsten film as a light shielding film may be formed prior to the formation of the BPSG film.
[0091]
As the metal silicide film used here, in addition to titanium silicide, silicide of tantalum, tungsten, molybdenum, nickel, cobalt, platinum, or the like can be applied. Further, nitrides, alloys, compounds, and composites of titanium, tantalum, tungsten, molybdenum, nickel, cobalt, platinum may be formed on the upper layer of these metal silicides.
[0092]
Note that this embodiment can be applied to both vertical transfer electrodes and horizontal transfer electrodes.
[0093]
In the above-described embodiment, the charge transfer electrode of the solid-state imaging device is formed of a polycrystalline silicon film obtained by crystallization of doped amorphous silicon. However, the present invention is not limited to this, and wiring, MOSFET gate electrodes, etc. It is also applicable to.
[0094]
【The invention's effect】
As described above, according to the present invention, the crystal grains and the impurity concentration in the electrode are uniform, the voltage applied under the electrode and between adjacent electrodes is constant, and a solid-state imaging device having high transfer characteristics is provided. It becomes possible.
[0095]
In addition, since a flat polycrystalline silicon film with no irregularities on the surface can be obtained, the irregular reflection in the photolithography process is smaller than when a polycrystalline silicon film formed as a polycrystalline silicon film is used, and the exposure accuracy is improved. Thus, the reliability of the transfer electrode wiring can be improved.
[0096]
Furthermore, the thickness of the charge transfer electrode is reduced to improve the light receiving efficiency of the photoelectric conversion unit, and high-speed and high-sensitivity transfer is possible without degrading the electrical breakdown voltage between the charge transfer electrodes, and low power consumption. A solid-state image sensor can be provided. In addition, by reducing the resistance of the charge transfer electrode, the height of the electrode can be further reduced and the surface can be flattened, so that optical characteristic defects due to steps such as color unevenness can be reduced. It becomes possible. Furthermore, since high-speed transfer is possible, optical characteristics such as smear can be improved, and a high-quality and highly reliable CCD can be obtained.
[0097]
In addition, according to the method for manufacturing a solid-state imaging device of the present invention, it is possible to provide a method for manufacturing a solid-state imaging device that is easy to manufacture and highly reliable without increasing the number of steps.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a schematic configuration of a solid-state imaging element according to a first embodiment of the present invention.
FIG. 2 is a diagram showing a manufacturing process of the solid-state imaging device according to the first embodiment of the present invention.
FIG. 3 is a diagram illustrating a schematic configuration of a solid-state imaging element according to a second embodiment of the present invention.
FIG. 4 is a diagram illustrating a manufacturing process of a solid-state imaging device according to a second embodiment of the present invention.
FIG. 5 is a diagram illustrating a manufacturing process of a solid-state imaging device according to a fourth embodiment of the present invention.
[Explanation of symbols]
1 ... Silicon substrate
2... First insulating film (gate oxide film)
3a: second insulating film (silicon oxide film)
3 ... Interelectrode insulating film
4as, 4bs ... doped amorphous silicon film
4a, 4b ... polycrystalline silicon film
5S ・ ・ Titanium film
5. Titanium silicide
6 ... Silicon oxide film
30 ... Photodiode
31 ... Channel stop region
40: Charge transfer electrode
50 ... Light-shielding film

Claims (9)

In a solid-state imaging device comprising a photoelectric conversion unit formed on the surface of a semiconductor substrate, and a charge transfer unit that transfers charges generated in the photoelectric conversion unit,
The charge transfer electrode of the charge transfer unit is
A solid-state imaging device comprising a polycrystalline silicon film formed by annealing a doped amorphous silicon film. The charge transfer electrode includes a first layer electrode including a polycrystalline silicon film formed by annealing a doped amorphous silicon film formed on a surface of the semiconductor substrate via a gate oxide film;
A second layer electrode including a polycrystalline silicon film formed by annealing a doped amorphous silicon film formed so as to run on the first layer electrode from above the gate oxide film via an interelectrode insulating film; 2. The solid-state imaging device according to claim 1, wherein a two-layer electrode structure including 2. The charge transfer electrode comprises a polycrystalline silicon film formed by annealing a doped amorphous silicon film, and a metal silicide film formed on the surface of the polycrystalline silicon film. 3. A solid-state imaging device according to 2. In a method for manufacturing a solid-state imaging device, comprising: a photoelectric conversion unit formed on the surface of a semiconductor substrate; and a charge transfer unit that transfers charges generated in the photoelectric conversion unit.
Forming a charge transfer electrode of the charge transfer portion,
A film forming step of forming a doped amorphous silicon film on the surface of the semiconductor substrate via a gate oxide film;
And a crystallization step of polycrystallizing the doped amorphous silicon film by heat treatment. 5. The method for manufacturing a solid-state imaging device according to claim 4, wherein the crystallization step is performed simultaneously with an oxidation step for oxidizing the surface of the doped amorphous silicon film. Forming a metal film on the doped amorphous silicon film,
6. The method of manufacturing a solid-state imaging device according to claim 5, wherein the crystallization step includes a silicidation step of simultaneously forming a metal silicide film at an interface between the doped amorphous silicon film and the metal film. . A step of selectively removing the metal film remaining without being silicided;
7. The method for manufacturing a solid-state imaging device according to claim 6, further comprising a step of annealing the metal silicide film. The method of manufacturing a solid-state imaging device according to claim 6, wherein the silicidation step is a step of heating from 690 to 800 ° C. in a nitrogen atmosphere. The method for manufacturing a solid-state imaging device according to claim 7, wherein the annealing step is a step of heating to 800 ° C. or higher.

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