JPH06151966A - Nitrogen-iii compound semiconductor luminous element and manufacture thereof - Google Patents

Nitrogen-iii compound semiconductor luminous element and manufacture thereof

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Publication number
JPH06151966A
JPH06151966A JP31660192A JP31660192A JPH06151966A JP H06151966 A JPH06151966 A JP H06151966A JP 31660192 A JP31660192 A JP 31660192A JP 31660192 A JP31660192 A JP 31660192A JP H06151966 A JPH06151966 A JP H06151966A
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Japan
Prior art keywords
layer
carrier concentration
concentration
light emitting
emitting diode
Prior art date
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JP31660192A
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Japanese (ja)
Other versions
JP3198678B2 (en
Inventor
Katsuhide Manabe
勝英 真部
Norikatsu Koide
典克 小出
Junichi Umezaki
潤一 梅崎
Shizuyo Noiri
静代 野杁
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Toyoda Gosei Co Ltd
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Toyoda Gosei Co Ltd
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Abstract

PURPOSE:To improve the luminance and life of an AlGaInN light emitting diode. CONSTITUTION:A 500Angstrom AlN buffer layer 2, high carrier concentration n<+>-layer 3, approx. 2.2mum in film thickness and 2X10<18>/cm<3> in electron density, made of silicon-doped GaN, low carrier concentration n-layer 4, approx. 1.5mum and 1X10<16>/cm<3>, made of non-doped GaN, and p-layer 5, are formed on a sapphire substrate 1 in this order. The p-layer is of multilayer structure and consists of five sets of two layers; each set comprises a low carrier concentration p-layer L1, approx. 500Angstrom in film thickness and 1X10<16>/cm<3> in hole density, made of Mg-doped GaN and a high carrier concentration p<+>-layer H1, approx. 500Angstrom and 2X10<17>/cm<3>. As a result, the luminance and life are improved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は青色発光の窒素−3属元
素化合物半導体発光素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a blue light-emitting nitrogen-group III compound semiconductor light-emitting device.

【0002】[0002]

【従来技術】従来、青色の発光ダイオードとしてGaN 系
の化合物半導体を用いたものが知られている。そのGaN
系の化合物半導体は直接遷移型であることから発光効率
が高いこと、光の3原色の1つである青色を発光色とす
ること等から注目されている。
2. Description of the Related Art Conventionally, as a blue light emitting diode, one using a GaN compound semiconductor has been known. Its GaN
Since the compound semiconductors of the type are direct transition type, they have high luminous efficiency, and blue, which is one of the three primary colors of light, is used as the emission color, and so on.

【0003】最近、GaN においても、Mgをドープして電
子線を照射することによりp型のGaN が得られることが
明らかとなった。この結果、従来のn層と半絶縁層(i
層)との接合に換えてpn接合を有するGaN 発光ダイオ
ードが提案されている。
Recently, it has become clear that p-type GaN can be obtained by doping Mg and irradiating it with an electron beam. As a result, the conventional n layer and semi-insulating layer (i
A GaN light emitting diode having a pn junction instead of a junction with a layer) has been proposed.

【0004】[0004]

【発明が解決しようとする課題】しかし、上記のpn接
合を有する発光ダイオードであっても、発光輝度は未だ
十分ではなく、また、寿命に関しても十分なものが得ら
れていない。そこで、本発明の目的は、窒素−3属元素
化合物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む)
発光ダイオードの発光ダイオードの発光輝度を向上させ
ること及び素子寿命を長期化することである。
However, even the light emitting diode having the above-mentioned pn junction has not yet obtained sufficient light emission brightness, and has not obtained a sufficient lifetime. Therefore, an object of the present invention is to provide a nitrogen-3 group compound semiconductor (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0).
It is to improve the light emission brightness of the light emitting diode and to prolong the life of the device.

【0005】[0005]

【課題を解決するための手段】本発明は、n型の窒素−
3属元素化合物半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0
を含む) からなるn層と、p型の窒素−3属元素化合物
半導体(AlxGaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) からな
るp層とを有する窒素−3属元素化合物半導体発光素子
において、p層を、n層と接合する側からホール濃度が
比較的低濃度の低キャリア濃度p層と、ホール濃度が比
較的高濃度の高キャリア濃度p+ 層とを1周期として、
複数周期繰り返して形成したことを特徴とする。
The present invention is directed to n-type nitrogen-
Group 3 element compound semiconductor (Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0
Layer) and a p-layer composed of a p-type nitrogen-group-3 element compound semiconductor (including Al x Ga Y In 1-XY N; X = 0, Y = 0, X = Y = 0) In a nitrogen-3 group compound semiconductor light emitting device having: a p layer, a low carrier concentration p layer having a relatively low hole concentration and a high carrier concentration having a relatively high hole concentration from a side where the p layer is joined to the n layer. One cycle with the concentration p + layer,
It is characterized in that it is formed by repeating a plurality of cycles.

【0006】上記の低キャリア濃度p層のホール濃度は
1×1014/cm3〜 1×1016/cm3が望ましく、高キャリア濃
度p+ 層のホール濃度は 1×1016/cm3〜 2×1017/cm3
望ましい。又、膜厚は100 Å〜1000Åが望ましい。
The hole concentration of the above low carrier concentration p-layer is
1 × 10 14 / cm 3 to 1 × 10 16 / cm 3 is desirable, and the hole concentration of the high carrier concentration p + layer is preferably 1 × 10 16 / cm 3 to 2 × 10 17 / cm 3 . The film thickness is preferably 100Å to 1000Å.

【0007】[0007]

【発明の作用及び効果】本発明は、p層を、n層と接合
する側からホール濃度が比較的低濃度の低キャリア濃度
p層と、ホール濃度が比較的高濃度の高キャリア濃度p
+ 層とを1周期として、複数周期繰り返して形成した結
果、発光輝度が向上した。発光輝度は10mcdであり、こ
の発光輝度は従来のpn接合GaN 発光ダイオードの発光
輝度に比べて、2 倍に向上した。又、発光寿命は104
間であり、従来のpn接合GaN 発光ダイオードの発光寿
命の1.5 倍である。
According to the present invention, the p layer has a low carrier concentration p layer having a relatively low hole concentration and a high carrier concentration p having a relatively high hole concentration from the side where it is joined to the n layer.
As a result of repeatedly forming a plurality of cycles with the + layer as one cycle, the emission luminance was improved. The emission brightness is 10 mcd, which is twice as high as that of the conventional pn junction GaN light emitting diode. Further, the light emission lifetime is 10 4 hours, which is 1.5 times the light emission lifetime of the conventional pn junction GaN light emitting diode.

【0008】[0008]

【実施例】第1実施例 図1において、発光ダイオード10は、サファイア基板
1を有しており、そのサファイア基板1に500 ÅのAlN
のバッファ層2が形成されている。そのバッファ層2の
上には、順に、膜厚約2.2 μm、電子濃度2 ×1018/cm3
のシリコンドープGaN から成る高キャリア濃度n+
3、膜厚約 1.5μm、電子濃度1 ×1016/cm3のノンドー
プGaN から成る低キャリア濃度n層4が形成されてい
る。更に、低キャリア濃度n層4の上には、薄膜の多重
層構造から成るp層5が形成されている。p層5は、膜
厚約500 Å、ホール濃度1 ×1016/cm3のMgドープGaN か
ら成る低キャリア濃度p層L1 、膜厚約500 Å、ホール
濃度 2×1017/cm3のMgドープGaN から成る高キャリア濃
度p層H1 を1周期として5周期繰り返し形成された多
重層構造で構成されている。そして、最上層の高キャリ
ア濃度p+ 層H5 に接続するニッケルで形成された電極
7と高キャリア濃度n+ 層3に接続するニッケルで形成
された電極8とが形成されている。電極8と電極7と
は、溝9により電気的に絶縁分離されている。
First Embodiment Referring to FIG. 1, a light emitting diode 10 has a sapphire substrate 1, and the sapphire substrate 1 has 500 Å AlN.
Buffer layer 2 is formed. On the buffer layer 2, a film thickness of about 2.2 μm and an electron concentration of 2 × 10 18 / cm 3 are sequentially formed.
The high carrier concentration n + layer 3 made of silicon-doped GaN and the low carrier concentration n layer 4 made of non-doped GaN having an electron concentration of 1 × 10 16 / cm 3 are formed. Further, on the low carrier concentration n-layer 4, a p-layer 5 having a thin film multilayer structure is formed. The p layer 5 has a film thickness of about 500Å, a low carrier concentration p layer L 1 made of Mg-doped GaN with a hole concentration of 1 × 10 16 / cm 3 , a film thickness of about 500Å, and a hole concentration of 2 × 10 17 / cm 3 . It has a multi-layered structure in which a high carrier concentration p-layer H 1 made of Mg-doped GaN is repeatedly formed for 5 cycles. Then, an electrode 7 formed of nickel and connected to the highest carrier concentration p + layer H 5 and an electrode 8 formed of nickel and connected to the high carrier concentration n + layer 3 are formed. The electrode 8 and the electrode 7 are electrically insulated and separated by the groove 9.

【0009】次に、この構造の発光ダイオード10の製
造方法について説明する。上記発光ダイオード10は、
有機金属化合物気相成長法( 以下「M0VPE 」と記す) に
よる気相成長により製造された。用いられたガスは、NH
3 とキャリアガスH2とトリメチルガリウム(Ga(CH3)3)
(以下「TMG 」と記す) とトリメチルアルミニウム(Al
(CH3)3)(以下「TMA 」と記す) とシラン(SiH4)とビス
シクロペンタジエニルマグネシウム(Mg(C5H5)2)(以下
「CP2Mg 」と記す)である。
Next, a method of manufacturing the light emitting diode 10 having this structure will be described. The light emitting diode 10 is
It was manufactured by vapor phase epitaxy by an organometallic compound vapor phase epitaxy method (hereinafter referred to as "M0VPE"). The gas used is NH
3 and carrier gas H 2 and trimethylgallium (Ga (CH 3 ) 3 ).
(Hereinafter referred to as "TMG") and trimethyl aluminum (Al
(CH 3) 3) is referred to (hereinafter referred to as "TMA") and silane (SiH 4) and bis-cyclopentadienyl magnesium (Mg (C 5 H 5) 2) ( hereinafter "CP 2 Mg").

【0010】まず、有機洗浄及び熱処理により洗浄した
A面を主面とする単結晶のサファイア基板1をM0VPE 装
置の反応室に載置されたサセプタに装着する。次に、常
圧でH2を流速2 liter/分で反応室に流しながら温度1100
℃でサファイア基板1を気相エッチングした。
First, the single-crystal sapphire substrate 1 whose main surface is the A-plane cleaned by organic cleaning and heat treatment is mounted on a susceptor placed in the reaction chamber of the M0VPE apparatus. Then, at a pressure of 1100 while flowing H 2 into the reaction chamber at a flow rate of 2 liter / min under normal pressure.
The sapphire substrate 1 was vapor-phase etched at 0 ° C.

【0011】次に、温度を 400℃まで低下させて、H2
20 liter/分、NH3 を10 liter/分、TMA を 1.8×10-5
モル/分で供給してAlN のバッファ層2が約 500Åの厚
さに形成された。次に、サファイア基板1の温度を1150
℃に保持し、H2を20 liter/分、NH3 を10 liter/分、
TMG を 1.7×10-4モル/分、H2で0.86ppm まで希釈した
シラン(SiH4)を 200 ml/分の割合で30分間供給し、膜厚
約 2.2μm、電子濃度2×1018/cm3のGaN から成る高キ
ャリア濃度n+ 層3を形成した。
Next, the temperature is lowered to 400 ° C. and H 2 is added.
20 liter / min, NH 3 10 liter / min, TMA 1.8 × 10 -5
The buffer layer 2 of AlN was formed at a thickness of about 500Å by supplying at a mol / min. Next, the temperature of the sapphire substrate 1 is set to 1150.
Hold at 2 ℃, H 2 20 liter / min, NH 3 10 liter / min,
Silane (SiH 4 ) diluted with TMG at 1.7 × 10 -4 mol / min and 0.86 ppm with H 2 was supplied at a rate of 200 ml / min for 30 minutes to obtain a film thickness of about 2.2 μm and electron concentration of 2 × 10 18 / A high carrier concentration n + layer 3 made of GaN of cm 3 was formed.

【0012】続いて、サファイア基板1の温度を1150℃
に保持し、H2を20 liter/分、NH3を10 liter/分、TMG
を1.7 ×10-4モル/分の割合で20分間供給し、膜厚約
1.5μm、電子濃度 1×1016/ cm3 のGaN から成る低キ
ャリア濃度n層4を形成した。
Then, the temperature of the sapphire substrate 1 is set to 1150 ° C.
, H 2 20 liter / min, NH 3 10 liter / min, TMG
For 20 minutes at a rate of 1.7 × 10 -4 mol / min,
A low carrier concentration n layer 4 made of GaN having an electron concentration of 1 × 10 16 / cm 3 and having a thickness of 1.5 μm was formed.

【0013】次に、サファイア基板1を1150℃にして、
2 を20 liter/分、NH3 を10 liter/分、TMG を 1.7
×10-4モル/分、CP2Mg を 8×10-8モル/分の割合で0.
7 分間供給して、Mg濃度5 ×1019/cm3、膜厚500 ÅのGa
N から成る低キャリア濃度p層L1 を形成した。この状
態では、低キャリア濃度p層L1 は、まだ、抵抗率108
Ωcm以上の絶縁体である。
Next, the sapphire substrate 1 is heated to 1150 ° C.,
H 2 20 liter / min, NH 3 10 liter / min, TMG 1.7
× 10 -4 mol / min, CP 2 Mg at a rate of 8 × 10 -8 mol / min.
It is supplied for 7 minutes to obtain Ga with a Mg concentration of 5 × 10 19 / cm 3 and a film thickness of 500 Å.
A low carrier concentration p-layer L 1 made of N 2 was formed. In this state, the low carrier concentration p layer L 1 still has a resistivity of 10 8
It is an insulator of Ωcm or more.

【0014】次に、サファイア基板1を1150℃にして、
2 を20 liter/分、NH3 を10 liter/分、TMG を 1.7
×10-4モル/分、CP2Mg を 3×10-7モル/分の割合で0.
7 分間供給して、Mg濃度 2×1020/cm3、膜厚500 ÅのGa
N から成る高キャリア濃度p+ 層H1 を形成した。この
状態では、高キャリア濃度p+ 層H1 、まだ、抵抗率10
8 Ωcm以上の絶縁体である。
Next, the sapphire substrate 1 is heated to 1150 ° C.,
H 2 20 liter / min, NH 3 10 liter / min, TMG 1.7
× 10 −4 mol / min, CP 2 Mg at a rate of 3 × 10 −7 mol / min.
It is supplied for 7 minutes to obtain Ga with a Mg concentration of 2 × 10 20 / cm 3 and a film thickness of 500 Å.
A high carrier concentration p + layer H 1 made of N 2 was formed. In this state, the high carrier concentration p + layer H 1 still has a resistivity of 10
It is an insulator of 8 Ωcm or more.

【0015】続いて、上記の低キャリア濃度p層と高キ
ャリア濃度p+ 層の形成工程を、さらに、4周期繰り返
して、図2に示すように、全体として5周期の多重層構
造のp層5を得た。
Subsequently, the steps of forming the low carrier concentration p layer and the high carrier concentration p + layer are further repeated for 4 cycles, and as shown in FIG. 2, the p layer having a multilayer structure of 5 cycles as a whole. Got 5.

【0016】次に、反射電子線回析装置を用いて、上記
の多重層構造のp層5に一様に電子線を照射した。電子
線の照射条件は、加速電圧10KV、試料電流 1μA 、ビー
ムの移動速度0.2mm/sec 、ビーム径60μmφ、真空度2.
1 ×10-5Torrである。この電子線の照射により、低キャ
リア濃度p層L1 〜L5 は、ホール濃度1 ×1016/cm3
抵抗率40Ωcmのp伝導型半導体となり、高キャリア濃度
+ 層H1 〜H5 は、ホール濃度 2×1017/cm3、抵抗率
2Ωcmのp伝導型半導体となった。このようにして、図
2に示すような多層構造のウエハが得られた。
Next, using a backscattered electron beam diffractometer, the p-layer 5 having the above-mentioned multilayer structure was uniformly irradiated with an electron beam. The electron beam irradiation conditions are: acceleration voltage 10 KV, sample current 1 μA, beam moving speed 0.2 mm / sec, beam diameter 60 μmφ, vacuum degree 2.
It is 1 × 10 -5 Torr. By this electron beam irradiation, the low carrier concentration p layers L 1 to L 5 have a hole concentration of 1 × 10 16 / cm 3 ,
It becomes a p-conductivity type semiconductor with a resistivity of 40 Ωcm, and the high carrier concentration p + layers H 1 to H 5 have a hole concentration of 2 × 10 17 / cm 3 and a resistivity of
It became a p-type semiconductor of 2 Ωcm. In this way, a wafer having a multilayer structure as shown in FIG. 2 was obtained.

【0017】以下に述べられる図3から図7は、ウエハ
上の1つの素子のみを示す断面図であり、実際は、この
素子が連続的に繰り返されたウエハについて、処理が行
われ、その後、各素子毎に切断される。
FIGS. 3 to 7 described below are cross-sectional views showing only one element on the wafer. In fact, a wafer in which this element is continuously repeated is processed, and then each of the elements is processed. It is cut for each element.

【0018】図3に示すように、高キャリア濃度p+
5 の上に、スパッタリングによりSiO2層11を2000Å
の厚さに形成した。次に、そのSiO2層11上にフォトレ
ジスト12を塗布した。そして、フォトリソグラフによ
り、高キャリア濃度p+ 層H5 上において、高キャリア
濃度n+ 層3に至るように形成される孔15に対応する
電極形成部位Aとその電極形成部を高キャリア濃度p+
層H5 の電極と絶縁分離する溝9を形成する部位Bのフ
ォトレジストを除去した。
As shown in FIG. 3, a SiO 2 layer 11 of 2000 Å is formed on the high carrier concentration p + layer H 5 by sputtering.
Formed to a thickness of. Next, a photoresist 12 was applied on the SiO 2 layer 11. Then, by photolithography, on the high carrier concentration p + layer H 5 , the electrode forming portion A corresponding to the hole 15 formed so as to reach the high carrier concentration n + layer 3 and the electrode forming portion are formed with the high carrier concentration p +. +
The photoresist in the portion B where the groove 9 for insulating and separating from the electrode of the layer H 5 is formed is removed.

【0019】次に、図4に示すように、フォトレジスト
12によって覆われていないSiO2層11をフッ化水素酸
系エッチング液で除去した。次に、図5に示すように、
フォトレジスト12及びSiO2層11によって覆われてい
ない部位の多重層構造のp層5と、その下の低キャリア
濃度n層4、高キャリア濃度n+ 層3の上面一部を、真
空度0.04Torr、高周波電力0.44W/cm2 、BCl3ガスを10ml
/分の割合で供給しドライエッチングした後、Arでドラ
イエッチングした。この工程で、高キャリア濃度n+
3に対する電極取出しのための孔15と絶縁分離のため
の溝9が形成された。
Next, as shown in FIG. 4, the SiO 2 layer 11 not covered with the photoresist 12 was removed with a hydrofluoric acid-based etching solution. Next, as shown in FIG.
A part of the upper surface of the p-layer 5 having a multi-layer structure which is not covered with the photoresist 12 and the SiO 2 layer 11 and the low carrier concentration n layer 4 and the high carrier concentration n + layer 3 under the p-layer 5 has a vacuum degree of 0.04. Torr, high frequency power 0.44 W / cm 2 , BCl 3 gas 10 ml
It was supplied at a rate of / min and dry-etched, and then Ar was dry-etched. In this step, a hole 15 for taking out an electrode and a groove 9 for insulation separation were formed for the high carrier concentration n + layer 3.

【0020】次に、図6に示すように、高キャリア濃度
+ 層H5 上に残っているSiO2層11をフッ化水素酸で
除去した。次に、図7に示すように、試料の上全面に、
Ni層13を蒸着により形成した。これにより、孔15に
は、高キャリア濃度n+ 層3に電気的に接続されたNi層
13が形成される。そして、そのNi層13の上にフォト
レジスト14を塗布して、フォトリソグラフにより、そ
のフォトレジスト14が高キャリア濃度n+ 層3及び高
キャリア濃度p+ 層H5 に対する電極部が残るように、
所定形状にパターン形成した。
Next, as shown in FIG. 6, the SiO 2 layer 11 remaining on the high carrier concentration p + layer H 5 was removed with hydrofluoric acid. Next, as shown in FIG.
The Ni layer 13 was formed by vapor deposition. As a result, the Ni layer 13 electrically connected to the high carrier concentration n + layer 3 is formed in the hole 15. Then, a photoresist 14 is applied on the Ni layer 13, and the photoresist 14 is subjected to photolithography so that the electrode portion for the high carrier concentration n + layer 3 and the high carrier concentration p + layer H 5 remains.
A pattern was formed into a predetermined shape.

【0021】次に、図7に示すようにそのフォトレジス
ト14をマスクとして下層のNi層13の露出部を硝酸系
エッチング液でエッチングした。この時、絶縁分離のた
めの溝9に蒸着されたNi層13は、完全に除去される。
次に、フォトレジスト14をアセトンで除去し、高キャ
リア濃度n+ 層3の電極8、高キャリア濃度p+ 層H5
の電極7が残された。その後、上記の如く処理されたウ
エハは、各素子毎に切断され、図1に示すpn構造の窒
化ガリウム系発光素子を得た。
Next, as shown in FIG. 7, the exposed portion of the lower Ni layer 13 was etched with a nitric acid-based etching solution using the photoresist 14 as a mask. At this time, the Ni layer 13 deposited in the groove 9 for insulation separation is completely removed.
Next, the photoresist 14 is removed with acetone, the electrode 8 of the high carrier concentration n + layer 3 and the high carrier concentration p + layer H 5 are removed.
Of the electrode 7 was left. Then, the wafer treated as described above was cut into each element to obtain a pn structure gallium nitride-based light emitting element shown in FIG.

【0022】このようにして製造された発光ダイオード
10の発光強度を測定したところ10mcd であり、この発
光輝度は、従来のpn接合のGaN 発光ダイオードの発光
輝度に比べて 2倍であった。又、発光寿命は、104 時間
であり、従来のpn接合のGaN 発光ダイオードの発光寿
命に比べて1.5 倍であった。このようなp層5を薄膜の
多重層構造としたので、ホールの低キャリア濃度n層4
へのホールの注入量を増加させることができた。
The light emission intensity of the light emitting diode 10 manufactured in this manner was measured and found to be 10 mcd, which was twice as high as that of the conventional pn junction GaN light emitting diode. The light emission life was 10 4 hours, which was 1.5 times that of the conventional pn junction GaN light emitting diode. Since the p layer 5 has a thin film multilayer structure, the low carrier concentration n layer 4 of holes is formed.
It was possible to increase the injection amount of holes into the.

【0023】尚、上記実施例で用いたマグネシウムMgの
ドーピングガスは、上述のガスの他、メチルビスシクロ
ペンタジエニルマグネシウムMg(C6H7)2 を用いても良
い。
The magnesium Mg doping gas used in the above embodiment may be methylbiscyclopentadienyl magnesium Mg (C 6 H 7 ) 2 in addition to the above gases.

【0024】上記低キャリア濃度n層4の電子濃度は1
×1014〜 1×1016/cm3 で膜厚は 0.5〜 2μmが望まし
い。電子濃度が 1×1016/cm3 以上となると発光強度が
低下するので望ましくなく、 1×1014/cm3 以下となる
と発光素子の直列抵抗が高くなりすぎ電流を流すと発熱
するので望ましくない。又、膜厚が 2μm以上となると
発光素子の直列抵抗が高くなりすぎ電流を流すと発熱す
るので望ましくなく、膜厚が 0.5μm以下となると発光
強度が低下するので望ましくない。
The electron concentration of the low carrier concentration n layer 4 is 1
It is desirable that the film thickness is x10 14 to 1x10 16 / cm 3 and the film thickness is 0.5 to 2 µm. When the electron concentration is 1 × 10 16 / cm 3 or more, the emission intensity decreases, which is not desirable. When the electron concentration is 1 × 10 14 / cm 3 or less, the series resistance of the light emitting element becomes too high and heat is generated when an electric current is applied. . Further, if the film thickness is 2 μm or more, the series resistance of the light emitting element becomes too high and heat is generated when an electric current is applied, which is not desirable, and if the film thickness is 0.5 μm or less, the emission intensity decreases, which is not desirable.

【0025】更に、高キャリア濃度n+ 層3の電子濃度
は 1×1016〜 1×1019/cm3 で膜厚は 2〜10μmが望ま
しい。電子濃度が 1×1019/cm3 以上となると結晶性が
悪化するので望ましくなく、 1×1016/cm3 以下となる
と発光素子の直列抵抗が高くなりすぎ電流を流すと発熱
するので望ましくない。又、膜厚が10μm以上となると
基板が湾曲するので望ましくなく、膜厚が 2μm以下と
なると発光素子の直列抵抗が高くなりすぎ電流を流すと
発熱するので望ましくない。
Further, it is desirable that the high carrier concentration n + layer 3 has an electron concentration of 1 × 10 16 to 1 × 10 19 / cm 3 and a film thickness of 2 to 10 μm. When the electron concentration is 1 × 10 19 / cm 3 or more, the crystallinity is deteriorated, which is not desirable. When the electron concentration is 1 × 10 16 / cm 3 or less, the series resistance of the light emitting element becomes too high and heat is generated when a current is applied, which is not desirable. . Further, if the film thickness is 10 μm or more, the substrate is curved, which is not desirable.

【0026】又、上記低キャリア濃度p層L1 〜L5
ホール濃度は1 ×1014〜 1×1016/cm3 で膜厚は100 〜
1000Åが望ましい。ホール濃度が 1×1016/cm3 以上と
なると、低キャリア濃度n層4とのマッチングが悪くな
り発光効率が低下するので望ましくなく、ホール濃度が
1×1014/cm3 以下となると、直列抵抗が高くなり過ぎ
るので望ましくない。
The low carrier concentration p layers L 1 to L 5 have a hole concentration of 1 × 10 14 to 1 × 10 16 / cm 3 and a film thickness of 100 to 100 μm.
1000Å is desirable. If the hole concentration is 1 × 10 16 / cm 3 or more, the matching with the low carrier concentration n-layer 4 is deteriorated and the luminous efficiency is lowered, which is not desirable.
If it is less than 1 × 10 14 / cm 3 , the series resistance becomes too high, which is not desirable.

【0027】更に、高キャリア濃度p+ 層H1 〜H5
ホール濃度は 1×1016〜 2×1017/cm3 で、膜厚は100
〜1000Åが望ましい。ホール濃度が 2×1017/cm3 以上
のp+ 層はできない。1 ×1016/cm3 以下となると、直
列抵抗が高くなるので望ましくない。
Further, the high carrier concentration p + layers H 1 to H 5 have a hole concentration of 1 × 10 16 to 2 × 10 17 / cm 3 and a film thickness of 100.
~ 1000Å is desirable. A p + layer having a hole concentration of 2 × 10 17 / cm 3 or more cannot be formed. When it is 1 × 10 16 / cm 3 or less, the series resistance becomes high, which is not desirable.

【0028】第2実施例 図8に示すように発光ダイオード10を構成することも
できる。即ち、バッファ層2の上に、順に、薄膜の多重
層構造のp層5、膜厚約 1.5μm、電子濃度1×1016/cm
3のノンドープGaN から成る低キャリア濃度n層4、膜
厚約2.2 μm、電子濃度2 ×1018/cm3のシリコンドープ
GaN から成る高キャリア濃度n+ 層3が形成されてい
る。このp層5は、第1実施例と同様であり、低キャリ
ア濃度p層と高キャリア濃度p+ 層とを1周期として、
5周期繰り返して形成されている。
Second Embodiment A light emitting diode 10 may be constructed as shown in FIG. That is, on the buffer layer 2, a p-layer 5 having a thin film multi-layer structure, a film thickness of about 1.5 μm, and an electron concentration of 1 × 10 16 / cm 2.
Low carrier concentration n-layer 4 composed of 3 undoped GaN, film thickness of about 2.2 μm, electron concentration of 2 × 10 18 / cm 3 silicon doped
A high carrier concentration n + layer 3 made of GaN is formed. This p layer 5 is similar to that of the first embodiment, and the low carrier concentration p layer and the high carrier concentration p + layer are set as one cycle,
It is formed by repeating 5 cycles.

【0029】そして、高キャリア濃度n+ 層3に接続す
るニッケルで形成された電極8と高キャリア濃度p+
5 に接続するニッケルで形成された電極7とが形成さ
れている。電極8と電極7とは、高キャリア濃度n+
3、低キャリア濃度n層4、p層5に形成された溝91
により電気的に絶縁分離されている。
An electrode 8 made of nickel and connected to the high carrier concentration n + layer 3 and an electrode 7 made of nickel and connected to the high carrier concentration p + layer H 5 are formed. The electrodes 8 and 7 have a groove 91 formed in the high carrier concentration n + layer 3, the low carrier concentration n layer 4, and the p layer 5.
Are electrically isolated from each other.

【0030】このように、本実施例は、第1実施例と異
なり、p層とn層との基板1に対する堆積順序を逆にし
たものである。製造は第1実施例と同様に行うことがで
きる。
As described above, this embodiment is different from the first embodiment in that the deposition order of the p layer and the n layer on the substrate 1 is reversed. The manufacturing can be performed in the same manner as in the first embodiment.

【0031】このように、p層をn層に接合する側から
低キャリア濃度p層と高キャリア濃度p+ 層とする2層
を1周期として多重周期の構造に形成したので、ホール
濃度の最も高いp+ 層と電子濃度が最も高いn+ 層との
間に電圧を印加することで、電子及びホールが各層で効
率良く加速され、pn接合面を通って反対の伝導型の層
に効率良く注入される。この結果、発光輝度が向上し
た。
As described above, since the two layers of the low carrier concentration p layer and the high carrier concentration p + layer from the side where the p layer is joined to the n layer are set as one period to have a multi-period structure, the hole concentration is the highest. By applying a voltage between the high p + layer and the n + layer with the highest electron concentration, electrons and holes are efficiently accelerated in each layer, and efficiently pass through the pn junction surface to the opposite conductivity type layer. Injected. As a result, the emission brightness was improved.

【0032】第3実施例 図9において、発光ダイオード10は、サファイア基板
1を有しており、そのサファイア基板1に500 ÅのAlN
のバッファ層2が形成されている。そのバッファ層2の
上には、順に、膜厚約2.2 μm、電子濃度2 ×1018/cm3
のシリコンドープGaN から成る高キャリア濃度n+
3、膜厚約 1.5μm、電子濃度 1×1016/cm3のノンドー
プGaN から成る低キャリア濃度n層4、多重層構造のi
層6が形成されている。i層6は、膜厚約500 Å、Mg濃
度5 ×1019/cm3の低不純物濃度i層iL1と、膜厚約500
Å、Mg濃度 2×1020/cm3の高不純物濃度i層iH1とを1
周期として5周期繰り返し形成された多重層構造で構成
されている。
Third Embodiment In FIG. 9, a light emitting diode 10 has a sapphire substrate 1, and the sapphire substrate 1 has 500 Å AlN.
Buffer layer 2 is formed. On the buffer layer 2, a film thickness of about 2.2 μm and an electron concentration of 2 × 10 18 / cm 3 are sequentially formed.
High-concentration n + layer 3 made of silicon-doped GaN, film thickness of about 1.5 μm, low-carrier-concentration n-layer 4 made of non-doped GaN having an electron concentration of 1 × 10 16 / cm 3 , i of the multilayer structure.
Layer 6 has been formed. The i-layer 6 has a film thickness of about 500Å, a low impurity concentration i-layer i L1 with a Mg concentration of 5 × 10 19 / cm 3 , and a film thickness of about 500.
Å, 1 with high impurity concentration i-layer i H1 with Mg concentration 2 × 10 20 / cm 3
It has a multi-layer structure in which five cycles are repeatedly formed.

【0033】そして、その低不純物濃度i層iL1〜iL5
及び高不純物濃度iH1〜iH5の所定領域には、それぞ
れ、電子線照射によりp伝導型化した、膜厚約500 Å、
ホール濃度1 ×1016/cm3の低キャリア濃度p層L1 〜L
5 、膜厚約500 Å、ホール濃度2×1017/cm3の高キャリ
ア濃度p層H1 〜H5 が形成されている。このように、
多重層構造のi層6の一部分の位置に多重層構造のp層
50が形成されている。
Then, the low impurity concentration i layers i L1 to i L5
And the predetermined regions of high impurity concentrations i H1 to i H5 are each made to have a p-conductivity type by electron beam irradiation and have a film thickness of about 500 Å,
Low carrier concentration p layer L 1 to L with hole concentration 1 × 10 16 / cm 3
5 , high carrier concentration p layers H 1 to H 5 having a film thickness of about 500 Å and a hole concentration of 2 × 10 17 / cm 3 are formed. in this way,
A p-layer 50 having a multi-layer structure is formed at a part of the i-layer 6 having the multi-layer structure.

【0034】又、高不純物濃度i+ 層iH5の上面から
は、i層6、低キャリア濃度n層4を貫通して高キャリ
ア濃度n+ 層3に至る孔15が形成されている。その孔
15を通って高キャリア濃度n+ 層3に接合されたニッ
ケルで形成された電極81が高不純物濃度i+ 層iH5
に形成されている。又、高キャリア濃度p+ 層H5 の上
面には、高キャリア濃度p+ 層H5 に対するニッケルで
形成された電極71が形成されている。高キャリア濃度
+ 層3に対する電極81は、p層50に対してi層6
により絶縁分離されている。
A hole 15 is formed from the upper surface of the high impurity concentration i + layer i H5 to penetrate the i layer 6 and the low carrier concentration n layer 4 to reach the high carrier concentration n + layer 3. An electrode 81 made of nickel joined to the high carrier concentration n + layer 3 through the hole 15 is formed on the high impurity concentration i + layer i H5 . Further, on the upper surface of the high carrier concentration p + layer H 5, electrodes 71 formed of nickel to high carrier concentration p + layer H 5 is formed. The electrode 81 for the high carrier concentration n + layer 3 is the i layer 6 for the p layer 50.
It is insulated and separated by.

【0035】次に、この構造の発光ダイオード10の製
造方法について説明する。製造工程を示す図10から図
15は、ウエハにおける1素子のみに関する断面図であ
り、実際には図に示す素子が繰り返し形成されたウエハ
に関して次の製造処理が行われる。そして、最後に、ウ
エハが切断されて各発光素子が形成される。
Next, a method of manufacturing the light emitting diode 10 having this structure will be described. 10 to 15 showing the manufacturing process are cross-sectional views of only one element on the wafer, and the following manufacturing process is actually performed on the wafer on which the elements shown in the drawing are repeatedly formed. Then, finally, the wafer is cut to form each light emitting element.

【0036】第1実施例と同様にして、図10に示すウ
エハを製造する。次に、図11に示すように、高不純物
濃度i+ 層iH5の上に、スパッタリングによりSiO2層1
1を2000Åの厚さに形成した。次に、そのSiO2層11上
にフォトレジスト12を塗布した。そして、フォトリソ
グラフにより、高不純物濃度i+ 層iH5において高キャ
リア濃度n+ 層3に至るように形成される孔15に対応
する電極形成部位Aのフォトレジストを除去した。
The wafer shown in FIG. 10 is manufactured in the same manner as in the first embodiment. Next, as shown in FIG. 11, the SiO 2 layer 1 is sputtered on the high impurity concentration i + layer i H5.
1 was formed to a thickness of 2000Å. Next, a photoresist 12 was applied on the SiO 2 layer 11. Then, by photolithography, the photoresist in the electrode formation site A corresponding to the hole 15 formed to reach the high carrier concentration n + layer 3 in the high impurity concentration i + layer i H5 was removed.

【0037】次に、図12に示すように、フォトレジス
ト12によって覆われていないSiO2層11をフッ化水素
酸系エッチング液で除去した。次に、図13に示すよう
に、フォトレジスト12及びSiO2層11によって覆われ
ていない部位の多重層構造のi層6とその下の低キャリ
ア濃度n層4と高キャリア濃度n+ 層3の上面一部を、
真空度0.04Torr、高周波電力0.44W/cm2 、BCl3ガスを10
ml/分の割合で供給しドライエッチングした後、Arでド
ライエッチングした。この工程で、高キャリア濃度n+
層3に対する電極取出しのための孔15が形成された。
次に、図14に示すように、高不純物濃度i+ 層iH5
に残っているSiO2層11をフッ化水素酸で除去した。
Next, as shown in FIG. 12, the SiO 2 layer 11 not covered with the photoresist 12 was removed with a hydrofluoric acid-based etching solution. Next, as shown in FIG. 13, the i layer 6 having a multilayer structure in a portion not covered with the photoresist 12 and the SiO 2 layer 11, the low carrier concentration n layer 4 and the high carrier concentration n + layer 3 thereunder. Part of the upper surface of
Vacuum degree 0.04 Torr, high frequency power 0.44 W / cm 2 , BCl 3 gas 10
It was supplied at a rate of ml / min for dry etching, and then Ar was used for dry etching. In this process, high carrier concentration n +
Holes 15 were formed in the layer 3 for electrode extraction.
Next, as shown in FIG. 14, the SiO 2 layer 11 remaining on the high impurity concentration i + layer i H5 was removed with hydrofluoric acid.

【0038】次に、図15に示すように、高不純物濃度
+ 層iH1〜iH5及び低不純物濃度i層iL1〜iL5の所
定領域にのみ、反射電子線回析装置を用いて電子線を照
射して、それぞれp伝導型を示す、膜厚約500 Å、ホー
ル濃度 2×1017/cm3の高キャリア濃度p層H1 〜H5
膜厚約500 Å、ホール濃度1 ×1016/cm3の低キャリア濃
度p層L1 〜L5 が形成された。
Next, as shown in FIG. 15, a backscattered electron beam diffractometer is used only in predetermined regions of the high impurity concentration i + layers i H1 to i H5 and the low impurity concentration i layers i L1 to i L5. High carrier concentration p layers H 1 to H 5 having a film thickness of about 500 Å and a hole concentration of 2 × 10 17 / cm 3 , each of which exhibits p-conductivity upon irradiation with an electron beam,
Low carrier concentration p layers L 1 to L 5 having a film thickness of about 500 Å and a hole concentration of 1 × 10 16 / cm 3 were formed.

【0039】電子線の照射条件は、加速電圧10KV、試料
電流 1μA 、ビームの移動速度0.2mm/sec 、ビーム径60
μmφ、真空度2.1 ×10-5Torrである。この時、高キャ
リア濃度p+ 層H1 〜H5 及び低キャリア濃度p層L1
〜L5 以外の部分、即ち、電子線の照射されなかった部
分は、絶縁体の高不純物濃度i+ 層iH1〜iH5及び低不
純物濃度i層iL1〜iL5のままである。従って、高キャ
リア濃度p+ 層H1 〜H5 及び低キャリア濃度p層L1
〜L5 は、縦方向に対しては、低キャリア濃度n層4に
導通するが、横方向には、周囲に対して、高不純物濃度
+ 層iH1〜iH5及び低不純物濃度i層iL1〜iL5によ
り電気的に絶縁分離されている。
The electron beam irradiation conditions are: acceleration voltage 10 KV, sample current 1 μA, beam moving speed 0.2 mm / sec, beam diameter 60.
μmφ, vacuum degree 2.1 × 10 −5 Torr. At this time, the high carrier concentration p + layers H 1 to H 5 and the low carrier concentration p layer L 1
Portions other than ~L 5, i.e., irradiated not part of the electron beam remains high impurity concentration i + layer i H1 through i H5 and low impurity concentration i layer i L1 through i L5 of the insulator. Therefore, the high carrier concentration p + layers H 1 to H 5 and the low carrier concentration p layer L 1
.About.L 5 are electrically connected to the low carrier concentration n layer 4 in the vertical direction, but are high impurity concentration i + layers i H1 to i H5 and a low impurity concentration i layer in the horizontal direction with respect to the surroundings. It is electrically insulated and separated by i L1 to i L5 .

【0040】次に、図16に示すように、高キャリア濃
度p+ 層H5 と、高不純物濃度i+層iH5と、高不純物
濃度i+ 層iH5の上面と孔15を通って高キャリア濃度
+層3とに、Ni層20が蒸着により形成された。そし
て、そのNi層20の上にフォトレジスト21を塗布し
て、フォトリソグラフにより、そのフォトレジスト21
が高キャリア濃度n+ 層3及び高キャリア濃度p+ 層H
5 に対する電極部が残るように、所定形状にパターン形
成した。次に、そのフォトレジスト21をマスクとして
下層のNi層20の露出部を硝酸系エッチング液でエッチ
ングし、フォトレジスト21をアセトンで除去した。こ
のようにして、図9に示すように、高キャリア濃度n+
層3の電極81、高キャリア濃度p+ 層H5 の電極71
を形成した。その後、上述のように形成されたウエハが
各素子毎に切断された。
Next, as shown in FIG. 16, a high carrier concentration p + layer H 5 , a high impurity concentration i + layer i H5 , a high impurity concentration i + layer i H5 , and an upper surface of the high impurity concentration i + layer i H5 and a hole 15 are formed. A Ni layer 20 was formed on the carrier concentration n + layer 3 by vapor deposition. Then, a photoresist 21 is applied on the Ni layer 20, and the photoresist 21 is applied by photolithography.
Are high carrier concentration n + layer 3 and high carrier concentration p + layer H
A pattern was formed in a predetermined shape so that the electrode portion for 5 remained. Next, using the photoresist 21 as a mask, the exposed portion of the lower Ni layer 20 was etched with a nitric acid-based etching solution, and the photoresist 21 was removed with acetone. Thus, as shown in FIG. 9, the high carrier concentration n +
Electrode 81 of layer 3 and electrode 71 of high carrier concentration p + layer H 5
Was formed. After that, the wafer formed as described above was cut into each element.

【0041】このようにして製造された発光ダイオード
10の発光強度を測定したところ、第1実施例と同様
に、10mcd であり、発光寿命は104 時間であった。
The light emission intensity of the light emitting diode 10 manufactured in this manner was measured and found to be 10 mcd and the light emission life was 10 4 hours, as in the first embodiment.

【0042】第4実施例 図1に示す構造の第1実施例の発光ダイオードにおい
て、高キャリア濃度n+層3、多重層構造のp層5を、
それぞれ、Al0.2Ga0.5In0.3Nとした。高キャリア濃度n
+ 層3は、シリコンを添加して電子濃度2 ×1018/cm3
形成し、低キャリア濃度n層4は不純物無添加で電子濃
度1 ×1016/cm3に形成した。低キャリア濃度p層L1
マグネシウム(Mg)を添加して電子線を照射して正孔濃度
1 ×1016/cm3に形成し、高キャリア濃度p層H1 は同じ
くマグネシウム(Mg)を添加して電子線を照射して正孔濃
度 2×1017/cm3に形成した。そして、最上層の高キャリ
ア濃度p+ 層H5 に接続するニッケルで形成された電極
7と高キャリア濃度n+ 層3に接続するニッケルで形成
された電極8とを形成した。
Fourth Embodiment In the light emitting diode of the first embodiment having the structure shown in FIG. 1, a high carrier concentration n + layer 3 and a p layer 5 having a multi-layer structure are provided.
Al 0.2 Ga 0.5 In 0.3 N was used for each. High carrier concentration n
The + layer 3 was formed by adding silicon to an electron concentration of 2 × 10 18 / cm 3 , and the low carrier concentration n layer 4 was formed without adding impurities to an electron concentration of 1 × 10 16 / cm 3 . The low carrier concentration p layer L 1 has a hole concentration by adding magnesium (Mg) and irradiating it with an electron beam.
Formed in 1 × 10 16 / cm 3, was formed on the high carrier concentration p layer H 1 is irradiated with the electron beam also doped with magnesium (Mg) hole concentration 2 × 10 17 / cm 3. Then, an electrode 7 made of nickel and connected to the highest carrier concentration p + layer H 5 and an electrode 8 made of nickel and connected to the high carrier concentration n + layer 3 were formed.

【0043】次に、この構造の発光ダイオード10も第
1実施例の発光ダイオードと同様に製造することができ
る。トリメチルインジウム(In(CH3)3)がTMG 、TMA 、シ
ラン、CP2Mg ガスに加えて使用された。生成温度、ガス
流量は第1実施例と同じである。トリメチルインジウム
を 1.7×10-4モル/分で供給することを除いて他のガス
の流量は第1実施例と同一である。
Next, the light emitting diode 10 having this structure can be manufactured similarly to the light emitting diode of the first embodiment. Trimethylindium (In (CH 3 ) 3 ) was used in addition to TMG, TMA, silane, CP 2 Mg gas. The generation temperature and gas flow rate are the same as in the first embodiment. The flow rates of the other gases are the same as those in the first embodiment except that trimethylindium is supplied at 1.7 × 10 −4 mol / min.

【0044】次に、第1実施例と同様に、反射電子線回
析装置を用いて、上記の多重層構造のp層5に一様に電
子線を照射してp伝導型半導体を得ることができた。
Then, as in the first embodiment, a p-type semiconductor is obtained by uniformly irradiating the p-layer 5 having the above-mentioned multi-layer structure with an electron beam by using a reflection electron beam diffractometer. I was able to.

【0045】次に、第1実施例と同様に、高キャリア濃
度p+ 層H5 と高キャリア濃度n+層3に接続するニッ
ケルで形成された電極7,8を形成した。
Next, similarly to the first embodiment, electrodes 7 and 8 made of nickel and connected to the high carrier concentration p + layer H 5 and the high carrier concentration n + layer 3 were formed.

【0046】このようにして製造された発光ダイオード
10の発光強度を測定したところ10mcd であり、この発
光輝度は、従来のpn接合のGaN 発光ダイオードの発光
輝度に比べて 2倍であった。又、発光寿命は、104 時間
であり、従来のpn接合のGaN 発光ダイオードの発光寿
命に比べて1.5 倍であった。このようなp層5を薄膜の
多重層構造としたので、ホールの低キャリア濃度n層4
へのホールの注入量を増加させることができた。
The light emission intensity of the light emitting diode 10 thus manufactured was measured and found to be 10 mcd, which was twice as high as that of the conventional pn junction GaN light emitting diode. The light emission life was 10 4 hours, which was 1.5 times that of the conventional pn junction GaN light emitting diode. Since the p layer 5 has a thin film multilayer structure, the low carrier concentration n layer 4 of holes is formed.
It was possible to increase the injection amount of holes into the.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の具体的な第1実施例に係る発光ダイオ
ードの構成を示した構成図。
FIG. 1 is a configuration diagram showing a configuration of a light emitting diode according to a first specific example of the present invention.

【図2】同実施例の発光ダイオードの製造工程を示した
断面図。
FIG. 2 is a cross-sectional view showing a manufacturing process of the light emitting diode of the same embodiment.

【図3】同実施例の発光ダイオードの製造工程を示した
断面図。
FIG. 3 is a cross-sectional view showing a manufacturing process of the light emitting diode of the embodiment.

【図4】同実施例の発光ダイオードの製造工程を示した
断面図。
FIG. 4 is a cross-sectional view showing a manufacturing process of the light emitting diode of the same embodiment.

【図5】同実施例の発光ダイオードの製造工程を示した
断面図。
FIG. 5 is a cross-sectional view showing the manufacturing process of the light emitting diode of the same embodiment.

【図6】同実施例の発光ダイオードの製造工程を示した
断面図。
FIG. 6 is a cross-sectional view showing a manufacturing process of the light emitting diode of the embodiment.

【図7】同実施例の発光ダイオードの製造工程を示した
断面図。
FIG. 7 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

【図8】本発明の具体的な第2実施例に係る発光ダイオ
ードの構成を示した構成図。
FIG. 8 is a configuration diagram showing a configuration of a light emitting diode according to a second specific example of the present invention.

【図9】本発明の具体的な第3実施例に係る発光ダイオ
ードの構成を示した構成図。
FIG. 9 is a configuration diagram showing a configuration of a light emitting diode according to a third specific example of the present invention.

【図10】同実施例の発光ダイオードの製造工程を示し
た断面図。
FIG. 10 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

【図11】同実施例の発光ダイオードの製造工程を示し
た断面図。
FIG. 11 is a cross-sectional view showing the manufacturing process of the light-emitting diode of the example.

【図12】同実施例の発光ダイオードの製造工程を示し
た断面図。
FIG. 12 is a cross-sectional view showing the manufacturing process of the light-emitting diode of the example.

【図13】同実施例の発光ダイオードの製造工程を示し
た断面図。
FIG. 13 is a cross-sectional view showing the manufacturing process of the light-emitting diode of the example.

【図14】同実施例の発光ダイオードの製造工程を示し
た断面図。
FIG. 14 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

【図15】同実施例の発光ダイオードの製造工程を示し
た断面図。
FIG. 15 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

【図16】同実施例の発光ダイオードの製造工程を示し
た断面図。
FIG. 16 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

【符号の説明】[Explanation of symbols]

10…発光ダイオード 1…サファイア基板 2…バッファ層 3…高キャリア濃度n+ 層 4…低キャリア濃度n層 5、50…p層(多重層構造のp層) 6…i層(多重層構造のi層) iH1〜iH5…高不純物濃度i層 iL1〜iL5…低不純物濃度i層 7,8…電極 9…溝10 ... Light emitting diode 1 ... Sapphire substrate 2 ... Buffer layer 3 ... High carrier concentration n + layer 4 ... Low carrier concentration n layer 5, 50 ... p layer (p layer of multi-layer structure) 6 ... i layer (of multi-layer structure) i layer) i H1 to i H5 ... High impurity concentration i layer i L1 to i L5 ... Low impurity concentration i layer 7, 8 ... Electrode 9 ... Groove

フロントページの続き (72)発明者 梅崎 潤一 愛知県西春日井郡春日町大字落合字長畑1 番地 豊田合成株式会社内 (72)発明者 野杁 静代 愛知県西春日井郡春日町大字落合字長畑1 番地 豊田合成株式会社内Front Page Continuation (72) Inventor Junichi Umezaki, 1 Ochiai, Nagachi, Kasuga-cho, Nishikasugai-gun, Aichi Prefecture, Toyoda Gosei Co., Ltd. Within the corporation

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 n型の窒素−3属元素化合物半導体(Alx
GaYIn1-X-YN;X=0,Y=0,X=Y=0 を含む) からなるn層と、
p型の窒素−3属元素化合物半導体(AlxGaYIn1-X-YN;X=
0,Y=0,X=Y=0 を含む)からなるp層とを有する窒素−3
属元素化合物半導体発光素子において、 前記p層を、前記n層と接合する側からホール濃度が比
較的低濃度の低キャリア濃度p層と、ホール濃度が比較
的高濃度の高キャリア濃度p+ 層とを1周期として、複
数周期繰り返して形成したことを特徴とする発光素子。
1. An n-type nitrogen-3 group element compound semiconductor (Al x
Ga Y In 1-XY N; including X = 0, Y = 0, X = Y = 0)),
p-type nitrogen-3 group compound semiconductor (Al x Ga Y In 1-XY N; X =
0, Y = 0, X = Y = 0 inclusive) and nitrogen-3 with
In the genus element compound semiconductor light emitting device, the p layer is a low carrier concentration p layer having a relatively low hole concentration and a high carrier concentration p + layer having a relatively high hole concentration from a side where the p layer is joined to the n layer. A light-emitting element characterized by being formed by repeating a plurality of cycles, each of which is defined as one cycle.
JP31660192A 1992-10-29 1992-10-29 Nitrogen-3 group element compound semiconductor light emitting device Expired - Fee Related JP3198678B2 (en)

Priority Applications (1)

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JP31660192A JP3198678B2 (en) 1992-10-29 1992-10-29 Nitrogen-3 group element compound semiconductor light emitting device

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Application Number Priority Date Filing Date Title
JP31660192A JP3198678B2 (en) 1992-10-29 1992-10-29 Nitrogen-3 group element compound semiconductor light emitting device

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JPH06151966A true JPH06151966A (en) 1994-05-31
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EP1063711A1 (en) * 1998-03-12 2000-12-27 Nichia Chemical Industries, Ltd. Turntable device and manufacturing method thereof
EP1213771A3 (en) * 1995-03-08 2002-10-02 Sharp Kabushiki Kaisha Optoelectronic semiconductor device
US6838705B1 (en) 1999-03-29 2005-01-04 Nichia Corporation Nitride semiconductor device
US7345297B2 (en) 2004-02-09 2008-03-18 Nichia Corporation Nitride semiconductor device
US7989926B2 (en) 2005-09-20 2011-08-02 Showa Denko K.K. Semiconductor device including non-stoichiometric silicon carbide layer and method of fabrication thereof
US8043977B2 (en) 2005-08-08 2011-10-25 Showa Denko K.K. Method of manufacturing a semiconductor device having a group-III nitride superlattice layer on a silicon substrate
CN103413879A (en) * 2013-08-13 2013-11-27 湘能华磊光电股份有限公司 LED epitaxial growth method and LED chip obtained through same
US8934513B2 (en) 1994-09-14 2015-01-13 Rohm Co., Ltd. Semiconductor light emitting device and manufacturing method therefor
WO2017094028A1 (en) * 2015-12-02 2017-06-08 Indian Institute Of Technology Bombay Method and apparatus for forming silicon doped gallium nitride (gan) films by a co-sputtering technique

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8934513B2 (en) 1994-09-14 2015-01-13 Rohm Co., Ltd. Semiconductor light emitting device and manufacturing method therefor
EP1213771A3 (en) * 1995-03-08 2002-10-02 Sharp Kabushiki Kaisha Optoelectronic semiconductor device
US7402838B2 (en) 1998-03-12 2008-07-22 Nichia Corporation Nitride semiconductor device
US7193246B1 (en) 1998-03-12 2007-03-20 Nichia Corporation Nitride semiconductor device
EP1063711A1 (en) * 1998-03-12 2000-12-27 Nichia Chemical Industries, Ltd. Turntable device and manufacturing method thereof
US7947994B2 (en) 1998-03-12 2011-05-24 Nichia Corporation Nitride semiconductor device
EP1063711B1 (en) * 1998-03-12 2013-02-27 Nichia Corporation Nitride semiconductor device
US7348602B2 (en) 1999-03-29 2008-03-25 Nichia Corporation Nitride semiconductor device
US6838705B1 (en) 1999-03-29 2005-01-04 Nichia Corporation Nitride semiconductor device
US7345297B2 (en) 2004-02-09 2008-03-18 Nichia Corporation Nitride semiconductor device
US8043977B2 (en) 2005-08-08 2011-10-25 Showa Denko K.K. Method of manufacturing a semiconductor device having a group-III nitride superlattice layer on a silicon substrate
US8222674B2 (en) 2005-08-08 2012-07-17 Showa Denko K.K. Semiconductor device having a group-III nitride superlattice layer on a silicon substrate
US7989926B2 (en) 2005-09-20 2011-08-02 Showa Denko K.K. Semiconductor device including non-stoichiometric silicon carbide layer and method of fabrication thereof
CN103413879A (en) * 2013-08-13 2013-11-27 湘能华磊光电股份有限公司 LED epitaxial growth method and LED chip obtained through same
WO2017094028A1 (en) * 2015-12-02 2017-06-08 Indian Institute Of Technology Bombay Method and apparatus for forming silicon doped gallium nitride (gan) films by a co-sputtering technique

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