JPH06151964A - Nitrogen-iii compound semiconductor luminous element and manufacture thereof - Google Patents

Abstract

PURPOSE:To improve the luminance and life of an AlGaInN light emitting diode. CONSTITUTION:A 500Angstrom AlN buffer layer 2, high carrier concentration n<+>-layer 3, approx. 2.2mum in film thickness and 2X10<18>/cm<3> in electron density, made of silicon-doped GaN, low carrier concentration n-layer 4, approx. 1.5mum and 1X10<16>/cm<3>, composed of non-doped GaN, low carrier concentration p-layer 51, approx. 0.5mum and 1X10<16>/cm<3> in hole density, made of Mg-doped GaN, and high carrier concentration p<+>-layer 52, approx. 0.2mum and 2X10<17>/cm<3> in hole density, are formed on a sapphire substrate 1 in this order. Both of the n-layers and p-layers consist of a plurality of layers which are stepwise increased in carrier concentration in the direction away from the p-n junction; the low carrier concentration n-layer 4 is almost equal to the low carrier concentration p-layer 51 in carrier concentration. As a result, the luminance and life are improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a blue light-emitting nitrogen-group III compound semiconductor light-emitting device.

[0002]

2. Description of the Related Art Conventionally, as a blue light emitting diode, one using a GaN compound semiconductor has been known. Its GaN
Since the compound semiconductors of the type are direct transition type, they have high luminous efficiency, and blue, which is one of the three primary colors of light, is used as the emission color, and so on.

Recently, it has become clear that p-type GaN can be obtained by doping Mg and irradiating it with an electron beam. As a result, the conventional n layer and semi-insulating layer (i
A GaN light emitting diode having a pn junction instead of a junction with a layer) has been proposed.

[0004]

However, even the light emitting diode having the above-mentioned pn junction has not yet obtained sufficient light emission brightness, and has not obtained a sufficient lifetime. Therefore, an object of the present invention is to provide a nitrogen-3 group compound semiconductor (including Al _x Ga _Y In _1-XY N; X = 0, Y = 0, X = Y = 0).
It is to improve the light emission brightness of a light emitting diode and to prolong the life of the device.

[0005]

The present invention is directed to n-type nitrogen-
Group 3 element compound semiconductor (Al _x Ga _Y In _1-XY N; X = 0, Y = 0, X = Y = 0
Layer) and a p-layer composed of a p-type nitrogen-group-3 element compound semiconductor (including Al _x Ga _Y In _1-XY N; X = 0, Y = 0, X = Y = 0) In the nitrogen-3 group element compound semiconductor light-emitting device having and, the n layer becomes more distant from the pn junction surface,
The p layer is formed of a plurality of n-type layers whose electron concentration increases stepwise, and the p layer is formed of a plurality of p-type layers whose hole concentration increases stepwise as the distance from the pn junction surface increases.
The p-type layer and the n-type layer that directly form the n-junction are characterized in that they have carrier concentrations substantially equal to each other.

The n-type layer and the p-type layer directly involved in the above pn junction have a carrier concentration of 1 × 10 ¹⁴ to 1 × 10 ¹⁶ / cm ^3.
It is desirable that they are substantially equal within the range.

[0007]

According to the present invention, the n-type layer and the p-type layer are formed in a multi-layer structure, and the n-type layer and the p-type layer are directly involved in the pn junction.
As a result of making the carrier concentrations of the mold layers approximately equal, the emission brightness is
The emission luminance was 10 mcd, which was twice as high as that of the conventional pn junction GaN light emitting diode. or,
The light emission lifetime is 10 ⁴ hours, which is 1.5 times that of the conventional pn junction GaN light emitting diode.

[0008]

First Embodiment Referring to FIG. 1, a light emitting diode 10 has a sapphire substrate 1, and the sapphire substrate 1 has 500 Å AlN.
Buffer layer 2 is formed. On the buffer layer 2, a film thickness of about 2.2 μm and an electron concentration of 2 × 10 ¹⁸ / cm ³ are sequentially formed.
The high carrier concentration n ⁺ layer 3 made of silicon-doped GaN and the low carrier concentration n layer 4 made of non-doped GaN having an electron concentration of 1 × 10 ¹⁶ / cm ³ are formed. Further, on the low carrier concentration n-layer 4, a film thickness of about 0.5 μm, a low carrier concentration p-layer 51 made of Mg-doped GaN with a hole concentration of 1 × 10 ¹⁶ / cm ³ , a film thickness of about 0.2 μm, and a hole. A high carrier concentration p ⁺ layer 52 having a concentration of 2 × 10 ¹⁷ / cm ³ is formed. Then, the electrode 7 formed of nickel connected to the high carrier concentration p ⁺ layer 52 and the high carrier concentration n ⁺
An electrode 8 made of nickel and connected to the layer 3 is formed. The electrode 8 and the electrode 7 are electrically insulated and separated by the groove 9.

Next, a method of manufacturing the light emitting diode 10 having this structure will be described. The light emitting diode 10 is
It was manufactured by vapor phase epitaxy by an organometallic compound vapor phase epitaxy method (hereinafter referred to as "M0VPE"). The gas used is NH
₃ and carrier gas H ₂ and trimethylgallium (Ga (CH ₃ ) ₃ ).
(Hereinafter referred to as "TMG") and trimethyl aluminum (Al
(CH _{3) 3)} is referred to (hereinafter referred to as "TMA") and silane (SiH ₄₎ and bis-cyclopentadienyl magnesium _{(Mg (C 5 H 5)} 2) ( hereinafter "CP ₂ Mg").

First, the single-crystal sapphire substrate 1 whose main surface is the A-plane cleaned by organic cleaning and heat treatment is mounted on a susceptor placed in the reaction chamber of the M0VPE apparatus. Then, at a pressure of 1100 while flowing H ₂ into the reaction chamber at a flow rate of 2 liter / min under normal pressure.
The sapphire substrate 1 was vapor-phase etched at 0 ° C.

Next, the temperature is lowered to 400 ° C. and H ₂ is added.
20 liter / min, NH ₃ 10 liter / min, TMA 1.8 × 10 ^-5
The buffer layer 2 of AlN was formed at a thickness of about 500Å by supplying at a mol / min. Next, the temperature of the sapphire substrate 1 is set to 1150.
Hold at ₂ ℃, H ₂ 20 liter / min, NH ₃ 10 liter / min,
Silane (SiH ₄ ) diluted with TMG at 1.7 × 10 ^-4 mol / min and 0.86 ppm with H ₂ was supplied at a rate of 200 ml / min for 30 minutes to obtain a film thickness of about 2.2 μm and electron concentration of 2 × 10 ¹⁸ / A high carrier concentration n ⁺ layer 3 made of GaN of cm ³ was formed.

Then, the temperature of the sapphire substrate 1 is set to 1150 ° C.
, H ₂ 20 liter / min, NH ₃ 10 liter / min, TMG
For 20 minutes at a rate of 1.7 × 10 ^-4 mol / min,
A low carrier concentration n layer 4 made of GaN having an electron concentration of 1 × 10 ¹⁶ / cm ^{3 and having} a thickness of 1.5 μm was formed.

Next, the sapphire substrate 1 is heated to 1150 ° C.,
H ₂ 20 liter / min, NH ₃ 10 liter / min, TMG 1.7
X 10 ^-4 mol / min, CP ₂ Mg at a rate of 8 x 10 ^-8 mol / min 7
By supplying for a minute, a low carrier concentration p layer 51 made of GaN having a film thickness of 0.5 μm was formed. In this state, the low carrier concentration p layer 51 is still an insulator having a resistivity of 10 ⁸ Ωcm or more.

Next, the sapphire substrate 1 is heated to 1150 ° C.,
H ₂ 20 liter / min, NH ₃ 10 liter / min, TMG 1.7
× 10 ^-4 mol / min, CP ₂ Mg at a rate of 3 × 10 ^-7 mol / min 3
By supplying for a minute, a high carrier concentration p ⁺ layer 52 made of GaN having a film thickness of 0.2 μm was formed. In this state, the high carrier concentration p ⁺ layer 52 is still an insulator having a resistivity of 10 ⁸ Ωcm or more.

Next, a high carrier concentration p ⁺ layer 52 and a low carrier concentration p layer 5 are used by using a backscattered electron diffraction apparatus.
1 was uniformly irradiated with an electron beam. The electron beam irradiation conditions are: acceleration voltage 10KV, sample current 1μA, beam moving speed 0.2mm /
sec, beam diameter 60 μmφ, vacuum degree 2.1 × 10 ⁻⁵ Torr. By this electron beam irradiation, the low carrier concentration p-layer 51
Is a p-conducting semiconductor having a hole concentration of 1 × 10 ¹⁶ / cm ³ and a resistivity of 40 Ωcm, and the high carrier concentration p ⁺ layer 52 is a p-conducting semiconductor having a hole concentration of 2 × 10 ¹⁷ / cm ³ and a resistivity of 2 Ωcm. became. In this way, a wafer having a multilayer structure as shown in FIG. 2 was obtained.

FIGS. 3 to 7 described below are cross-sectional views showing only one element on the wafer. In fact, a wafer in which this element is continuously repeated is processed, and then each of the elements is processed. It is cut for each element.

As shown in FIG. 3, a SiO ₂ layer 11 of 2000 Å is sputtered on the high carrier concentration p ⁺ layer 52.
Formed to a thickness of. Next, a photoresist 12 was applied on the SiO ₂ layer 11. Then, by photolithography, on the high carrier concentration p ⁺ layer 52, the electrode formation portion A corresponding to the hole 15 formed to reach the high carrier concentration n ⁺ layer 3 and the electrode formation portion thereof are formed into the high carrier concentration p ^{+ layer.}
The photoresist at the portion B where the groove 9 for insulating and separating from the electrode of the layer 52 is formed is removed.

Next, as shown in FIG. 4, the SiO ₂ layer 11 not covered with the photoresist 12 was removed with a hydrofluoric acid type etching solution. Next, as shown in FIG.
The high carrier concentration p ⁺ layer 52 in a portion not covered by the photoresist 12 and the SiO ₂ layer 11 and the upper surface of the low carrier concentration p layer 51, the low carrier concentration n layer 4, and the high carrier concentration n ⁺ layer 3 thereunder. The parts were dry-etched by supplying a vacuum degree of 0.04 Torr, a high-frequency power of 0.44 W / cm ² and a BCl ₃ gas at a rate of 10 ml / min, and then dry-etching with Ar. In this step, a hole 15 for taking out an electrode and a groove 9 for insulation separation were formed for the high carrier concentration n ⁺ layer 3.

Next, as shown in FIG. 6, the SiO ₂ layer 11 remaining on the high carrier concentration p ⁺ layer 52 was removed with hydrofluoric acid. Next, as shown in FIG.
The Ni layer 13 was formed by vapor deposition. As a result, the Ni layer 13 electrically connected to the high carrier concentration n ⁺ layer 3 is formed in the hole 15. Then, a photoresist 14 is applied onto the Ni layer 13, and by photolithography, the photoresist 14 is left with an electrode portion for the high carrier concentration n ⁺ layer 3 and the high carrier concentration p ⁺ layer 52.
A pattern was formed into a predetermined shape.

Next, as shown in FIG. 7, the exposed portion of the lower Ni layer 13 was etched with a nitric acid-based etching solution using the photoresist 14 as a mask. At this time, the Ni layer 13 deposited in the groove 9 for insulation separation is completely removed.
Next, the photoresist 14 is removed with acetone, the electrode 8 of the high carrier concentration n ⁺ layer 3 and the high carrier concentration p ⁺ layer 52 are removed.
Of the electrode 7 was left. Then, the wafer treated as described above was cut into each element to obtain a pn structure gallium nitride-based light emitting element shown in FIG.

The light emission intensity of the light emitting diode 10 thus manufactured was measured and found to be 10 mcd, which was twice as high as that of the conventional pn junction GaN light emitting diode. The light emission life was 10 ⁴ hours, which was 1.5 times that of the conventional pn junction GaN light emitting diode.

The magnesium Mg doping gas used in the above embodiment may be methylbiscyclopentadienyl magnesium Mg (C ₆ H ₇ ) ₂ in addition to the above gases.

The electron concentration of the low carrier concentration n layer 4 is 1
It is desirable that the film thickness is x10 ¹⁴ to 1x10 ¹⁶ / cm ³ and the film thickness is 0.5 to 2 µm. When the electron concentration is 1 × 10 ¹⁶ / cm ³ or more, the emission intensity decreases, which is not desirable. When the electron concentration is 1 × 10 ¹⁴ / cm ³ or less, the series resistance of the light emitting element becomes too high and heat is generated when an electric current is applied. . Further, if the film thickness is 2 μm or more, the series resistance of the light emitting element becomes too high and heat is generated when an electric current is applied, which is not desirable, and if the film thickness is 0.5 μm or less, the emission intensity decreases, which is not desirable.

Further, the high carrier concentration n ⁺ layer 3 preferably has an electron concentration of 1 × 10 ¹⁶ to 1 × 10 ¹⁹ / cm ³ and a film thickness of 2 to 10 μm. When the electron concentration is 1 × 10 ¹⁹ / cm ³ or more, the crystallinity is deteriorated, which is not desirable. When the electron concentration is 1 × 10 ¹⁶ / cm ³ or less, the series resistance of the light emitting element becomes too high and heat is generated when a current is applied, which is not desirable. . Further, if the film thickness is 10 μm or more, the substrate is curved, which is not desirable.

The low carrier concentration p-layer 51 has a hole concentration of 1 × 10 ¹⁴ to 1 × 10 ¹⁶ / cm ³ and a film thickness of 0.2 to 1 μm.
Is desirable. When the hole concentration is 1 × 10 ¹⁶ / cm ³ or more, the matching with the low carrier concentration n-layer 4 becomes poor and the luminous efficiency is lowered, which is not desirable, and when the hole concentration is 1 × 10 ¹⁴ / cm ³ or less, the series resistance becomes high. It is not desirable because it becomes too much. Further, if the film thickness is 1 μm or more, the series resistance is increased, which is not desirable, and if the film thickness is 0.2 μm or less, the emission brightness is decreased, which is not desirable.

Further, the hole concentration of the high carrier concentration p ⁺ layer 52 is preferably 1 × 10 ¹⁶ to 2 × 10 ¹⁹ / cm ³ , and the film thickness is preferably 0.2 μm. A p ⁺ layer having a hole concentration of 2 × 10 ¹⁹ / cm ³ or more cannot be formed. When it is 1 × 10 ¹⁶ / cm ³ or less, the series resistance becomes high, which is not desirable. Further, if the film thickness is 0.5 μm or more, the series resistance becomes high, which is not desirable, and the film thickness is 0.
If it is less than 1 μm, the hole injection efficiency decreases, which is not desirable.

Second Embodiment In FIG. 8, a light emitting diode 10 has a sapphire substrate 1, and the sapphire substrate 1 has 500 Å AlN.
Buffer layer 2 is formed. On the buffer layer 2, a film thickness of about 2.2 μm and an electron concentration of 2 × 10 ¹⁸ / cm ³ are sequentially formed.
A high carrier concentration n ⁺ layer 3 made of silicon-doped GaN and a low carrier concentration n layer 4 made of non-doped GaN having an electron concentration of 1 × 10 ¹⁵ / cm ³ and a film thickness of about 1.5 μm. Further, on the low carrier concentration n-layer 4, a film thickness of about 0.2 μm, a low carrier concentration p-layer 51 made of Mg-doped GaN with a hole concentration of 1 × 10 ¹⁵ / cm ³ , a film thickness of about 0.5 μm, and a hole are formed. A first high carrier concentration p ⁺ layer 52 having a concentration of 1 × 10 ¹⁶ / cm ³ ,
A second high carrier concentration p ⁺ layer 53 having a film thickness of about 0.2 μm and a hole concentration of 1 × 10 ¹⁷ / cm ³ is formed. Then, an electrode 7 formed of nickel and connected to the second high carrier concentration p ⁺ layer 53 and an electrode 8 formed of nickel and connected to the high carrier concentration n ⁺ layer 3 are formed. The electrode 8 and the electrode 7 are electrically insulated and separated by the groove 9. As described above, the light emitting diode 10 of the present embodiment is characterized in that the p layer is formed of three layers in which the hole concentration changes in three steps. The manufacturing method is the same as in the first embodiment.

As described above, the n layer is formed of a multi-layer in which the electron concentration increases stepwise in the direction away from the pn junction surface, and p
Since the layers are formed of multiple layers in which the hole concentration increases stepwise in the direction away from the pn junction surface, a voltage should be applied between the p-type layer with the highest hole concentration and the n-type layer with the highest electron concentration. Then, electrons and holes are efficiently accelerated in each layer and efficiently injected into the opposite conductivity type layer through the pn junction surface. As a result, the emission brightness was improved.

Third Embodiment In FIG. 9, a light emitting diode 10 has a sapphire substrate 1, and the sapphire substrate 1 has 500 Å AlN.
Buffer layer 2 is formed. On the buffer layer 2, a film thickness of about 2.2 μm and an electron concentration of 2 × 10 ¹⁸ / cm ³ are sequentially formed.
The high carrier concentration n ⁺ layer 3 made of silicon-doped GaN and the low carrier concentration n layer 4 made of non-doped GaN having an electron concentration of 1 × 10 ¹⁶ / cm ³ are formed. Further, on the low carrier concentration n-layer 4, in order, a film thickness of about 0.5 μm, a low impurity concentration i-layer 61 made of Mg-doped GaN with a Mg concentration of 5 × 10 ¹⁹ / cm ³ , a film thickness of about 0.2 μm, Mg. Concentration 2 x
A high impurity concentration i ⁺ layer 62 of 10 ²⁰ / cm ³ is formed.

Then, in the predetermined regions of the low impurity concentration i layer 61 and the high impurity concentration i ⁺ layer 62, a low carrier concentration of 1 × 10 ¹⁶ / cm ³ of a hole concentration which is made p-conductivity type by electron beam irradiation. A p layer 501 and a high carrier concentration p ⁺ layer 502 having a hole concentration of 2 × 10 ¹⁷ / cm ³ are formed.

[0031] Further, from the upper surface of the high impurity concentration i ⁺ layer 62, the high impurity concentration i ⁺ layer 62, low impurity concentration i layer 61,
A hole 15 is formed which penetrates the low carrier concentration n layer 4 and reaches the high carrier concentration n ⁺ layer 3. An electrode 81 made of nickel joined to the high carrier concentration n ⁺ layer 3 through the hole 15 is formed on the high impurity concentration i ⁺ layer 62. Further, on the upper surface of the high carrier concentration p ⁺ layer 502, the electrode 71 formed of nickel for high carrier concentration p ⁺ layer 502 is formed. High carrier concentration n ⁺ layer 3
The electrode 81 is isolated from the high carrier concentration p ⁺ layer 502 and the low carrier concentration p layer 501 by a high impurity concentration i ⁺ layer 62 and a low impurity concentration i layer 61.

Next, a method of manufacturing the light emitting diode 10 having this structure will be described. 10 to 16 showing the manufacturing process are cross-sectional views of only one element on the wafer, and the following manufacturing process is actually performed on the wafer in which the elements shown in the drawing are repeatedly formed. Then, finally, the wafer is cut to form each light emitting element.

The wafer shown in FIG. 10 is manufactured in the same manner as in the first embodiment. Next, as shown in FIG. 11, the SiO ₂ layer 1 is sputtered on the high impurity concentration i ⁺ layer 62.
1 was formed to a thickness of 2000Å. Next, a photoresist 12 was applied on the SiO ₂ layer 11. Then, by photolithography, the photoresist in the electrode formation site A corresponding to the hole 15 formed in the high impurity concentration i ⁺ layer 62 to reach the high carrier concentration n ⁺ layer 3 was removed.

Next, as shown in FIG. 12, the SiO ₂ layer 11 not covered with the photoresist 12 was removed with a hydrofluoric acid type etching solution. Next, as shown in FIG. 13, a high impurity concentration i ⁺ layer 62 in a portion not covered with the photoresist 12 and the SiO ₂ layer 11, a low impurity concentration i layer 61 thereunder, and a low carrier concentration n layer 4 are formed. A part of the upper surface of the high carrier concentration n ⁺ layer 3 was dry-etched by supplying a vacuum degree of 0.04 Torr, a high frequency power of 0.44 W / cm ² and BCl ₃ gas at a rate of 10 ml / min, and then dry etching with Ar. In this step, the hole 15 for taking out the electrode for the high carrier concentration n ⁺ layer 3 was formed. Next, as shown in FIG. 14, the SiO ₂ layer 11 remaining on the high impurity concentration i ⁺ layer 62 is formed.
Was removed with hydrofluoric acid.

Next, as shown in FIG. 15, electron beams are irradiated to only predetermined regions of the high impurity concentration i ⁺ layer 62 and the low impurity concentration i layer 61 by using a backscattered electron beam diffractometer, respectively. A high carrier concentration p ⁺ layer 502 having a hole concentration of 2 × 10 ¹⁷ / cm ³ and a low carrier concentration p layer 501 having a hole concentration of 1 × 10 ¹⁶ / cm ³ having a p-conduction type were formed.

The electron beam irradiation conditions are as follows: acceleration voltage 10 KV, sample current 1 μA, beam moving speed 0.2 mm / sec, beam diameter 60.
μmφ, vacuum degree 2.1 × 10 ⁻⁵ Torr. At this time, the portions other than the high carrier concentration p ⁺ layer 502 and the low carrier concentration p layer 501, that is, the portions not irradiated with the electron beam, are the high impurity concentration i ⁺ layer 62 and the low impurity concentration i layer 6 of the insulator.
It remains 1. Therefore, the high carrier concentration p ⁺ layer 502
And the low carrier concentration p-layer 501 is
The low carrier concentration n layer 4 is electrically connected, but in the lateral direction, a high impurity concentration i ⁺ layer 62 and a low impurity concentration i are formed with respect to the surroundings.
It is electrically isolated by the layer 61.

Next, as shown in FIG. 16, a high carrier concentration p ⁺ layer 502, a high impurity concentration i ⁺ layer 62, a high carrier concentration n ⁺ through the upper surface of the high impurity concentration i ⁺ layer 62 and the hole 15. ^A Ni layer 20 was formed on the ⁺ layer 3 by vapor deposition. Then, a photoresist 21 is applied on the Ni layer 20, and the photoresist 21 is applied by photolithography.
Has a high carrier concentration n ⁺ layer 3 and a high carrier concentration p ⁺ layer 5
A pattern was formed in a predetermined shape so that the electrode portion for 02 was left. Next, using the photoresist 21 as a mask, the exposed portion of the lower Ni layer 20 was etched with a nitric acid-based etching solution, and the photoresist 21 was removed with acetone.
Thus, as shown in FIG. 9, the high carrier concentration n
The electrode 81 of the ⁺ layer 3 and the electrode 71 of the high carrier concentration p ⁺ layer 502 were formed. After that, the wafer formed as described above was cut into each element.

The light emission intensity of the light emitting diode 10 thus manufactured was measured and found to be 10 mcd and the light emission life was 10 ⁴ hours, as in the first embodiment.

Fourth Embodiment A light emitting diode 10 may be constructed as shown in FIG. That is, the film thickness is about 0.
2 μm, second high carrier concentration p ⁺ layer 53 with hole concentration 2 × 10 ¹⁷ / cm ³ , film thickness about 0.5 μm, hole concentration 1 × 10 ¹⁶ / cm ³
A first high carrier concentration p ⁺ layer 52, a low carrier concentration p layer 51 made of Mg-doped GaN with a film thickness of about 0.2 μm and a hole concentration of 1 × 10 ¹⁵ / cm ³ . Then, on the low carrier concentration p-layer 51, a film thickness of about 1.5 μm and an electron concentration of 1
× 10 ¹⁵ / cm ³ low carrier concentration n consisting of undoped GaN
Layer 4, a film thickness of about 2.2 [mu] m, the electron concentration 2 × 10 ¹⁸ / cm ³ of silicon-doped high carrier concentration n ⁺ layer 3 made of GaN is formed.

An electrode 72 formed of nickel and connected to the second high carrier concentration p ⁺ layer 53 and an electrode 82 formed of nickel and connected to the high carrier concentration n ⁺ layer 3 are formed. The electrode 82 and the electrode 72 are electrically insulated from each other by the groove 91 formed in the high carrier concentration n ⁺ layer 3, the low carrier concentration n layer 4, the low carrier concentration p layer 51 and the first high carrier concentration p ⁺ layer 52. It is separated.

As described above, this embodiment is different from the second embodiment in that the deposition order of the p layer and the n layer on the substrate 1 is reversed. The manufacture can be performed in the same manner as in the second embodiment.

Fifth Embodiment In the light emitting diode 10 of the first embodiment having the structure shown in FIG. 1, a high carrier concentration n ⁺ layer 3, a low carrier concentration n layer 4, a low carrier concentration p layer 51, and a high carrier concentration p ^+. Layer 5
2 was Al _0.2 Ga _0.5 In _0.3 N, respectively. The high carrier concentration n ⁺ layer 3 has an electron concentration of 2 × 10 ¹⁸ by adding silicon.
/ formed in cm ^3, the low carrier concentration n layer 4 was formed by adding an impurity-free electron concentration 1 × 10 ¹⁶ / cm ^3. The low carrier concentration p layer 51 is formed by adding magnesium (Mg) and irradiating it with an electron beam so that the hole concentration is 1 × 10 ¹⁶ / cm ³ , and the high carrier concentration p ⁺ layer 5 is formed.
Similarly, No. 2 was formed by adding magnesium (Mg) and irradiating it with an electron beam so that the hole concentration was 2 × 10 ¹⁷ / cm ³ . Then, an electrode 7 made of nickel and connected to the high carrier concentration p ⁺ layer 52 and an electrode 8 made of nickel and connected to the high carrier concentration n ⁺ layer 3 were formed.

Next, the light emitting diode 10 having this structure can be manufactured similarly to the light emitting diode of the first embodiment. Trimethylindium (In (CH ₃ ) ₃ ) was used in addition to TMG, TMA, silane, CP ₂ Mg gas. The generation temperature and gas flow rate are the same as in the first embodiment. The flow rates of the other gases are the same as those in the first embodiment except that trimethylindium is supplied at 1.7 × 10 ⁻⁴ mol / min.

Then, similarly to the first embodiment, the high carrier concentration p ⁺ layer 52 and the low carrier concentration p layer 51 are uniformly irradiated with an electron beam by using a reflection electron beam diffractometer. A p-conduction type semiconductor could be obtained.

Next, similarly to the first embodiment, electrodes 7 and 8 made of nickel for the high carrier concentration n ⁺ layer 3 and the high carrier concentration p ⁺ layer 52 were formed.

The light emission intensity of the light emitting diode 10 thus manufactured was measured and found to be 10 mcd, which was twice as high as that of a conventional pn junction GaN light emitting diode. The light emission life was 10 ⁴ hours, which was 1.5 times that of the conventional pn junction GaN light emitting diode.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a configuration of a light emitting diode according to a first specific example of the present invention.

FIG. 2 is a cross-sectional view showing a manufacturing process of the light emitting diode of the same embodiment.

FIG. 3 is a cross-sectional view showing a manufacturing process of the light emitting diode of the embodiment.

FIG. 4 is a cross-sectional view showing a manufacturing process of the light emitting diode of the same embodiment.

FIG. 5 is a cross-sectional view showing the manufacturing process of the light emitting diode of the same embodiment.

FIG. 6 is a cross-sectional view showing a manufacturing process of the light emitting diode of the embodiment.

FIG. 7 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

FIG. 8 is a configuration diagram showing a configuration of a light emitting diode according to a second specific example of the present invention.

FIG. 9 is a configuration diagram showing a configuration of a light emitting diode according to a third specific example of the present invention.

FIG. 10 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

FIG. 11 is a cross-sectional view showing the manufacturing process of the light-emitting diode of the example.

FIG. 12 is a cross-sectional view showing the manufacturing process of the light-emitting diode of the example.

FIG. 13 is a cross-sectional view showing the manufacturing process of the light-emitting diode of the example.

FIG. 14 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

FIG. 15 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

FIG. 16 is a sectional view showing a manufacturing process of the light emitting diode of the embodiment.

FIG. 17 is a configuration diagram showing a configuration of a light emitting diode according to a fourth specific example of the present invention.

[Explanation of symbols]

10 ... Light emitting diode 1 ... Sapphire substrate 2 ... Buffer layer 3 ... High carrier concentration n ⁺ layer 4 ... Low carrier concentration n layer 51,501 ... Low carrier concentration p layer 52 ... High carrier concentration p ⁺ layer (1st high carrier concentration) p ⁺
502 ... High carrier concentration p ⁺ layer 53 ... Second high carrier concentration p ⁺ layer 61 ... Low impurity concentration i layer 62 ... High impurity concentration i ⁺ layer 7,8,71,72,81,82 ... Electrode 9, 91 ... Groove

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shiro Yamazaki 1 Ochiai, Nagachiji, Kasuga-cho, Nishikasugai-gun, Aichi Toyoda Gosei Co., Ltd. Toyoda Gosei Co., Ltd.

Claims (1)

[Claims] 1. An n-type nitrogen-3 group element compound semiconductor (Al _x
Ga _Y In _1-XY N; including X = 0, Y = 0, X = Y = 0)),
p-type nitrogen-3 group compound semiconductor (Al _x Ga _Y In _1-XY N; X =
0, Y = 0, X = Y = 0) and a nitrogen layer-group 3 compound semiconductor light emitting device having a p-layer composed of 0, Y = 0, and X = Y = 0). The p-type layer is formed of a plurality of p-type layers that increase in hole concentration stepwise with increasing distance from the pn junction surface. And the n-type layer are formed so that carrier concentrations are substantially equal to each other.