JPH06148680A - Matrix type liquid crystal display device - Google Patents

Abstract

PURPOSE:To miniaturize a driving circuit, to simplify the device and to improve reliability by connecting adjacent thin film transistor(TFT) drain electrodes in the respective rows of a matrix panel in common while collecting them for any arbitrary unit, and independently controlling the respective electrodes. CONSTITUTION:This device is composed of a liquid crystal panel filling liquid crystal between a TFT substrate 1, for which TFT groups 300 composed of respective parts such as TFT 30 and 31, picture element electrodes 10 and 11 and signal line 101 are arranged in the shape of a matrix, and a common electrode substrate and a scan driving circuit 2 or the like, and the picture elements of (n) rows and (m) columns are provided as a whole. Then, drain electrodes D of the adjacent TFT 30 and 31 in the respective rows are connected in common while being collected for the unit of (t) (arbitrary) pieces of electrodes and formed by one signal line 101, and (t) pieces of scanning lines are formed for each row so as to independently control each TFT. Thus, a number U of driving circuits in the entire device is made U>=tXn/k+m/tXk, the number of driving circuits is reduced in the case of n<=m, the entire display device can be miniaturized, and the number of signal driving circuits for outputting is reduced to 1/t as well.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a matrix display device, and more particularly to a matrix device which can reduce the size of a drive circuit on the signal side, reduce the number of used circuits, and downsize the display device.

[0002]

2. Description of the Related Art As a flat display, MOS,
There is known a liquid crystal active matrix display device that displays an image by using a three-terminal element such as a thin film transistor (hereinafter referred to as a TFT) and a two-terminal element such as a MIM (Metal-Insurator-Metal) and a switching element.

A conventional liquid crystal active matrix display device by driving a TFT is disclosed in JP-A-60-9732.
There is one shown in No. 2. This is composed of a TFT group in which two or more TFTs having the same electric characteristics are combined in a liquid crystal matrix panel having a substrate in which TFTs for independently driving each pixel are formed in a matrix, and are included in the same group. The TFT is characterized in that it is connected to the same scanning line and signal line. One TF at this time
By considering each pixel connected to the TFTs included in the T group as one pixel, it is possible to reduce the occurrence of complete pixel defects due to defective operation of the TFTs.

[0004]

In the above-described liquid crystal active matrix display device according to the prior art, since one pixel is formed by a plurality of divided pixels, the number of TFTs and the number of divided pixels formed on the panel increases. If the size of one pixel is fixed, it is necessary to make the TFT and the divided pixel small, so that the malfunction of the TFT is increased and the area of the pixel electrode is reduced, and the definition is lowered.

A matrix panel in which pixels of n rows and m columns are arranged in a matrix has n scanning lines and m signal lines.
I need a book. Therefore, the numbers of outputs of the scanning drive circuit and the signal drive circuit are n and m, respectively. When a drive device is configured using drive circuits having k outputs, the total number U of drive circuits must be U ≧ n / k + m / k. Especially when applied to a monitor of a terminal device such as a computer, a high-definition matrix panel is required, and the number of pixels at this time is 4
With more than 600,000 pixels, the number of drive circuits becomes very large. Further, in the case of performing color display, the circuit area of the signal drive circuit is large because the circuit is more complicated than the scan drive circuit. As described above, when a high-definition matrix panel is driven by the conventional technique, the scale of the drive circuit becomes very large, which makes it difficult to reduce the size and weight of the display device and has a problem in reliability.

An object of the present invention is to reduce the size of the drive circuit of the entire device and achieve simplification and high reliability of the device.

[0007]

In order to achieve the above object, the present invention provides a matrix panel consisting of pixels of n rows and m columns, in which the number of adjacent drain electrodes of the TFT thin film for each row is t (where , T are arbitrary) and connected in common to form a single signal line, and t in each row so that each commonly connected TFT can be independently controlled.
Form a scan line of a book.

[0008]

By using the above means, the number of scanning lines is t times that of the conventional example, and the number of one signal line is 1 / t times. As a result, the number U of drive circuits of the entire device is U ≧
In the case of (t × n) / k + m / (t × k), where n ≦ m, the number of drive circuits is reduced and the miniaturization of the entire display device can be improved. Further, since the number of signal lines is 1 / t, the number of outputs of the signal driving circuit, which is more complicated than that of the scanning circuit, is 1
Therefore, the circuit scale can be reduced.

[0009]

FIG. 1 shows an example of the structure of a liquid crystal active matrix display device according to the present invention.

The device comprises TFTs 30, 31, pixel electrodes 10,
11, scanning lines 104 and 105, gate connection lines 106 and 1
07, TFT group 30 composed of signal line 101 parts
A liquid crystal panel in which liquid crystal is sealed between a TFT substrate 1 in which 0s are arranged in a matrix and a common electrode substrate (not shown) provided with a common electrode 6, a scanning drive circuit 2, a signal drive circuit 3, a frame memory circuit 5 to form a matrix display device having pixels of n rows and m columns as a whole.

The configuration of the panel, which is a feature of this embodiment, will be described below. The TFT 3 is formed on the adjacent pixel electrodes 10 and 11.
The source electrodes S of 0 and 31 are connected and the TFT is
Both the drain electrodes D of 30 and 31 are connected to the signal line 101. In addition, the gate electrode of the TFT 30 is connected to the scanning line 10
4 via the gate connection line 106 and TFT
The gate electrode 31 is connected to the scanning line 105 and the gate connection line 107.
Connect through. In this way, the TFT group 300 is formed, and similarly, the TFT group is formed in a matrix on the entire panel. By this connection, each TFT in the TFT group can be independently controlled to be turned on or off. Next, each scanning line is connected to the output terminal of the scanning drive circuit 2, and each signal line is connected to the output terminal of the signal drive circuit 3. In the same manner, scan lines and signal lines of the entire panel are connected to the drive circuit. By doing so, independent drive voltages can be applied to the scanning lines and the signal lines. The input terminal of the signal drive circuit 3 is connected to the output terminal of the frame memory circuit 5, and the input terminal of the frame circuit 5 is connected to the video signal source 4. The frame memory circuit 5 takes in the video signal output from the video signal source 4 such as a personal computer, converts the data output order of the video signal, and outputs the data. This conversion method will be described with reference to FIG. As shown in FIG. 2, when m is a multiple of 2 (even number), 1, 2, 3, and 3 are obtained every horizontal scanning period (1H).
4, ..., m-1, m-th column data, such as sequentially transmitted video signals are converted by the frame memory circuit,
.., m-1 column data are sequentially output every 1H during one horizontal odd column period (1/2 horizontal scanning period), and then the even column data is 2, 4 ,. The column data is sequentially output during one horizontal even column period (1/2 horizontal scanning period). By converting this video signal, the output terminal of the signal drive circuit 3 generates the signal voltage of the odd-numbered column at the first 1 / 2H at 1H and outputs the signal voltage of the even-numbered column at the next 1 / 2H. become. As a result, by providing the frame memory circuit between the video signal source and the signal voltage drive circuit, it becomes possible to apply a predetermined signal voltage to each pixel electrode of the liquid crystal matrix panel of this embodiment.

Next, a method of driving the liquid crystal matrix panel of this embodiment will be described with reference to FIG.

For example, in order to drive the liquid crystal pixels in the first column and the first row of the panel in the embodiment, the scanning voltage V is applied to the scanning line 104.
G (104) is applied to turn on the TFT 30 for 1/2 H
Set to N state. In this state, the signal voltage VD is applied to the signal line 101.
(101) is applied to drive the liquid crystal pixels. Similarly, when the scanning voltage VG (104) is applied, the signal voltage is applied to all the signal lines to drive all the odd-numbered column liquid crystal pixels in the first row. At this time, the Ts of all the liquid crystal pixels in the first row
Since the FT is in the OFF state, no change occurs in the liquid crystal pixel.

Next, the TF connected to the scanning line 104
T, that is, when the TFTs connected to all the odd-numbered column liquid crystal pixels in the first row are turned off, the scanning voltage VG (105) is applied to the scanning line 105 to set the even-numbered TFTs 31 to 1 / 2H. Turn on for a period. In this state, the signal line 10
The signal voltage VD (101) is applied to the signal 1 to drive the liquid crystal pixels. Similarly, when the scanning voltage VG (105) is applied, the signal voltage is applied to all the signal lines to drive all the even-numbered column liquid crystal pixels in the first row. At this time, since the TFTs of all the odd-numbered and even-numbered liquid crystal pixels in the first row are in the OFF state, no change occurs in the liquid crystal pixels. In this way, all the liquid crystal pixels in the first row are driven in the period of 1H. Hereinafter, a scanning voltage is sequentially applied to the scanning lines of the panel to drive all pixels.

As a result, by using the above means,
In the liquid crystal matrix panel having pixels of n rows and m columns, the number of scanning lines is doubled as compared with the conventional example, and the number of one signal line is halved. As a result, the number U of drive circuits of the entire device is U ≧ when the number of outputs of one drive circuit is k.
(2 × n) / k + m / (2 × k), and when n ≦ m, the number of drive circuits is reduced. This makes it possible to improve the miniaturization of the entire display device. Further, since the number of signal lines is halved, the number of outputs of the signal drive circuit is halved, and the circuit scale can be reduced.

In this embodiment, m is a multiple (even number) of 2, but when m is an odd number, as shown in FIG. 4, the pixel configuration up to the (m-1) th column is the same as that of the above embodiment. In the pixel configuration of the 1st row and the mth column, the source electrode of the TFT 48 is connected to the pixel electrode 28, the gate electrode of the TFT 48 is connected to the scanning line 104, and the drain electrode of the TFT 48 is connected to the signal line 110. Similarly, the m-th pixel electrode in each row is connected to the signal line 110. As described above, the number of TFTs connected per row does not have to be the same in all signal lines, and a signal line different from other signal lines in the TFT connected per row may be provided.

In the embodiment of FIG. 1, the scan line 104
Since wirings 105 and 105 are formed on the pixel electrodes 30 and 31, a gate connection line 106 is required to connect the scanning line 104 and the gate electrode of the TFT 30. Since the gate connection line 106 and the scanning line 105 intersect, a wiring intersection 108 occurs. However, as shown in FIG. 5, scan lines 104 and 1
By arranging wirings on the upper and lower portions of the pixel electrodes 30 and 31 in 05, a structure in which wiring crossing between the gate connection line and the scanning line does not occur can be achieved, and malfunctions can be reduced.

In the embodiment having the panel structure of FIG. 1, the pixel electrodes are arranged horizontally and vertically, but as shown in FIG. 6, for example, when the pixel electrode 12 is directly below the pixel electrode 10. Alternatively, a panel structure having a delta arrangement in which the pixel electrodes 10 and 11 are arranged diagonally below the pixel electrodes by being shifted by half a pixel in the horizontal direction may be used even when the signal line 101 is made to meander.

In the embodiment shown in FIG. 1, a video signal output from a video signal source such as a personal computer is converted into a video signal capable of driving the embodiment panel by using a frame memory circuit. For example, a video signal capable of driving the panel may be directly output to the signal drive circuit, or a signal drive circuit may have a function of converting the video signal into a video signal capable of driving the embodiment panel.

In the embodiment shown in FIG. 1, the TFT is
Although the group is composed of two TFTs, as shown in FIG. 7, for example, three TFTs 220 to 222 include one signal line 21.
Alternatively, it may be connected to two or, although not shown, a panel is formed by a TFT group including four or more TFTs per row. At that time, for example, the TFT of FIG.
Each T connected in common to one signal line such that 250 is connected to the scanning line 201, TFT 251 is connected to the scanning line 202, and TFT 252 is connected to the scanning line 203.
The gate electrodes of each TFT are connected to different scanning lines so that the FT can be controlled independently, and a TFT group 301 is formed. Even when the TFT group consists of four or more TFTs, the source electrodes of the TFTs in the group are connected to individual pixel electrodes, each drain electrode is connected to one signal line, and each gate electrode is connected to a separate scanning line. It only needs to be connected. At this time, the output state of the frame memory circuit also changes. For example, when three TFTs are connected to one signal line, the output of the frame memory circuit is 1H period when m is a multiple of 3 as shown in FIG. 1, 4, 7, ... M-5, m-2 column data is output in the first 1 / 3H period, and 2, 5, 8 ,.
The −4, m−1th column data is output in the next 1 / 3H period, and in the last 1 / 3H period, the data of 3, 6, 9, ..., M−3, m columns are sequentially output. As a result, as shown in FIG. 9, when each scanning line is selected, a predetermined signal can be applied to the pixel electrode connected to the scanning line via the TFT. It is sufficient that one row has three or more TFTs. The same applies when connected to a signal line. Thus, 3 or more TFs per line
Even when T is connected to one signal line, the data output of the video signal is converted by the frame memory circuit, and the data output order of the video signal is rearranged to connect to the scanning line through the thin film transistor. A predetermined signal voltage can be applied to the pixel electrode.

[0021]

As described above in detail, according to the present invention, it is possible to reduce the size of the entire display device by reducing the number of drive circuits used for driving the matrix type liquid crystal display panel.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of a matrix type liquid crystal display panel according to the present invention.

FIG. 2 is a diagram showing an example of video signal conversion of a frame memory circuit according to the present invention.

FIG. 3 is a diagram showing an example of drive timing according to the present invention.

FIG. 4 is a diagram showing a modified example of the present invention.

FIG. 5 is a diagram showing a modified example of the present invention.

FIG. 6 is a diagram showing a modified example of the present invention.

FIG. 7 is a diagram showing an application example of the present invention.

FIG. 8 is a diagram showing an example of video signal conversion of a frame memory circuit for an application example of the present invention.

FIG. 9 is a diagram showing an example of drive timing for an application example of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... TFT substrate, 2 ... Scan drive circuit, 3 ... Signal drive circuit, 4 ... Video signal source, 5 ... Frame memory circuit, 6 ... Common electrode, 10, 11, 28 ... Pixel electrode, 30, 31, 4
8,250,251,252 ... TFT, 101,11
0, 212 ... Signal lines, 104, 105, 201, 20
2, 203 ... Scan line, 106, 107 ... Gate connection line,
108 ... Wiring intersection, 300, 301 ... TFT group.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁵ Identification number Internal reference number FI Technical indication location H01L 29/784 (72) Inventor Naofumi Kakei 7-1, 1-1 Omika-cho, Hitachi-shi, Ibaraki Hitachi, Ltd. Hitachi Research Laboratory

Claims (3)

[Claims] 1. A liquid crystal is enclosed in a pair of substrates, a common electrode is provided on one of the substrates, a thin film transistor is arranged in a matrix on the other substrate, and a pixel electrode is connected to a source electrode of the thin film transistor in a one-to-one relationship. A thin film transistor group in which adjacent thin film transistors in each row are grouped in t units (where t is arbitrary), a signal line to which the drain electrodes of the thin film transistors in the thin film transistor group are commonly connected, and thin film transistors in the thin film transistor group. For each row in which the gate electrodes of
A liquid crystal panel including at least scanning lines provided. 2. The video signal data output from a video signal source is taken in according to the number of thin film transistors of the thin film transistor group, and the data output order of the video signals is rearranged for output. Frame memory circuit to do. 3. The liquid crystal panel according to claim 1, a scan drive circuit connected to a scan line of the liquid crystal panel, a signal drive circuit for supplying a video signal to the signal line, and a signal drive circuit connected to the signal drive circuit. 2. A matrix type liquid crystal display device comprising at least the frame memory circuit in.