JP2002040990A - Electronic device and method for driving device therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electro-optical device permitting to reduce the number of stages of source signal line driving circuits to a half of the number of horizontal pixels using pixels having a new structure while a pixel part is made high- definition, permitting to arrange the pixels with a margin, and contribute to a high opening rate. SOLUTION: One horizontal period is split into a 1st half and a 2nd half periods; signals for two adjacent pixels are sequentially inputted to one source signal line; and the signal is written by selecting each one pixel during the 1st half or the 2nd half of the one horizontal period by a pixel selection part arranged between the adjacent two pixels. Since one source signal line can be shared between adjacent two pixels, this is advantageous for an opening ratio.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a configuration of an electronic device. The present invention particularly relates to an active matrix electronic device having a thin film transistor (TFT) formed on an insulator and a method for driving the active matrix electronic device.

[0002]

2. Description of the Related Art In recent years, as a flat panel display replacing an LCD (liquid crystal display), an EL (electroluminescence) display has attracted attention, and active research has been conducted.

There are roughly two types of LCD drive systems. One is a passive matrix type used for STN-LCDs and the like, and the other is an active matrix type used for TFT-LCDs and the like. Similarly, in the EL display, there are roughly two types of driving methods. One is a passive matrix type and the other is an active matrix type.

[0004] In the case of the passive matrix type, wirings serving as electrodes are arranged above and below the EL element.
Then, a voltage is sequentially applied to the wiring, and a current is caused to flow through the EL element, thereby lighting the element. On the other hand, in the case of the active matrix type, each pixel has a TFT so that a signal can be held in each pixel.

FIG. 21 shows a configuration example of an active matrix type electronic device driven by digital driving. Pixel part 2 in the center
101 are arranged. Around the pixel portion 2101,
A source signal line side driver circuit 2102 for controlling a source signal line and a gate signal line side driver circuit 2106 for controlling a gate signal line are provided. FIG.
In FIG. 1, the gate signal line side driving circuit 2106 is arranged only on one side of the pixel portion 2101.
It is more desirable to arrange on both sides of the gate signal line so as to sandwich 101 from the viewpoint of operation reliability and efficiency in actual driving. In addition, a power supply unit (Supply) for supplying a current to the EL element is connected to each current supply line of the pixel unit 2101.

An EL element has a layer containing an organic compound capable of obtaining electroluminescence (electroluminescence generated by applying an electric field) (hereinafter, referred to as an EL layer), an anode, and a cathode. Luminescence of an organic compound includes light emission when returning from a singlet excited state to a ground state (fluorescence) and light emission when returning from a triplet excited state to a ground state (phosphorescence). The present invention can also be applied to an electronic device using.

In this specification, all layers provided between the anode and the cathode are defined as EL layers. Specifically, the EL layer includes a light emitting layer, a hole injection layer, an electron injection layer, a hole transport layer,
An electron transport layer and the like are included. Basically, the EL element has an anode /
It has a structure in which a light emitting layer / cathode is laminated in order. In addition to this structure, an anode / hole injection layer / light emitting layer / cathode or anode / hole injection layer / light emitting layer / electron transport layer / cathode Etc. in some cases.

In this specification, an element formed by an anode, an EL layer, and a cathode is called an EL element.

The source signal line side driving circuit 2102 includes a shift register 2103, a first latch circuit 2104, and a second
Latch circuit 2105. Shift register 210
3 receives a source-side clock signal (S-CLK) and a source-side start pulse (S-SP), and a first latch circuit 2104 receives a digital video signal (Digita).
l Data) is input to the second latch circuit 2105
, A latch pulse (Latch Pulse) is input.

[0010] The gate signal line side driving circuit 2106 has a shift register (not shown). A gate-side clock signal (G-CLK) and a gate-side start pulse (G-SP) are input to the shift register.

The driving of the circuit will be described. In the description,
The numbers given in FIG. 21 are used.

In the source signal line side driving circuit 2102, the shift register 2103 supplies the source side clock signal (S-CLK) and the source side start pulse (S-SP).
Is entered. The shift register 2103 sequentially outputs pulses based on these input signals. Pulses sequentially output from the shift register are input to the first latch circuit 2104 via a buffer or the like (not shown),
Digital image signals (Digital Data) are sequentially held (latched) at each stage. First latch circuit 2104
When the data holding is completed in the last stage of the above, a latch pulse (Latch Pu) is supplied to the second latch circuit 2105.
1se) is input, and the data held in the first latch circuit 2104 is simultaneously transferred to the second latch circuit 2105 via a buffer or the like (not shown).

In the gate signal line side driving circuit 2106, a gate side clock signal (G-CLK) and a gate side start pulse (GS) are supplied to a shift register (not shown).
P) is input. The shift register sequentially outputs pulses based on these input signals, is output as a gate signal line selection pulse via a buffer or the like (not shown), and sequentially selects a gate signal line.

The data transferred to the second latch circuit 2105 of the source signal line side drive circuit 2102 is written to the pixel of the row selected by the gate signal line selection pulse. By repeating this operation, an image is displayed.

Next, driving of the pixel portion will be described.
FIG. 22 illustrates a part of the pixel portion 2101 in FIG. FIG.
2 (A) shows a 3 × 3 pixel matrix. A portion surrounded by a dotted frame 2200 is one pixel, and FIG.
(B) shows an enlarged view thereof. In FIG. 22B, 2
Reference numeral 201 denotes a TFT that functions as a switching element when writing a signal to a pixel (hereinafter, referred to as a switching TFT). The switching TFT 2201 may use either an N-channel type or a P-channel type. Reference numeral 2202 denotes a TFT functioning as an element (current control element) for controlling a current supplied to the EL element 2203 (hereinafter, referred to as an EL driving TFT). E
When a P-channel type is used for the L driving TFT 2202, the anode 2209 of the EL element 2203 and the current supply line 22
07. As another configuration method, an N-channel type is used for the EL driving TFT 2202, and the EL element 2
It is also possible to arrange between the cathode 2210 of 203 and the cathode electrode 2208. However, due to the good operation of the TFT, the source ground is good, and the manufacturing restrictions of the EL element 2203, etc., a P-channel type TFT is used for the EL driving TFT 2202. A method of disposing an EL driving TFT 2202 is generally used, and is often used. 22
Reference numeral 04 denotes a storage capacitor for holding a signal (voltage) input from the source signal line 2206. One terminal of the storage capacitor 2204 in FIG.
7, but a dedicated wiring may be used. The gate electrode of the switching TFT 2201 is connected to the gate signal line 2205, and the source region is connected to the source signal line 2205.
206.

Next, the operation of the circuit of the active matrix type electronic device will be described with reference to FIG. First, when the gate signal line 2205 is selected, a voltage is applied to the gate electrode of the switching TFT 2201, and the switching TFT 2201 is turned on. Then, the signal (voltage) of the source signal line 2206 is
204. The voltage of the storage capacitor 2204 is EL
Since the voltage V _GS between the gate and the source of the driving TFT 2202 is used, a current corresponding to the voltage of the storage capacitor 2204 flows through the EL driving TFT 1302 and the EL element 2203. As a result, the EL element 2203 is turned on.

The luminance of the EL element 2203, that is, the EL element
The amount of current flowing through the TFT 2203 is the EL driving TFT 2202.
V_GSCan be controlled by V_GSIs the storage capacity 2204
Which is input to the source signal line 2206
Signal (voltage). That is, the source signal line 2206
By controlling the signal (voltage) input to the
The luminance of the L element 2203 is controlled. Finally, the gate signal
The line 2205 is deselected and the switching TFT
The gate of 2201 is closed and the switching TFT 220 is closed.
1 is turned off. At that time, the storage capacity 2204
The accumulated charge is retained. Therefore, the EL driving TFT
2202 V_GSIs held as it is, and V _GSDepending on the
The current flows through the EL driving TFT 2202 to the EL element 2
Continue to 203.

Regarding the driving of the EL element, etc., SID99 Dige
st: P372: “Current Status andfuture of Light-Emi
tting Polymer Display Driven by Poly-Si TFT ”, ASI
A DISPLAY98: P217: “High Resolution Light Emitti
ng Polymer Display Drivenby Low Temperature Polysi
licon Thin Film Transistor with Integrated Drive
r ”, Euro Display99 Late News: P27:“ 3.8 Green O
LED with Low Temperature Poly-Si TFT ”etc.

[0019]

In recent years, EL displays have been required to have higher definition as well as larger screens. However, there is a problem in that the space for arranging the driving circuits is reduced by reducing the pixel pitch in order to increase the definition of the pixel portion. That is, for example, in a panel of the same size, when changing from VGA to XGA, the number of pixels in the horizontal direction increases from 640 pixels to 1024 pixels. At this time, the width of one pixel is 62.5 [%], and the arrangement width of one stage of the source signal line side driving circuit is also reduced to 62.5 [%].

In order to solve the above problem, it is necessary to further reduce the size of the driving circuit. However, considering the design rules, the reliability of the circuit operation, the yield, and the like, it is not an easy solution. .

Accordingly, it is an object of the present invention to provide an electronic device capable of achieving higher definition while avoiding the above-described problem of a space for arranging a driving circuit by using a pixel having a novel structure. .

[0022]

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention takes the following measures.

As shown in FIG. 22B, a normal pixel has one source signal line 2206, one gate signal line 2205, and one current supply line 2207 per pixel.
Had. The pixel in the electronic device of the present invention is shown in FIG.
As shown in (1), one source signal line 110 is provided between two adjacent pixels, and is shared by the pixels A and B. However, as it is, only the same image signal can always be written to the pixels A and B. Therefore, the pixel selection unit 1
13 is provided so that the image signal input to the source signal line 110 is passed through only one of the switching TFT 101 of the pixel A and the switching TFT 102 of the pixel B. To briefly explain the driving method,
One horizontal period is divided into a first half and a second half, and writing to the pixel A is completed in the first half. Thereafter, the procedure of completing writing to the pixel B in the latter half period is taken.

With such a structure, the number of stages of the source signal line side driving circuit is set to 数 of the number of pixels in the horizontal direction (this is not limited to the case where there is a dummy stage due to the configuration of the driving circuit). ), The driving circuits can be easily arranged even when the pixel pitch is reduced due to the high definition.

The configuration of the electronic device according to the present invention will be described below.

According to the first aspect of the present invention, there is provided an electronic device comprising: a source signal line side driving circuit; a gate signal line side driving circuit;
A pixel selection signal line side driving circuit; and a pixel portion. The pixel portion includes m source signal lines, k gate signal lines, and 2 km pixels, and includes the m source signals. Each of the signal lines has k pixel selection units, and each of the m source signal lines is electrically connected to 2k pixels via the pixel selection unit, and each of the 2km pixels is A switching transistor, an EL driving transistor, and an EL element, a gate electrode of the switching transistor is electrically connected to the gate signal line, and an impurity region of the switching transistor
One is electrically connected to a source signal line, the other is electrically connected to a gate electrode of the EL driving transistor, and one of the impurity regions of the EL driving transistor is electrically connected to a current supply line. The other is electrically connected to one electrode of the EL element.

According to a second aspect of the present invention, there is provided an electronic device comprising: a source signal line side driving circuit; a gate signal line side driving circuit;
A pixel selection signal line side driving circuit; and a pixel portion, wherein the pixel portion has m source signal lines, k gate signal lines, and 2 km pixels, and the 2 km pixels Has a switching transistor, an EL driving transistor, and an EL element, a gate electrode of the switching transistor is electrically connected to the gate signal line, and an impurity region of the switching transistor is One is electrically connected to a source signal line via a pixel selection unit, and the other is electrically connected to a gate electrode of the EL driving transistor. The EL device is electrically connected to a line, and the other is electrically connected to one electrode of the EL element.

According to a third aspect of the present invention, in the electronic device according to the first or second aspect, the source signal line side driving circuit performs a write operation of a video signal twice in one horizontal period by m lines. , For each of the source signal lines.

According to a fourth aspect of the present invention, in the first or second aspect, the first pixel and the second pixel are electrically connected to one pixel selection unit. The pixel selection unit selects the first pixel in the first half of one horizontal period, selects the second pixel in the second half of the one horizontal period, and selects the image input from the source signal line. The signal is written only to the pixel on the side selected by the pixel selection unit.

According to a fifth aspect of the present invention, there is provided the electronic device according to the first or second aspect, wherein the pixel selecting unit is
It is characterized by having an N-channel transistor and a P-channel transistor.

According to a sixth aspect of the present invention, in the electronic device according to the first or second aspect, the pixel selection unit may include:
It is characterized by having an analog switch.

According to a seventh aspect of the present invention, there is provided a driving method of an electronic device according to the present invention, wherein one frame period includes n sub-frame periods SF.
_1, SF _2, ···, have SF _n, wherein the sub each frame period address (writing) period Ta _1, Ta _2,
···, Ta _n and sustain (turn on) period Ts _1, T
s ₂ ,... Ts _n , wherein the number of pixels in the horizontal direction of the electronic device is 2 m , One horizontal period is divided into two periods,
In one period, 1, 3, ..., 2m-3, 2m
The video signal is written to the -1st pixel, and in the other period, 2, 4,..., 2m-2, 2m
It is characterized in that a video signal is written to the pixel of the number.

The driving method of an electronic device according to the present invention described in claim 8 is the method of driving an electronic device according to claim 7, wherein 1, 3,.
The period during which the video signal is written to the third, second and first pixels is the first half of one horizontal period, and is 2, 4,.
-The period during which the video signal is written to the 2m-2th and 2m-th pixels is the latter half of one horizontal period.

According to a ninth aspect of the present invention, there is provided a driving method of an electronic device according to the seventh aspect, wherein the driving method of the electronic device is 1, 3,.
The period during which the video signal is written to the third, second, and first pixels is the latter half of one horizontal period, and is 2, 4,.
-The period in which the video signal is written to the 2m-2, 2m-th pixels is the first half of one horizontal period.

[0035]

Embodiments of the present invention will be described below.

FIG. 1 shows the main configuration of the present invention. Figure 1
In FIG. 1A, a portion indicated by a dotted frame is shown in an enlarged scale in FIG.

The pixel of the electronic device of the present invention is characterized in that two pixels are connected to one source signal line 110. The first two pixels are
Switching TFT 101, first EL driving TF
T103, first EL element 105, first storage capacitor 10
A having a second switching TFT 10
2, the second EL driving TFT 104, the second EL element 1
06, a pixel B having the second storage capacitor 108. The pixel selection unit 113 converts the image signal input from the source signal line into the first switching TFT 10 of the pixel A.
1 or the second switching TFT 10 of the pixel B
2 is provided. The first switching TFT 101 and the second switching TFT 102
As described above, the polarity may be an N-channel type or a P-channel type. The polarity of the first EL driving TFT 103 and the second EL driving TFT 104 may be determined in accordance with the structure of the EL element as described above.

Here, an electronic device having m × k pixels is:
Two pixels that have m / 2 source signal lines and k gate signal lines and are adjacent to each other with the source signal line interposed therebetween are electrically connected to the source signal line via a pixel selection unit. Since there are k gate signal lines, the number of pixels connected to one source signal line is 2 × (for the number of gate signal lines) =
2k.

The pixel selection units 113 arranged in the horizontal direction all operate uniformly. In other words, in FIG. 1A, in a certain gate signal line selection period, first, the pixel selection unit 113 in the first half.
When a signal is input to the pixel A, writing is performed only on the pixel A. In the latter half, a signal is input again to the pixel selection unit,
Writing is performed only on the pixel B. Therefore, the source signal line side driving circuit performs writing to the pixel A, writing to the pixel B, and two writing operations within one horizontal period.

FIG. 2A shows a source signal line side driving circuit of a normal electronic device and one row of a pixel portion. The source signal line side drive circuit 200 includes a shift register for controlling one source signal line, a first latch circuit, and a second latch circuit.
Is configured as a unit having the latch circuit described above as one unit, and is repeated a plurality of stages. That is, when the number of pixels in the horizontal direction is m, the number of stages of the source signal line side driving circuit is equal to the number of pixels and has m stages. In FIG. 2A,
The width in which the circuit for one stage of the source signal line side driving circuit can be arranged is the width indicated by D1. Therefore, by increasing the number of pixels without changing the panel size, the pixel pitch becomes narrower, and D1 also becomes smaller inevitably, which makes it difficult to arrange the drive circuits.

FIG. 2B shows a source signal line side driving circuit and one row of a pixel portion of the electronic device of the present invention. The source signal line side driving circuit 210 has a structure in which a portion including a shift register for controlling one source signal line, a first latch circuit, and a second latch circuit is defined as one unit, and a plurality of stages are repeated. Having. When the number of pixels in the horizontal direction is n, the pixel having the structure of the present invention shares one source signal line, and thus the circuit in FIG.
It has m / 2 source signal lines. Therefore, the number of pixels is equal to that in FIG. 2A, but the number of stages of the driver circuit can be m / 2. At this time, in FIG. 2B, the width in which the circuit for one stage of the source signal line side driving circuit can be arranged is:
This is the width indicated by D2. The pixel pitch is as shown in FIG.
If equal in both cases (B), D2 is approximately twice D1. Therefore, even if the pixel pitch becomes narrow due to high definition, the arrangement of the driving circuits is easy.

The actual driving will be described with reference to a timing chart. As a driving method, a case where gradation expression is performed by a method combining a digital gradation method and a time gradation method will be described as an example. First, the pixel of the conventional configuration
A driving method in the electronic device used will be described.

FIG. 3 is a timing chart in the case of displaying an image at a ⁴ -bit (2 ⁴ = 16) gradation and a frame frequency of 60 [Hz] in an electronic device having horizontal m × vertical n pixels. . It will be described step by step. In this case, 1
The screen is drawn 60 times per second. The period in which one screen is drawn once is one frame period. (FIG. 3 (A))

One frame period is divided into a plurality of subframe periods. This is for performing the gradation expression using the sum of the lighting times of the EL elements. In order to perform the k-bit gradation expression, k subframe periods are required. Here, since it is a 4-bit gray scale, it is divided into four sub-frame periods of SF _{1 to} SF ₄ . Each subframe period has an address (writing) period and a sustain (lighting) period. Since the address (write) period is a period in which a signal for one screen is written, all the address (write) periods Ta _{1 to} Ta ₄ are equal in length. For the sustain (lighting) period, Ts ₁ : Ts ₂ : T
s ₃ : Ts ₄ = 2 ³ : 2 ² : 2 ¹ : 2 ⁰ = 8: 4: 2: 1, and the gradation is expressed by which sustain (lighting) period the EL element is turned on. Note that the order of the subframe periods may be random regardless of the order. (FIG. 3 (B))

In the address (write) period, 1
Gate signal lines are sequentially selected from the row, and digital video signals sequentially input from the source signal lines are written to the pixels.
The selection period for each gate signal line is referred to as one horizontal period. After the selection up to the last row is completed, the process proceeds to a sustain (lighting) period, and the EL element is turned on. (FIG. 3
(C))

In one horizontal period, as described above,
The source signal line side driving circuit operates to hold the digital video signal. In the dot data sampling period, the first latch circuit that has received the pulse from the shift register holds the digital video signal, and when the latching of one column in the horizontal direction is completed, the first latch circuit in the line data latch period. The digital video signal is transferred from the latch circuit to the second latch circuit. (FIG. 3 (D))

The above is the driving method based on the combination of the digital gradation method and the time gradation method. continue,
A case where the electronic device of the present invention is driven by a similar method will be described.

FIG. 4 shows, similarly to FIG. 3, a 4-bit (2 ⁴ = 1) bit in an electronic device having the number of pixels of horizontal m × vertical n.
6) A timing chart in the case of displaying an image at a gradation and a frame frequency of 60 [Hz]. It will be described step by step. In this case, the screen is drawn 60 times per second. 1
The period for drawing the screen once is one frame period. (FIG. 4 (A))

One frame period is divided into a plurality of sub-frame periods. Here, since it is a 4-bit gradation,
It is divided into four sub-frame periods SF ₁ - SF _4.
Each subframe period has an address (writing) period and a sustain (lighting) period. Since the address (write) period is a period for writing a signal for one screen, all the address (write) periods Ta _{1 to} Ta ₄
Are equal in length. For the sustain (lighting) period,
Ts ₁ : Ts ₂ : Ts ₃ : Ts ₄ = 2 ³ : 2 ² : 2 ¹ : 2 ⁰ =
8: 4: 2: 1, and during any sustain (lighting) period, E
The gradation is expressed by turning on the L element. In addition,
The order of the subframe periods may be random regardless of the order. (FIG. 4 (B))

In the address (write) period, 1
Gate signal lines are sequentially selected from the row, and digital video signals sequentially input from the source signal lines are written to the pixels.
The selection period for each gate signal line is referred to as one horizontal period. After the selection up to the last row is completed, the process proceeds to a sustain (lighting) period, and the EL element is turned on. The driving method and timing up to this point are the same as usual.
(FIG. 4 (C))

In the electronic device according to the present invention, two different signal lines connected to one source signal line in the first half and the second half of one horizontal period.
A signal is written to one pixel. In the first half of one horizontal period, 1, 3, 5,.
The digital video signal is output from the first latch circuit, which has received the pulse from the shift register, during the dot data sampling period for the m, m-3, and m-1th pixels (corresponding to the pixel A shown in FIG. 1). Is held, and the latch for one row in the horizontal direction is completed for the pixel A, the data is transferred from the first latch circuit to the second latch circuit during the line data latch period. In the latter half of one horizontal period, 2, 2,
, M-2, and m-th pixels (corresponding to the pixel B shown in FIG. 1) in the first latch circuit that has received a pulse from the shift register during the dot data sampling period. When the latch of one row in the horizontal direction is completed for the pixel B, the digital video signal is transferred from the first latch circuit to the second latch circuit during the line data latch period. . (FIG. 4 (D))

Normally, when there are m pixels in the horizontal direction, the source signal line side driving circuit has m stages. However, by using the configuration of the present invention, the number of stages can be changed to m / 2. I can do it. In addition, there is no need to increase the operating frequency, so that there is no problem in terms of reliability. Therefore, a problem in circuit design, such as a reduction in space for arranging a driving circuit, can be avoided by narrowing the pixel pitch due to high definition of the screen.

[0053]

Embodiments of the present invention will be described below.

[Embodiment 1] FIG. 5 shows an example of a circuit configuration of an electronic device according to the present invention. The pixel portion 501 is arranged at the center. Around the pixel portion 501, a source signal line side driving circuit 502 for controlling a source signal line and a gate signal line side driving circuit 506 for controlling a gate signal line are provided.
In addition, a pixel selection signal line side driving circuit 507 for controlling the pixel selection unit is provided. Further, a power supply unit (Supply) for supplying a current to the EL element is connected to each current supply line of the pixel unit 501.

FIG. 6A is an enlarged view of a part of the pixel portion 501 in FIG. FIG. 6A shows a matrix of 6 × 3 pixels. A portion surrounded by a dotted frame 600 is one unit, and includes two pixels. The enlarged view is shown in FIG.

First and left sides of the source signal line 610 are
Switching TFT 601 and first EL driving TF
T603, first EL element 605, first storage capacitor 60
7 and a second switching TFT 60
2, the second EL driving TFT 604, the second EL element 6
06 and a pixel B having a second storage capacitor 608. In this embodiment, the switching TFT
An example is shown in which N-channel TFTs are used for 601 and 602, and P-channel TFTs are used for EL driving TFTs 603 and 604. In this embodiment, the pixel selector 613 includes an N-channel TFT 615 and a P-channel TFT 6.
16 and a pixel selection signal line 614. When a Hi signal or an LO signal is input to the pixel selection signal line, the N-channel TFT 615 or the P-channel TFT 616 conducts, and the source signal line 61
The signal from 0 is written to the pixel A or the pixel B.

The actual driving will be described with reference to FIG. 6 and the timing chart shown in FIG. FIG. 7 (A)
In order to express 4-bit gradation, one frame period is set to 4
Is divided into subframe periods. FIG. 7 (B)
7A illustrates the potentials of the gate signal line 609 and the pixel selection signal line 614 for one subframe period in FIG.

First, the gate signal line of the first row is selected (701). In the first half of this one horizontal period, a Hi signal is input to the pixel selection signal line 614 (702), and the N-channel TFT 615 is turned on. Therefore, during this time, signal writing is performed only on the pixel A side (705). Thereafter, in the latter half of one horizontal period, the LO is applied to the pixel selection signal line 614.
By the input of the signal, the N-channel TFT 615 that has been conductive previously becomes non-conductive, and the P-channel TFT 616 is conductive instead. Therefore, during this time, signal writing is performed only on the pixel B side (706).

Eventually, the gate signal line in the last row is selected (703), and when the writing of the signal in the last row is completed,
The address (writing) period of the sub-frame period ends, and the EL element 60 is turned on during the sustain (lighting) period.
Lighting of 5,606 starts. The sustain (lighting) period is the next address (writing) period and continues until the gate signal line of the first row is selected again (710). An image is displayed by performing the above operation in all the sub-frame periods.

According to the structure shown in FIG.
The present invention can be easily applied to an electronic device for color display having pixels corresponding to G and B colors. Each pixel is assumed to correspond to R, G, B attached to the side of the EL element. EL element
Since the voltage-luminance characteristics of each of the R, G, and B colors are different, in order to obtain the same luminance, each of the current supply lines 630,
Different potentials need to be applied to 640, 650, 660, 670, 680. Specifically, the current supply line 63
0 and 660 are supplied with a potential corresponding to R,
A potential corresponding to G is supplied to the current supply lines 65 and 0 and 670.
A potential corresponding to B is applied to 0 and 680. The R and G signals are input to the source signal line 635, and the source signal line 64
B and R signals may be input to 5, and G and B signals may be input to the source signal line 655.

Further, in this embodiment, when selecting between the pixel A and the pixel B, the selection is made using the N-channel TFT and the P-channel TFT. The same operation may be performed by using an analog switch or the like, or two gate signal lines may be arranged in parallel, and the switching TFT on the pixel A side becomes conductive when the first gate signal line is selected. T for switching on B side
The FT may be made conductive when the second gate signal line is selected.

[Embodiment 2] In the time gray scale method, FIG.
As shown in (1), a sustain (lighting) period starts after writing for one screen is completed in each subframe period.
That is, the address (write) period and the sustain (lighting) period are completely separated.

An advantage of this method is that the length of the sustain (lighting) period can be determined regardless of the length of the address (writing) period. In the time gray scale method, the length of the sustain (lighting) period is represented by Ts1: Ts
2: ...: Tsn = 2 ^(n-1) : 2 ^(n-2) : ...: 1, and the gradation expression is performed by controlling the length of the lighting time. That is, in order to increase the number of gradations while maintaining the length of one frame period, it is necessary to further shorten the minimum unit sustain (lighting) period. Even in such a case, the length of the sustain (lighting) period can be easily determined.

On the other hand, as a disadvantage, in the address (write) period, since none of the pixels in the screen is lit, the duty ratio (the total length of all the sustain (light) periods with respect to the length of one frame period) is calculated. ratio)
Is reduced. As described above, the length of the sustain (lighting) period can be freely determined. On the other hand, if the number of address (writing) periods increases due to the increase in the number of gradations, the duty ratio will further decrease. The only solution is to increase the operating frequency of the drive circuit to shorten the address (write) period itself. In practice, there is a limit to achieving multiple gradations by this method. Further, while a gate signal line is selected in a certain row, no writing or lighting is performed in another row (the area indicated by 801), so that waste is increased in a frame period. Can be

Accordingly, as shown in FIG. 8B, a driving method in which the address (writing) period and the sustain (lighting) period partially overlap will be described. According to this scheme,
For example, when the gate signal line on the k-th row is selected and the writing of the signal to the pixel is completed, the EL element on the k-th row immediately enters a sustain (lighting) period. The sustain (lighting) period continues until the next k-th gate signal line is selected. That is, during the period when the k-th gate signal line is selected, the EL of all the rows except the k-th row is selected.
The element is in the sustain (lighting) period. Therefore, since the duty ratio can be increased, it is also an effective method for achieving multiple gradations.

However, if the address (write) periods of different sub-frames overlap, a plurality of different gate signal lines are selected at the same time, so that the video signal cannot be written normally. Therefore, in the method shown in FIG. 8B, the minimum unit of the length of the sustain (lighting) period is at least after the selection of the gate signal line of the first row is completed and the selection of the gate signal line of the last row. Needs to be longer than the period (802) until the process ends.

The actual driving by the method shown in FIG. 8B will be described with reference to FIG. 6 and the timing chart shown in FIG. In FIG. 9A, one frame period is divided into four sub-frame periods for 4-bit gradation expression. FIG. 9B illustrates a gate signal line 609 for one subframe period in FIG.
And the potential of the pixel selection signal line 614.

First, the gate signal line of the first row is selected (901). In the first half of this one horizontal period, a Hi signal is input to the pixel selection signal line 614 (902), and the N-channel TFT 615 is turned on. Therefore, during this time, signal writing is performed only on the pixel A side (905). Thereafter, in the latter half of one horizontal period, the LO is applied to the pixel selection signal line 614.
By the input of the signal, the N-channel TFT 615 that has been conductive previously becomes non-conductive, and the P-channel TFT 616 is conductive instead. Therefore, during this time, signal writing is performed only on the pixel B side (907). Here, when a signal is being written to the pixel B, the pixel A has already entered the sustain (lighting) period (90).
6). The pixel B also enters a sustain (lighting) period immediately after the signal writing is completed (908).

The above operation is repeated every time the gate signal line of each row is selected. In the last row, writing to the pixels A and B is performed in the first half and the second half of one horizontal period, respectively (909, 911). The address (writing) period ends. For example, in the sustain (lighting) period of the pixel A in the k-th row, the gate signal line in the k-th row is selected again in the next address (write) period, and the pixel A in the first half is selected.
This lasts until just before the writing of the signal to (915) starts.
An image is displayed by performing the above operation in all the sub-frame periods.

As has become clear from the above description,
In the period in which the k-th gate signal line is selected, all the pixels controlled by the gate signal lines other than the k-th row are in a sustain (lighting) period.
Further, at that time, on the k-th row, when a signal is being written to the pixel A in the first half of the one horizontal period, the pixel B is still in the sustain (lighting) period, and the signal is applied to the pixel B in the second half of the one horizontal period. When writing is performed, the pixel A is in a sustain (lighting) period. Therefore, the duty ratio can be significantly increased as compared with the timing described in the first embodiment.

According to the structure shown in FIG.
The present invention can be easily applied to an electronic device for color display having pixels corresponding to G and B colors. Each pixel is assumed to correspond to R, G, B attached to the side of the EL element. EL element
Since the voltage-luminance characteristics of each of the R, G, and B colors are different, in order to obtain the same luminance, each of the current supply lines 630,
Different potentials need to be applied to 640, 650, 660, 670, 680. Specifically, the current supply line 63
0 and 660 are supplied with a potential corresponding to R,
A potential corresponding to G is supplied to the current supply lines 65 and 0 and 670.
A potential corresponding to B is applied to 0 and 680. The R and G signals are input to the source signal line 635, and the source signal line 64
B and R signals may be input to 5, and G and B signals may be input to the source signal line 655.

[Embodiment 3] In the case of an electronic device for monochrome gradation display, unlike the electronic device for color display, the voltage-luminance characteristics for each emission color of the EL element are not related. ), As shown in FIG.
1040, 1050, and 1060 can be easily shared between adjacent pixels. Although the electronic device of the present invention has a problem that the pixel pitch is narrowed particularly due to the high definition, the narrowing of the pixel pitch obviously causes a decrease in the aperture ratio. As described above, it can be said that sharing the current supply lines and reducing the number of wirings is a very effective and easy means.

[Embodiment 4] In Embodiment 2, the minimum unit length of the sustain (lighting) period is limited with respect to the timing at which the address (writing) period and the sustain (lighting) period are not completely separated. I explained why. In this embodiment, the solution and the actual driving will be described.

FIG. 11A is a timing chart in the case of performing 4-bit gradation display as in FIG. 8B, but since the length of Ts ₄ is shorter than the aforementioned minimum unit length. , address (writing) period and Ta _4, address (writing) period in SF1 in the next frame period Ta
₁ ′ overlaps with the period indicated by 1101. In this period, a plurality of different gate signal lines are selected at the same time, and the same signal is written to the pixel, so that a normal image is not displayed.

Therefore, as shown in FIG. 11B, in the portion where the address (write) period overlaps, the non-display period 1102 is forcibly applied after the end of the sustain (lighting) period.
Is provided. In this non-display period 1102, the EL element is turned off regardless of the signal written to the pixel.
By doing so, it is possible to prevent a plurality of address (write) periods from overlapping.

Next, a method for providing the non-display period shown in FIG. 11B will be described. First, a method for providing a non-display period will be described. When a non-display period is provided by the method described here, no special circuit is required. Therefore, the present invention can be applied to a pixel to which the present invention is applied as shown in FIGS. 6 and 10 or a normal pixel as shown in FIG. Here, FIG.
This will be described with reference to FIGS.

FIG. 12A is a circuit diagram around the EL driving TFT. The EL element 1205 emits light in the EL element 12
This is done by passing a current through 05. This current is EL
That there is a potential difference between the source region and the drain region of the driving TFT 1202 (this potential difference is hereinafter referred to as a source-drain voltage), that is, the current supply line 1201
It flows because there is a potential difference between the cathode wiring 1206 and the cathode wiring 1206. Therefore, during the normal sustain (lighting) period, the potential of the current supply line 1201 is not
The potential of No. 6 is low. Therefore, during the non-display period, the potential of the cathode line 1206 is
It is raised to the same potential as the potential of 1. By this operation, E
The source-drain voltage of the L driving TFT 1202 is 0
Then, the current stops flowing to the EL element 1205 and the light is turned off. (FIG. 12B) During this non-display period, the EL element 120 is forcibly forced regardless of the signal written to the pixel.
5 can be turned off.

FIG. 13 shows a 4-bit gradation display in FIG.
3B shows the potentials of the gate signal line, the pixel selection signal line, and the cathode line when the timing is as shown in FIG. Since the sustain (lighting) period Ts _{4 of} SF ₄ , which is the subframe for the least significant bit, is shorter than Ta ₄ , a non-display period (hereinafter, referred to as a clear period) is provided to reduce the overlap of the address (write) period. To avoid. In FIG. 13, a sustain (lighting) period indicated by a solid line is for the pixel A to which writing is performed in the first half of one horizontal period, and a sustain (lighting) period indicated by a broken line is
This is for the pixel B to which writing is performed in the latter half of one horizontal period.

[0079] SF₁~ SF_ThreeIs the same as
Therefore, it can be driven normally.
Is omitted. SF_FourIn the first half of one horizontal period
A is written, and immediately the sustain (lighting) period
Interval Ts_Fourto go into. Then, to the pixel B in the latter half of one horizontal period
Is written, and immediately after the sustain (lighting) period T
Enter s4. Ts_FourAt the end of the
Interval Tc_FourIs provided. Raise the potential of the cathode wiring and supply the current
And the same potential as the potential of the EL driving TFT.
The source-drain voltage becomes 0 and the EL element turns off
You. After that, SF _FourAddress (write) period in
This clearing period continues until is completed.

According to the driving method described above, since the sustain (lighting) period is short as described above, even if the address (writing) period is overlapped in the normal driving method, a normal image can be obtained. Can be displayed. Thereby, further multi-gradation can be realized.

[0081] Also, in the timing shown in FIG. 13, that since the timing of the start of the clear period Tc ₄ is simultaneous, it is slightly pixels B sustain (lighting) period is shorter in the pixel A and pixel B Understand. In order to avoid this, it is possible to easily avoid this problem by providing two lines of the cathode lines and shifting the timing of increasing the potential of the cathode lines between the pixel A and the pixel B.

In order to make the source-drain voltage of the EL driving TFT zero, a method may be used in which the potential of the cathode wiring 1206 is fixed and the potential of the current supply line 1201 is changed. Specifically, in a normal sustain (lighting) period, the potential of the current supply line 1201 is higher (lower) than the potential of the cathode wiring 1206, and
A current flows through the L element. In the non-display period, the potential of the current supply line 1201 is lowered (increased) to be the same as the potential of the cathode wiring. Thus, similar to the above-described method, EL
The current stops flowing to the element, and the element is turned off.

[Embodiment 5] In this embodiment, in the electronic device of the present invention, a pixel portion and a driving circuit portion provided around the pixel portion (source signal line side driving circuit, gate signal line side driving circuit, pixel selection signal line side A method for manufacturing TFTs of the driving circuit simultaneously will be described. However, for the sake of simplicity, a CMOS circuit, which is a basic configuration circuit, is illustrated for the drive circuit unit.

First, as shown in FIG. 14A, oxidation is performed on a substrate 5001 made of glass such as barium borosilicate glass represented by Corning # 7059 glass or # 1737 glass, or aluminoborosilicate glass. A base film 5002 made of an insulating film such as a silicon film, a silicon nitride film, or a silicon oxynitride film is formed.
For example, a plasma CVD method SiH _4, NH _3, N ₂ silicon oxynitride film 5002a made from O 10 to 2
00 [nm] (preferably 50 to 100 [nm]) is formed, similarly SiH _4, N ₂ O hydrogenated silicon oxynitride film 5002b made from 50 to 200 [nm] (preferably 100
１５０150 [nm]). Although the base film 5002 has a two-layer structure in this embodiment, the base film 5002 may have a single-layer structure or a structure in which two or more insulating films are stacked.

The island-shaped semiconductor layers 5003 to 5006 are formed of a crystalline semiconductor film formed by using a semiconductor film having an amorphous structure by a laser crystallization method or a known thermal crystallization method.
The thickness of the island-shaped semiconductor layers 5003 to 5006 is 25 to 8
It is formed with a thickness of 0 [nm] (preferably 30 to 60 [nm]). The material of the crystalline semiconductor film is not limited, but is preferably formed of silicon or a silicon germanium (SiGe) alloy.

In order to form a crystalline semiconductor film by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, a YAG laser, or a YVO ₄ laser is used.
In the case of using these lasers, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly condensed by an optical system and irradiated on a semiconductor film. The crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is 30 [Hz], and the laser energy density is 100 to 400 [mJ / cm ² ] (typically, 2
00 to 300 [mJ / cm ² ]). When a YAG laser is used, the second harmonic is used, the pulse oscillation frequency is set to 1 to 10 [kHz], and the laser energy density is set to 30.
0 to 600 [mJ / cm ² ] (typically 350 to 500 [mJ / c]
m ² ]). And a width of 100 to 1000 [μm],
For example, a laser beam condensed linearly at 400 [μm] is irradiated over the entire surface of the substrate, and the superposition rate (overlap rate) of the linear laser beam at this time is set to 80 to 98 [%].

Next, island-like semiconductor layers 5003 to 5006
Is formed to cover the gate insulating film 5007. The gate insulating film 5007 is formed by a plasma CVD method or a sputtering method.
It is formed of an insulating film containing silicon with a thickness of 40 to 150 [nm]. In this embodiment, a silicon oxynitride film is formed with a thickness of 120 [nm]. Needless to say, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure. For example, when a silicon oxide film is used, TEOS (Tetraethyl Orthosilicat
e) and O ₂ were mixed, the reaction pressure was 40 [Pa], and the substrate temperature was 30.
It can be formed by discharging at a high frequency (13.56 [MHz]) and a power density of 0.5 to 0.8 [W / cm ² ] at 0 to 400 [° C.]. The silicon oxide film thus manufactured can obtain favorable characteristics as a gate insulating film by subsequent thermal annealing at 400 to 500 [° C.].

Then, a first conductive film 5008 and a second conductive film 5009 for forming a gate electrode are formed over the gate insulating film 5007. In this embodiment, the first conductive film 5008 is formed of Ta to a thickness of 50 to 100 [nm],
A second conductive film 5009 is formed with W to a thickness of 100 to 300 [nm].

The Ta film is formed by a sputtering method by sputtering a Ta target with Ar. in this case,
When an appropriate amount of Xe or Kr is added to Ar, the internal stress of the Ta film can be relaxed and the film can be prevented from peeling. Also, α
The phase Ta film has a resistivity of about 20 [μΩcm] and can be used as a gate electrode, but the β phase Ta film has a resistivity of about 180 [μΩcm] and is not suitable for a gate electrode. . In order to form an α-phase Ta film, tantalum nitride having a crystal structure close to the Ta α-phase is formed on a Ta base with a thickness of about 10 to 50 [nm]. Can be easily obtained.

When a W film is formed, it is formed by a sputtering method using W as a target. Alternatively, it can be formed by a thermal CVD method using tungsten hexafluoride (WF ₆ ). In any case, it is necessary to lower the resistance in order to use it as a gate electrode.
[μΩcm] or less is desirable. The resistivity of the W film can be reduced by enlarging the crystal grains. However, when there are many impurity elements such as oxygen in W, the crystallization is inhibited and the resistance is increased. From this, in the case of using the sputtering method, a W target having a purity of 99.9999 [%] is used, and a W film is formed by giving sufficient consideration so as not to mix impurities from the gas phase during film formation. Resistivity 9-20
[μΩcm] can be realized.

In this embodiment, the first conductive film 500
8 was Ta, and the second conductive film 5009 was W. However, there is no particular limitation, and any of Ta, W, Ti, Mo, Al, and Cu was used.
Alternatively, it may be formed of an element selected from the above, or an alloy material or a compound material containing the element as a main component. Also,
A semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. As a desirable example of another combination other than this embodiment, a combination in which the first conductive film 5008 is formed of tantalum nitride (TaN) and the second conductive film 5009 is W, Is formed of tantalum nitride (TaN), the second conductive film 5009 is made of Al, the first conductive film 5008 is made of tantalum nitride (TaN), and the second conductive film 5009 is made of Cu. No.

Next, a mask 5010 made of a resist is formed, and a first etching process for forming electrodes and wirings is performed. In this embodiment, ICP (Inductively Coupled)
d Plasma: Inductively coupled plasma) etching method,
CF ₄ and Cl ₂ are mixed as an etching gas, and RF (13.56 [MH]) of 500 [W] is applied to the coil-type electrode at a pressure of 1 [Pa].
z]) Power is supplied to generate plasma. 100 [W] RF (13.56 [MH] also on the substrate side (sample stage)
z]) Apply power and apply a substantially negative self-bias voltage. When CF ₄ and Cl ₂ are mixed, the W film and Ta
The film is etched to the same extent.

Under the above-described etching conditions, the shape of the resist mask is made appropriate, so that the edges of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. Become. The angle of the tapered portion is 15 to 45 °. In order to perform etching without leaving a residue on the gate insulating film, the etching time may be increased by about 10 to 20%. Since the selectivity of the silicon oxynitride film to the W film is 2 to 4 (typically 3), the exposed surface of the silicon oxynitride film is etched by about 20 to 50 [nm] by over-etching. become. Thus, by the first etching process, the first conductive layer and the second conductive layer
Conductive layers 5011 to 5016 (first conductive layer 50
11a to 5016a and second conductive layers 5011b to 501
6b) is formed. At this time, in the gate insulating film 5007, a region which is not covered with the first shape conductive layers 5011 to 5016 is etched to a thickness of about 20 to 50 [nm] to form a thinned region. (FIG. 14A)

Then, a first doping process is performed to add an impurity element imparting N-type. The doping may be performed by an ion doping method or an ion implantation method. The condition of the ion doping method is that the dose is 1 × 10 ^{13 to} 5 × 10
¹⁴ [atoms / cm ² ] and an acceleration voltage of 60 to 100 [keV]. An element belonging to Group 15 of the periodic table, typically phosphorus (P) or arsenic (As) is used as the impurity element imparting the N-type. Here, phosphorus (P) is used. In this case, the conductive layers 5011 to 5015 serve as a mask for the impurity element imparting N-type, and the first impurity region 50 is self-aligned.
17 to 5025 are formed. First impurity region 501
For 7 to 5025, 1 × 10 ²⁰ to 1 × 10 ²¹ [atoms / cm ³ ]
Is added within the concentration range of.
(FIG. 14 (B))

Next, as shown in FIG. 14C, a second etching process is performed without removing the resist mask. Using CF ₄ , Cl ₂ and O _{2 as an} etching gas,
The film is selectively etched. At this time, the second shape conductive layers 5026 to 5031 are formed by the second etching process.
(First conductive layers 5026a to 5031a and second conductive layers 5026b to 5031b) are formed. At this time, in the gate insulating film 5007, the second shape conductive layer 50 is formed.
The area not covered by 26 to 5031 is further 20 to 50 [n
m] to form a thinned region.

The etching reaction of the W film or the Ta film by the mixed gas of CF ₄ and Cl ₂ can be inferred from the generated radical or ion species and the vapor pressure of the reaction product.
Comparing the vapor pressures of fluorides and chlorides of W and Ta, W
WF ₆ is extremely high and other WC
l ₅ , TaF ₅ and TaCl ₅ are comparable. Therefore, C
With the mixed gas of F ₄ and Cl ₂ , both the W film and the Ta film are etched. However, when an appropriate amount of O ₂ is added to this mixed gas, CF ₄ and O ₂ react to form CO and F, and a large amount of F radicals or F ions are generated. As a result, the etching rate of the W film having a high fluoride vapor pressure increases. On the other hand, in Ta, the increase in the etching rate is relatively small even if F increases. Further, since Ta is more easily oxidized than W, the surface of Ta is oxidized by adding O ₂ .
Since the oxide of Ta does not react with fluorine or chlorine,
The etching rate of the a film decreases. Therefore, the W film and Ta
It is possible to make a difference in the etching rate with the film, and it is possible to make the etching rate of the W film larger than that of the Ta film.

Then, a second doping process is performed as shown in FIG. In this case, the dose is lower than that of the first doping process and the condition of a high acceleration voltage is N
Doping with an impurity element for giving a mold. For example, the acceleration voltage is set to 70 to 120 [keV], and 1 × 10 ¹³ [atoms / cm]
² ], a new impurity region is formed inside the first impurity region formed in the island-shaped semiconductor layer in FIG. Doping is performed in the second shape conductive layer 5026.
To 5030 are used as masks for the impurity elements, and doping is performed so that the impurity elements are also added to regions below the first conductive layers 5026a to 5030a. Thus, third impurity regions 5032 to 5036 are formed. The concentration of phosphorus (P) added to third impurity regions 5032 to 5036 depends on that of first conductive layers 5026 a to 5026 a to 5 a.
030a has a gentle concentration gradient according to the thickness of the tapered portion. Note that the first conductive layers 5026a to 503
In the semiconductor layer overlapping the tapered portion of Oa, the impurity concentration is slightly reduced from the end of the tapered portion of the first conductive layers 5026a to 5030a toward the inside, but is substantially the same.

As shown in FIG. 15B, a third etching process is performed. This is performed using a reactive ion etching method (RIE method) using CHF ₆ as an etching gas. Third
Of the first conductive layers 5026a to 5026a-5
031a is partially etched to form the first portion.
The region where the conductive layer overlaps with the semiconductor layer is reduced. By the third etching treatment, the third shape conductive layer 5037 is formed.
To 5042 (first conductive layers 5037a to 5042a and second conductive layers 5037b to 5042b). At this time, in the gate insulating film 5007, a region that is not covered with the third shape conductive layers 5037 to 5042 is two more.
A region that is etched and thinned by about 0 to 50 [nm] is formed.

By the third etching process, the third impurity regions 5032 to 5036 overlap with the first conductive layers 5037a to 5041a in the third impurity regions 5032 to 5036.
32a to 5036a, and second impurity regions 5032b to 5036 between the first impurity region and the third impurity region.
b is formed.

Then, as shown in FIG.
Island-shaped semiconductor layers 5004 and 50 forming a channel type TFT
In 06, a fourth impurity region of a conductivity type opposite to the first conductivity type
5043 to 5054 are formed. Third shape conductive layer 5
038b and 5041b are used as masks for impurity elements.
To form an impurity region in a self-aligned manner. This and
And an island-shaped semiconductor layer 500 forming an N-channel TFT.
3, 5005 and the wiring portion 5042
The entire surface is covered with 200. Impurity regions 5043-5
Phosphorus is added at different concentrations to 054
But diborane (B _TwoH₆) Formed by ion doping method
The impurity concentration is 2 × 10
²⁰~ 2 × 10^{twenty one}[atoms / cm^Three].

By the steps described above, impurity regions are formed in the respective island-shaped semiconductor layers. Third overlapping with the island-shaped semiconductor layer
The conductive layers 5037 to 5041 each having the shape described above function as gate electrodes. 5042 functions as a source signal line.

After removing the resist mask 5200, a step of activating the impurity element added to each island-shaped semiconductor layer is performed for the purpose of controlling the conductivity type. This step is performed by a thermal annealing method using a furnace annealing furnace.
In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is 400 to 700 in a nitrogen atmosphere of 1 [ppm] or less, preferably 0.1 [ppm] or less.
In this embodiment, the heat treatment is performed at 500 ° C. for 4 hours.
However, when the wiring material used for the third shape conductive layers 5037 to 5042 is weak to heat, activation is performed after an interlayer insulating film (mainly containing silicon) is formed to protect the wiring and the like. It is preferred to do so.

Further, a heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% of hydrogen to hydrogenate the island-like semiconductor layer. In this step, dangling bonds in the semiconductor layer are terminated by thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

Next, as shown in FIG.
Of the interlayer insulating film 5055 from the silicon oxynitride film to 100
It is formed with a thickness of about 200 [nm]. After a second interlayer insulating film 5056 made of an organic insulating material is formed thereon, the first interlayer insulating film 5055, the second interlayer insulating film 5056,
And a contact hole is formed in the gate insulating film 5007, and each wiring (including a connection wiring and a signal line) 5057 is formed.
After patterning 5062 and 5064, the pixel electrode 5063 in contact with the connection wiring 5062 is formed by patterning.

As the second interlayer insulating film 5056, a film made of an organic resin is used, and as the organic resin, polyimide, polyamide, acrylic, BCB (benzocyclobutene), or the like can be used. In particular, since the second interlayer insulating film 5056 has a strong meaning of flattening, acrylic having excellent flatness is preferable. In this embodiment, an acrylic film is formed with a thickness that can sufficiently flatten a step formed by a TFT. Preferably, it is 1 to 5 [μm] (more preferably, 2 to 4 [μm]).

The contact holes are formed by dry etching or wet etching. The contact holes reach the N-type impurity regions 5017, 5018, 5021, and 5023 or the P-type impurity regions 5043 to 5054, the contact holes reach the wiring 5042, and the like. A contact hole (not shown) reaching the power supply line and a contact hole (not shown) reaching the gate electrode are formed.

In addition, wiring (including connection wiring and signal line) 5
057 to 5062 and 5064, the Ti film is 100 [n].
m], an aluminum film containing Ti is 300 [nm], and a Ti film 1
A laminate film having a three-layer structure in which 50 nm is continuously formed by a sputtering method and patterned into a desired shape is used. Of course,
Other conductive films may be used.

In the present embodiment, an ITO film having a thickness of 110 [nm] was formed as the pixel electrode 5063, and was patterned. Contact is established by arranging the pixel electrode 5063 so as to be in contact with and overlap with the connection wiring 5062. Alternatively, a transparent conductive film in which 2 to 20% of zinc oxide (ZnO) is mixed with indium oxide may be used. This pixel electrode 5063 becomes the anode of the EL element. (FIG. 16
(A))

Next, as shown in FIG. 16B, an insulating film containing silicon (a silicon oxide film in this embodiment) is formed to a thickness of 500 [nm], and is formed at a position corresponding to the pixel electrode 5063. An opening is formed, and a third interlayer insulating film 5065 functioning as a bank is formed. When the opening is formed, a tapered side wall can be easily formed by using a wet etching method. Care must be taken because if the side wall of the opening is not sufficiently smooth, deterioration of the EL layer due to the step will become a significant problem.

Next, the EL layer 5066 and the cathode (MgA
g electrode) 5067 is continuously formed using a vacuum deposition method without opening to the atmosphere. Note that the thickness of the EL layer 5066 is 80
The thickness of the cathode 5067 is 180 to 300 [nm] (typically, 20 to 200 [nm] (typically 100 to 120 [nm]).
0 to 250 [nm]).

In this step, an EL layer and a cathode are sequentially formed for a pixel corresponding to red, a pixel corresponding to green, and a pixel corresponding to blue. However, since the EL layer has poor resistance to a solution, it must be formed individually for each color without using a photolithography technique. Therefore, it is preferable that a metal mask is used to hide portions other than the desired pixels, and that the EL layer and the cathode are selectively formed only in necessary portions.

That is, first, a mask for hiding all pixels other than pixels corresponding to red is set, and a red light emitting EL layer is selectively formed using the mask. Next, a mask for hiding all pixels other than pixels corresponding to green is set, and a green light-emitting EL layer is selectively formed using the mask. Next, a mask for covering all pixels other than the pixel corresponding to blue is similarly set, and an EL layer for emitting blue light is selectively formed using the mask. Note that all the masks are described herein as being different, but the same mask may be used again.

Here, a method of forming three types of EL elements corresponding to RGB was used. However, a method of combining a white light emitting EL element and a color filter, a blue or blue-green light emitting EL element and a phosphor (fluorescent And a method in which an EL element corresponding to RGB is stacked on a cathode (a counter electrode) using a transparent electrode.

Note that a known material can be used for the EL layer 5066. As a known material, it is preferable to use an organic material in consideration of a driving voltage. For example, a four-layer structure including a hole injection layer, a hole transport layer, a light emitting layer, and an electron injection layer may be used as the EL layer.

Next, a cathode 5067 is formed using a metal mask on a pixel having a switching TFT in which a gate electrode is connected to the same gate signal line (a pixel on the same line). In this embodiment, MgA is used as the cathode 5067.
Although g was used, the present invention is not limited to this. Cathode 50
Other known materials may be used as 67.

Lastly, a passivation film 5068 made of a silicon nitride film is formed to a thickness of 300 [nm]. By forming the passivation film 5068, the EL layer 50
66 can be protected from moisture and the like, and the reliability of the EL element can be further improved.

Thus, an EL display having a structure as shown in FIG. 16B is completed. In the manufacturing process of the EL display in this embodiment, a source signal line is formed by Ta and W which are materials forming a gate electrode, and a source and a drain electrode are formed due to a circuit configuration and a process. Although the gate signal line is formed of Al, which is the wiring material used, a different material may be used.

By the way, the EL display of this embodiment has a TF having an optimum structure not only for the pixel section but also for the drive circuit section.
By arranging T, very high reliability can be exhibited and operating characteristics can be improved. It is also possible to add a metal catalyst such as Ni in the crystallization step to enhance the crystallinity.
As a result, the driving frequency of the source signal line driving circuit becomes 1
It can be set to 0 [MHz] or more.

First, a TFT having a structure in which hot carrier injection is reduced so as not to lower the operation speed as much as possible,
N-channel type TF of CMOS circuit forming drive circuit section
Used as T. In addition, as the drive circuit here,
It includes a shift register, a buffer, a level shifter, a latch in line-sequential driving, a transmission gate in point-sequential driving, and the like.

In the case of this embodiment, the activity of the N-channel TFT is
The conductive layer is between the source region, the drain region, and the gate insulating film.
Overlap LDD region that overlaps with the gate electrode
(L _OVRegion), with the gate electrode sandwiching the gate insulating film
Offset LDD areas (L_OFFArea) and
Including a channel forming region.

Also, a P-channel type TFT of a CMOS circuit
Since there is almost no concern about deterioration due to hot carrier injection, it is not necessary to provide an LDD region. Needless to say, it is also possible to provide an LDD region similarly to the N-channel type TFT and take measures against hot carriers.

In addition, in the case where a CMOS circuit in which a current flows bidirectionally in the channel formation region, that is, a CMOS circuit in which the roles of the source region and the drain region are exchanged is used in the driver circuit, the CMOS circuit is formed. In the channel type TFT, it is preferable to form an LDD region on both sides of the channel formation region so as to sandwich the channel formation region. An example of such a transmission gate is a transmission gate used for dot-sequential driving. Further, in the case where a CMOS circuit in which off-state current needs to be suppressed as low as possible is used in the driver circuit, the N-channel TFT forming the CMOS circuit preferably has an L _OV region. As such an example,
A transmission gate used for point-sequential driving is exemplified.

When the structure shown in FIG. 16B is actually completed, a protective film (laminate film, ultraviolet curable resin film, etc.) with high airtightness and low degassing or a transparent film is provided so as not to be further exposed to the outside air. It is preferable to package (enclose) with an optical sealing material. At this time, the reliability of the EL element is improved by setting the inside of the sealing material to an inert atmosphere or disposing a hygroscopic material (for example, barium oxide) inside.

When the airtightness is enhanced by processing such as packaging, a connector (flexible printed circuit: FPC) for connecting terminals routed from elements or circuits formed on the substrate to external signal terminals. To complete the product. The state in which the product can be shipped in this way is referred to as an electronic device in this specification.

According to the steps described in this embodiment, the number of photomasks required for manufacturing an electronic device can be reduced. As a result, the process can be shortened, which can contribute to a reduction in manufacturing cost and an improvement in yield.

[Embodiment 6] In this embodiment, an example in which an electronic device of the present invention is manufactured will be described.

FIG. 17A is a top view of an electronic device using the present invention, and FIG. 17B is a cross-sectional view of FIG. 17A cut along the XX ′ plane. In FIG. 17A, 4
001 is a substrate, 4002 is a pixel portion, 4003 is a source signal line side driving circuit, 4004 is a gate signal line side driving circuit, and each driving circuit has wirings 4005, 4006,
Via the FPC 4007, the FPC 4008 is connected to an external device.

At this time, in the pixel portion 4002, a cover material 4009, a sealing material 4010, and a sealing material (also referred to as a housing material) 4011 (shown in FIG. 9B) are preferably provided so as to surround the driving circuit and the pixel portion. Have been.

FIG. 17B shows a cross-sectional structure of the electronic device of this embodiment, in which a TFT for a driving circuit (here, an N-channel type TF) is provided on a substrate 4001 and a base film 4012.
A CMOS circuit combining T and P-channel TFTs is shown) 4013 and a TFT 4014 for a pixel portion
(However, here, only the EL driving TFT for controlling the current to the EL element is shown). These TFTs may use a known structure (top gate structure or bottom gate structure).

A TFT for a driving circuit is manufactured by using a known manufacturing method.
4013, when the pixel portion TFT 4014 is completed, a pixel electrode 4016 made of a transparent conductive film electrically connected to the drain of the pixel portion TFT 4014 is formed on an interlayer insulating film (planarization film) 4015 made of a resin material. As the transparent conductive film, a compound of indium oxide and tin oxide (IT
O) or a compound of indium oxide and zinc oxide. Then, the pixel electrode 4016
Is formed, an insulating film 4017 is formed, and the pixel electrode 40 is formed.
An opening is formed on 16.

Next, an EL layer 4018 is formed. The EL layer 4018 is formed of a known EL material (a hole injection layer, a hole transport layer,
A light-emitting layer, an electron transport layer, or an electron injection layer) may be freely combined to form a stacked structure or a single-layer structure. A known technique may be used to determine the structure. Also, E
The L material includes a low molecular material and a high molecular (polymer) material. When a low molecular material is used, an evaporation method is used, but when a high molecular material is used, a spin coating method,
A simple method such as a printing method or an inkjet method can be used.

In this embodiment, an EL layer is formed by an evaporation method using a shadow mask. By forming a light emitting layer (red light emitting layer, green light emitting layer, and blue light emitting layer) capable of emitting light having different wavelengths for each pixel using a shadow mask,
Color display becomes possible. In addition, the color conversion layer (CC
There is a method combining M) and a color filter, and a method combining a white light emitting layer and a color filter, and any method may be used. Needless to say, the electronic device can emit light of a single color.

After forming the EL layer 4018, a cathode 4019 is formed thereon. Cathode 4019 and EL layer 4018
It is desirable to remove as much as possible moisture and oxygen existing at the interface. Therefore, the EL layer 4018 and the cathode 40
It is necessary to devise a method of continuously forming the film 19 or forming the EL layer 4018 in an inert atmosphere and forming the cathode 4019 without opening to the atmosphere. In this embodiment, the above-described film formation is made possible by using a multi-chamber type (cluster tool type) film formation apparatus.

In this embodiment, as the cathode 4019,
A laminated structure of a LiF (lithium fluoride) film and an Al (aluminum) film is used. Specifically, a 1-nm-thick LiF (lithium fluoride) film is formed on the EL layer 4018 by a vapor deposition method, and a 300-nm-thick aluminum film is formed thereon. Of course, a MgAg electrode which is a known cathode material may be used. The cathode 4019 is connected to the wiring 4007 in a region indicated by 4020. A wiring 4007 is a power supply line for applying a predetermined voltage to the cathode 4019,
It is connected to the FPC 4008 through the conductive paste material 4021.

In the region indicated by 4020, the cathode 40
In order to electrically connect the wiring 19 and the wiring 4007, it is necessary to form a contact hole in the interlayer insulating film 4015 and the insulating film 4017. These are interlayer insulating films 4015
May be formed at the time of etching (at the time of forming a contact hole for a pixel electrode) or at the time of etching of an insulating film 4017 (at the time of forming an opening before an EL layer is formed). When the insulating film 4017 is etched, etching may be performed all at once up to the interlayer insulating film 4015. In this case, if the interlayer insulating film 4015 and the insulating film 4017 are the same resin material, the shape of the contact hole can be made good.

The passivation film 4022 and the filler 402 cover the surface of the EL element thus formed.
3. A cover material 4009 is formed.

Further, a sealing material 4 is placed inside the cover 4009 and the substrate 4001 so as to surround the EL element portion.
011 is provided, and a sealing material (second sealing material) 4010 is formed outside the sealing material 4011.

At this time, the filler 4023 also functions as an adhesive for bonding the cover member 4009.
As the filler 4023, PVC (polyvinyl chloride), epoxy resin, silicone resin, PVB (polyvinyl butyral), or EVA (ethylene vinyl acetate) can be used. It is preferable to provide a desiccant inside the filler 4023 because a moisture absorbing effect can be maintained. Further, by disposing an antioxidant or the like having an effect of capturing oxygen inside the filler 4023, deterioration of the EL layer may be suppressed.

[0139] A spacer may be contained in the filler 4023. At this time, the spacer may be a granular substance made of BaO or the like, and the spacer itself may have hygroscopicity.

When a spacer is provided, the passivation film 4022 can reduce the spacer pressure.
Further, a resin film or the like for relaxing the spacer pressure may be provided separately from the passivation film.

As the cover material 4009, a glass plate, an aluminum plate, a stainless steel plate, FRP (Fibergla
ss-Reinforced Plastics) plate, PVF (polyvinyl fluoride) film, mylar film, polyester film or acrylic film can be used. Note that when PVB or EVA is used as the filler 4023, it is preferable to use a sheet having a structure in which aluminum foil of several tens [nm] is sandwiched between PVF films or mylar films.

However, depending on the direction of light emission (the direction of light emission) from the EL element, the cover material 4009 needs to have translucency.

The wiring 4007 is made of a sealing material 401.
1 and the sealant 4010 and the substrate 4001, and electrically connected to the FPC 4008. Although the wiring 4007 has been described here, the other wiring 4007
5 and 4006 are also electrically connected to the FPC 4008 under the sealant 4011 and the sealant 4010 in the same manner.

In this embodiment, the sealing material 4011 is attached so as to cover the side surface (exposed surface) of the filling material 4023 after the filling material 4023 is provided and the sealing material 4011 is attached. Lumber 4
After attaching 011, the filler 4023 may be provided. In this case, an inlet for a filler is provided to communicate with a space formed by the substrate 4001, the cover material 4009, and the sealing material 4011. Then, the gap is vacuumed (1
0 ^-2 [Torr] or less), fill the filling material into the water tank by immersing the injection port in the filling tank, and then make the pressure outside the gap higher than the pressure inside the gap. I do.

[Embodiment 7] FIG. 18 shows a more detailed sectional structure of a pixel portion in an electronic device of the present invention.

In FIG. 18, as a switching TFT 4502 provided on a substrate 4501, an N-channel TFT formed by a known method is used in this embodiment. In this embodiment, a double gate structure is used. However, since there is no significant difference between the structure and the manufacturing process, the description is omitted. However, by adopting a double gate structure, substantially two TFs are formed.
There is an advantage that the structure is such that T is connected in series, and the off-current value can be reduced. Although the double gate structure is used in this embodiment, a single gate structure, a triple gate structure, or a multi-gate structure having more gates may be used.

As the EL driving TFT 4503, an N-channel TFT formed by a known method is used. A drain wiring 4504 of the switching TFT 4502 is electrically connected to a gate electrode 4506 of the EL driving TFT 4503 by a wiring (not shown).

In this embodiment, the EL driving TFT 45 is used.
03 is shown with a single gate structure.
A multi-gate structure in which FTs are connected in series may be used.
Further, a structure in which a plurality of TFTs are connected in parallel to substantially divide the channel formation region into a plurality of regions so that heat can be radiated with high efficiency may be employed. Such a structure is effective as a measure against deterioration due to heat.

Further, a wiring (not shown) including the gate electrode 4506 of the EL driving TFT 4503 is
The drain wiring 4512 of the FT 4503 partially overlaps with an insulating film interposed therebetween, and a storage capacitor is formed in that region. This storage capacitor is connected to the gate electrode 4 of the EL driving TFT 4503.
A function of holding a voltage applied to the 506.

Switching TFT 4502 and EL
A first interlayer insulating film 451 is formed on the driving TFT 4503.
4 is provided thereon, and a second interlayer insulating film 4515 made of a resin insulating film is formed thereon.

Reference numeral 4517 denotes a pixel electrode (cathode of an EL element) made of a highly reflective conductive film.
03 is formed so as to partially cover the drain region, and is electrically connected. As the pixel electrode 4517, a low-resistance conductive film such as an aluminum alloy film, a copper alloy film, or a silver alloy film, or a stacked film thereof is preferably used. Of course, a stacked structure with another conductive film may be employed.

Next, an organic resin film 4516 is formed on the pixel electrode 451.
7 and patterning the portion facing the pixel electrode 4517, the light emitting layer 4519 is formed. Although not shown here, R (red), G (green), B (blue)
The light-emitting layers corresponding to the respective colors may be separately formed. As the organic EL material for the light emitting layer, a π-conjugated polymer material is used. Typical polymer materials include polyparaphenylene vinylene (PPV), polyvinyl carbazole (PVK), and polyfluorene.

There are various types of PPV-based organic EL materials, for example, “H. Shenk, H. Becker, OG”
elsen, E. Kluge, W. Kreuder and H. Spreitzer: “Polym
ersfor Light Emitting Diodes ”, Euro Display, Procee
dings, 1999, pp. 33-37 ”and JP-A-10-92576.

As a specific light emitting layer, cyanopolyphenylene vinylene is used for a light emitting layer emitting red light, polyphenylene vinylene is used for a light emitting layer emitting green light, and polyphenylene vinylene or polyalkylphenylene is used for a light emitting layer emitting blue light. Good. The film thickness is 30 to 150
[Nm] (preferably 40 to 100 [nm]).

However, the above example is an example of the organic EL material that can be used as the light emitting layer, and it is not necessary to limit the invention to this. An EL layer (a layer for performing light emission and carrier movement therefor) may be formed by freely combining a light emitting layer, a charge transport layer, or a charge injection layer.

For example, in this embodiment, an example is shown in which a polymer material is used for the light emitting layer, but a low molecular organic EL material may be used. It is also possible to use an inorganic material such as silicon carbide for the charge transport layer and the charge injection layer. Known materials can be used for these organic EL materials and inorganic materials.

[0157] The EL element 4510 is completed when the anode 4523 is formed. Note that the EL element 45 here is used.
Reference numeral 10 denotes a pixel electrode (cathode) 4517 and a light emitting layer 451
9 and the storage capacitor formed by the hole injection layer 4522 and the anode 4523.

Incidentally, in this embodiment, a passivation film 4524 is further provided on the anode 4523.
As the passivation film 4524, a silicon nitride film or a silicon nitride oxide film is preferable. The purpose of this is to shut off the EL element from the outside, and has both the meaning of preventing the organic EL material from being deteriorated due to oxidation and the effect of suppressing outgassing from the organic EL material. This increases the reliability of the electronic device.

As described above, the electronic device described in this embodiment has a pixel portion composed of pixels having a structure as shown in FIG. 18, and a switching TFT having a sufficiently low off-current value.
And an EL driving TFT resistant to hot carrier injection. Therefore, an electronic device having high reliability and capable of displaying an excellent image can be obtained.

E having the structure described in this embodiment is
In the case of the L element, light generated in the light emitting layer 4519 is radiated in a direction opposite to the substrate on which the TFT is formed as indicated by an arrow.

[Embodiment 8] In this embodiment, Embodiment 7
In the pixel portion shown in FIG. 18, a structure obtained by inverting the structure of the EL element 4510 will be described. Figure 1 for explanation
9 is used. Note that the only difference from the structure of FIG. 18 is the EL element portion and the TFT portion, and therefore, other descriptions will be omitted.

In FIG. 19, the switching TFT 4
Reference numeral 502 denotes an N-channel TFT formed by a known method. As the EL driving TFT 4503, a P-channel TFT formed by a known method is used.

In this embodiment, the pixel electrode (anode) 4525
Is used as a transparent conductive film. Specifically, a conductive film formed using a compound of indium oxide and zinc oxide is used. Needless to say, a conductive film made of a compound of indium oxide and tin oxide may be used.

The third interlayer insulating film 4 made of a resin film
After 526 is formed, a light emitting layer 4528 is formed.
On top of this, potassium acetylacetonate (acacK
) And a cathode 4530 made of an aluminum alloy.

After that, similarly to the seventh embodiment, a passivation film 4532 for preventing oxidation of the organic EL material is formed, and thus an EL element 4531 is formed.

E having the structure described in this embodiment
In the case of the L element, light generated in the light emitting layer 4528 is emitted toward the substrate on which the TFT is formed, as indicated by an arrow.

[Embodiment 9] The electronic devices shown in Embodiments 7 and 8 can be easily manufactured even if an inverted staggered TFT is used as a TFT constituting a drive circuit. This will be described with reference to FIG. Portions common to the seventh and eighth embodiments are denoted by the same reference numerals as those in FIGS.

In FIG. 20, as a switching TFT 4502 provided on a substrate 4501, an N-channel TFT formed by a known method is used in this embodiment. Although a single gate structure is used in this embodiment, a double gate structure, a triple gate structure, or a multi-gate structure having more gates may be used. In the switching TFT 4502, an LDD region is provided on both sides of a source region and a drain region in a portion overlapping with a gate electrode and a portion not overlapping with the gate electrode. Is also good.

As the EL driving TFT 4503, a P-channel TFT formed by a known method is used. A drain wiring 4533 of the switching TFT 4502 is electrically connected to a gate electrode 4534 of the EL driving TFT 4503 by a wiring (not shown).

In this embodiment, the EL driving TFT 45 is used.
03 is shown with a single gate structure.
A multi-gate structure in which FTs are connected in series may be used.
Further, a structure in which a plurality of TFTs are connected in parallel to substantially divide the channel formation region into a plurality of regions so that heat can be radiated with high efficiency may be employed. Such a structure is effective as a measure against deterioration due to heat.

The wiring (not shown) including the gate electrode 4534 of the EL driving TFT 4503 is
The source wiring 4535 of the FT 4503 partially overlaps with an insulating film interposed therebetween, and a storage capacitor is formed in that region. This storage capacity is equivalent to the gate electrode 45 of the EL driving TFT 4503.
It has a function of holding the voltage applied to the voltage.

Switching TFT 4502 and EL
A first interlayer insulating film 453 is formed on the driving TFT 4503.
6 is provided thereon, and a second interlayer insulating film 4537 made of a resin insulating film is formed thereon.

Thereafter, similarly to the seventh and eighth embodiments, the pixel electrode (anode) 4538, the light emitting layer 4539, the electron injection layer 4540, the cathode 4541, the passivation film 4542 are formed.
Are formed, and an EL element 4531 is formed.

E having the structure described in this embodiment
In the case of the L element, light generated in the light emitting layer 4539 is radiated toward the substrate on which the TFT is formed as indicated by an arrow.

[Embodiment 10] In the present invention, the external light emission quantum efficiency can be remarkably improved by using an EL material capable of utilizing phosphorescence from triplet excitons for light emission. As a result, the power consumption and the life of the EL element can be reduced,
And weight reduction becomes possible.

Here, a report is shown in which the triplet exciton is used to improve the external light emission quantum efficiency. (T.Tsutsui, C.Ada
chi, S. Saito, Photochemical Processes in Organized
Molecular Systems, ed.K.Honda, (Elsevier Sci.Pu
b., Tokyo, 1991) p.437.) The molecular formula of the EL material (coumarin dye) reported in the above article is shown below.

[0177]

Embedded image

(MABaldo, DFO'Brien, Y.You, A.Sho
ustikov, S. Sibley, METhompson, SRForrest, Natu
re 395 (1998) p.151.) The molecular formula of the EL material (Pt complex) reported by the above paper is shown below.

[0179]

Embedded image

(MABaldo, S. Lamansky, PEBurrrows,
METhompson, SRForrest, Appl.Phys.Lett., 75 (19
99) p.4.) (T.Tsutsui, M.-J.Yang, M.Yahiro, K.Nakamura, T.Wa
tanabe, T.tsuji, Y.Fukuda, T.Wakimoto, S.Mayaguch
i, Jpn. Appl. Phys., 38 (12B) (1999) L1502.) The molecular formula of the EL material (Ir complex) reported by the above-mentioned paper is shown below.

[0181]

Embedded image

As described above, if the phosphorescence emission from the triplet exciton can be used, it is possible in principle to realize an external emission quantum efficiency three to four times higher than the case where the fluorescence emission from the singlet exciton is used. . Note that the configuration of this embodiment is the same as that of Embodiments 1 to
The present invention can be implemented by freely combining with any configuration of the ninth embodiment.

[Embodiment 11] An EL display to which the electronic device and the driving method of the present invention are applied is a self-luminous type, so that it has better visibility in a bright place than a liquid crystal display and has a wide viewing angle. Therefore, it can be used as a display portion of various electronic devices. For example, to watch a TV broadcast or the like on a large screen, it is preferable to use the electronic device and the driving method of the present invention in a display portion of an EL display having a diagonal of 30 inches or more (typically, 40 inches or more).

Note that the EL display includes all information display devices such as a personal computer display device, a TV broadcast reception display device, and an advertisement display device. In addition, the electronic device of the present invention and a driving method thereof can be used for display portions of various electronic devices.

Such electronic devices of the present invention include a video camera, a digital camera, a goggle type display device (head mounted display), a navigation system,
Sound playback devices (car audio, audio components, etc.), notebook personal computers, game machines,
A portable information terminal (a mobile computer, a mobile phone, a portable game machine, an electronic book, or the like), and an image reproducing apparatus provided with a recording medium (specifically, a digital video disc (DV
D) and the like, a device having a display capable of reproducing a recording medium and displaying its image). In particular, for a portable information terminal that is often viewed from an oblique direction, a wide viewing angle is regarded as important, and it is desirable to use an EL display. FIGS. 23 and 24 show specific examples of these electronic devices.
Shown in

FIG. 23A shows an EL display.
A housing 3301, a support 3302, a display portion 3303, and the like are included. The electronic device of the present invention and the driving method thereof can
03 can be used. Since the EL display is a self-luminous type, it does not require a backlight and can be a display portion thinner than a liquid crystal display.

FIG. 23B shows a video camera, which includes a main body 3311, a display portion 3312, an audio input portion 3313, an operation switch 3314, a battery 3315, and an image receiving portion 331.
6 and so on. The electronic device and the driving method of the invention can be used in the display portion 3312.

FIG. 23C shows a part (right side) of the head mounted EL display, which includes a main body 3321, a signal cable 3322, a head fixing band 3323, and a display section 33.
24, an optical system 3325, a display device 3326, and the like. The electronic device of the present invention and the driving method thereof are the same as the display device 3326.
Can be used.

FIG. 23D shows an image reproducing apparatus (specifically, a DVD reproducing apparatus) provided with a recording medium.
1, recording medium (DVD, etc.) 3332, operation switch 33
33, a display unit (a) 3334, a display unit (b) 3335, and the like. The display unit (a) 3334 mainly displays image information, and the display unit (b) 3335 mainly displays character information. The electronic device and the driving method of the present invention employ the display unit (a) 3334 and the display unit ( b) Can be used in 3335. Note that the image reproducing device provided with the recording medium includes a home game machine and the like.

FIG. 23E shows a goggle type display device (head mounted display), which includes a main body 3341, a display portion 3342, and an arm portion 3343. The electronic device and the driving method of the invention can be used in the display portion 3342.

FIG. 23F shows a personal computer, which includes a main body 3351, a housing 3352, a display portion 3353,
A keyboard 3354 and the like. The electronic device and the driving method of the invention can be used in the display portion 3353.

If the emission luminance of the EL material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like and used for a front-type or rear-type projector.

[0193] The electronic device is the Internet or C
Information distributed through an electronic communication line such as an ATV (cable television) is frequently displayed, and in particular, opportunities to display moving image information are increasing. Since the response speed of the EL material is very high, the EL display is preferable for displaying moving images.

In the EL display, since the light emitting portion consumes power, it is desirable to display information so as to reduce the light emitting portion as much as possible for power saving. Therefore, when an EL display is used for a portable information terminal, particularly a display unit mainly for character information such as a mobile phone or a sound reproducing device, the display is driven so that character information is formed by a light emitting portion with a non-light emitting portion as a background. It is desirable to do.

FIG. 24A shows a portable telephone, and the main body 34 is provided.
01, audio output unit 3402, audio input unit 3403, display unit 3404, operation switch 3405, antenna 3406
including. The electronic device and the driving method of the invention can be used in the display portion 3404. The display unit 340
No. 4 can suppress power consumption of the mobile phone by displaying white characters on a black background.

FIG. 24B shows a sound reproducing device, specifically, a car audio.
2. Including operation switches 3413 and 3414. The electronic device and the driving method of the invention can be used in the display portion 3412. In this embodiment, the in-vehicle audio is shown, but the present invention may be applied to a portable or home-use audio reproducing apparatus. Note that the display portion 3414 can reduce power consumption by displaying white characters on a black background. This is particularly effective in a portable sound reproducing device.

FIG. 24C shows a digital camera, which includes a main body 3501, a display section (A) 3502, an eyepiece section 3503,
An operation switch 3504, a display portion (B) 3505, and a battery 3506 are included. The electronic device of the present invention can be used for the display portion (A) 3502 and the display portion (B) 3505. In the case where the display portion (B) 3505 is mainly used as an operation panel, power consumption can be suppressed by displaying white characters on a black background.

In the portable electronic device shown in this embodiment, the method for reducing power consumption is as follows.
A method of providing a sensor unit for sensing external brightness and adding a function such as lowering the brightness of the display unit when used in a dark place is exemplified.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be used for electronic devices in various fields. Further, the electronic apparatus of the present embodiment includes the first to tenth embodiments.
Any of the configurations shown in FIG.

Normally, when there are m pixels in the horizontal direction, the source signal line side driving circuit has m stages.
By using the configuration of the present invention, m / 2 stages can be obtained. In addition, there is no need to increase the operating frequency, so that there is no problem in terms of reliability. Therefore, a narrower pixel pitch due to a higher definition of the screen can avoid a design problem due to a reduced space for arranging the driving circuit, which can greatly contribute to a higher definition of the electronic device.

Further, by sharing the source signal line in the pixel portion, it is possible to reduce the total number of wires, and it can be said that there is a point that the aperture ratio is more advantageous than the pixel portion having a normal structure. .

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of a pixel of an electronic device of the present invention.

FIG. 2 is a diagram showing a difference in the number of stages of a drive circuit between a conventional electronic device and an electronic device of the present invention.

FIG. 3 is a diagram showing a timing chart according to a time gray scale method.

FIG. 4 is a diagram showing a timing chart by a time gray scale method in the electronic device of the present invention.

FIG. 5 is a diagram showing a circuit configuration example of the electronic device of the present invention shown in the first embodiment.

FIG. 6 is a diagram showing a circuit configuration example of a pixel portion of the electronic device of the present invention shown in Embodiment 1.

FIG. 7 is a view showing a timing chart of a driving method of the electronic device of the present invention shown in Embodiment 1.

FIG. 8 is a diagram showing a timing chart of a method for driving an electronic device of the present invention shown in Embodiment 2.

FIG. 9 is a diagram showing a timing chart of a method for driving an electronic device of the present invention shown in Embodiment 2.

FIG. 10 is a diagram showing a circuit configuration example of a pixel portion of the electronic device of the present invention shown in Embodiment 3.

FIG. 11 is a diagram showing a timing chart regarding a driving method for providing a non-display period shown in Embodiment 4.

FIG. 12 illustrates a relationship between a source-drain voltage of an EL driving transistor and lighting of an EL element.

FIG. 13 is a diagram showing a timing chart of a driving method for providing a non-display period shown in Embodiment 4.

FIG. 14 is a diagram showing an example of a manufacturing process of the electronic device of the present invention shown in Embodiment 5.

FIG. 15 is a diagram showing an example of a manufacturing process of the electronic device of the present invention shown in Embodiment 5.

FIG. 16 is a diagram showing an example of a manufacturing process of the electronic device of the present invention shown in Embodiment 5.

FIG. 17 is a diagram illustrating a top surface and a cross section of an electronic device described in Embodiment 6.

FIG. 18 is a cross-sectional view of the electronic device shown in the seventh embodiment.

FIG. 19 is a cross-sectional view of the electronic device shown in the eighth embodiment.

FIG. 20 is a cross-sectional view of the electronic device shown in the ninth embodiment.

FIG. 21 illustrates a circuit configuration example of an electronic device.

FIG. 22 illustrates a structure of a pixel portion in a normal electronic device.

FIG. 23 is a diagram illustrating an example of an electronic device to which the electronic device of the present invention described in Embodiment 11 is applied.

FIG. 24 is a diagram illustrating an example of an electronic device to which the electronic device of the present invention described in Embodiment 11 is applied.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/20 624 G09G 3/20 624B 641 641F 680 680P 680S 680V H05B 33/08 H05B 33/08 33/14 33/14 A

Claims (17)

[Claims] A source signal line side driving circuit, a gate signal line side driving circuit, a pixel selection signal line side driving circuit, and a pixel portion, wherein the pixel portion has m source signal lines; Each of the m source signal lines includes k gate signal lines and 2 km pixels, each of the m source signal lines includes k pixel selection units, and each of the m source signal lines includes a pixel selection unit. Are electrically connected to the 2k pixels via the pixel. Each of the 2km pixels has a switching transistor, an EL driving transistor, and an EL element. The gate electrode of the switching transistor is One of the impurity regions of the switching transistor is electrically connected to the source signal line, and the other is the E region.
One of the impurity regions of the EL driving transistor is electrically connected to the current supply line, and the other is electrically connected to one electrode of the EL element. An electronic device, comprising: 2. A source signal line side drive circuit, a gate signal line side drive circuit, a pixel selection signal line side drive circuit, and a pixel portion, wherein the pixel portion has m source signal lines, It has k gate signal lines and 2 km pixels. Each of the 2 km pixels has a switching transistor, an EL driving transistor, and an EL element. The gate electrode of the switching transistor is One of the impurity regions of the switching transistor is electrically connected to a source signal line via a pixel selection unit, and the other is a gate electrode of the EL driving transistor. One of the impurity regions of the EL driving transistor is electrically connected to the current supply line, and the other is electrically connected to one electrode of the EL element. Electronic apparatus characterized by being continued. 3. The electronic device according to claim 1, wherein the source signal line side driving circuit performs a video signal writing operation twice in one horizontal period for each of the m source signal lines. An electronic device characterized by being performed on an electronic device. 4. The electronic device according to claim 1, wherein a first pixel and a second pixel are electrically connected to one pixel selection unit. The pixel selection unit selects the first pixel in the first half of one horizontal period, selects the second pixel in the second half of one horizontal period, and selects the video signal input from the source signal line. Is written only to the pixel on the side selected by the pixel selection unit. 5. The electronic device according to claim 1, wherein the pixel selection unit includes an N-channel transistor and a P-channel transistor. . 6. The electronic device according to claim 1, wherein the pixel selection unit includes an analog switch. 7. One frame period has n sub-frame periods SF ₁ , SF ₂ ,..., SF _n , and each of the sub-frame periods is an address (write).
Period _{Ta 1, Ta 2, ···,} Ta n and sustain (lighting) periods Ts _1, Ts _2, and a · · · Ts _n, gradation of n bits by controlling the light emission time of the EL element In the driving method of the electronic device for performing display, when the number of pixels in the horizontal direction of the electronic device is 2 m, one horizontal period is divided into two periods, and one of the periods is 1, 3,. Writing of the video signal to the 2m-3rd and 2m-1st pixels is performed, and writing of the video signal to the 2,4,. A method for driving an electronic device. 8. The method for driving an electronic device according to claim 7, wherein the video signal is written to the first, third,..., 2m-3, and 2m−1 pixels for one horizontal period. The first half of the period, and the period in which the video signal is written to the second, fourth,..., 2m-2, and 2m-th pixels is the latter half of one horizontal period. Method. 9. The driving method of an electronic device according to claim 7, wherein the video signal is written to the first, third,..., 2m-3, and 2m-1 pixels for one horizontal period. The second half of the period, and the period during which the video signal is written to the second, fourth,..., 2m-2, and 2m-th pixels is the first half of one horizontal period. Method. 10. An EL display using the electronic device according to any one of claims 1 to 6. 11. A mobile phone using the electronic device according to claim 1. Description: 12. A car audio using the electronic device according to any one of claims 1 to 6. 13. A digital camera using the electronic device according to any one of claims 1 to 6. 14. A method of driving an electronic device according to claim 1, wherein the driving method comprises the steps of:
L display. 15. A mobile phone using the method for driving an electronic device according to claim 1. Description: 16. A car audio using the method for driving an electronic device according to claim 1. Description: 17. A digital camera using the driving method of an electronic device according to claim 1. Description: