JPH0613500Y2 - Pulse signal analyzer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Purpose of Invention] (Industrial Application Field) In this invention, it is known in advance that one or more pulse signals exist within a certain period at a certain period. The present invention relates to a pulse signal analyzer that receives an incoming radio wave whose signal interval and pulse width are unknown and analyzes the input pulse signal.

(Prior Art) As is well known, in a secondary surveillance radar, an inquiry signal and a response signal are transmitted / received to / from each aircraft, but these signals transmit encoded pulses within a certain period. It occurs at regular intervals.

In this way, regarding radio waves for which it is known in advance that one or more pulse signals exist within a certain period with a certain period, analyze the specifications of the radio waves, such as the intervals and pulse widths of individual pulse signals. In that case, since it is difficult to perform analysis processing synchronized with the pulse signal in the past,
Generally, on the receiving side, the input signal is sampled at an appropriate cycle, the sampling result is stored digitally,
The specifications of the input pulse signal are analyzed by analyzing the periodicity and correlation of the input pulse signal from the stored data. The configuration of such a conventional pulse signal analyzer is shown in FIG.

That is, in FIG. 3, the above-mentioned radio wave is captured by the antenna 11, amplified and frequency-converted by the receiver 12, and then detected by the detection circuit 13, for example, as shown in FIG. 4 (a) or (c).
Is converted into a video signal A as shown in. This video signal A is sliced at the reference voltage level from the reference voltage generating circuit 15 in the quantizing circuit 14, and is shown in FIG. 4 (b) or (d).
Is converted into a digital signal B as shown in FIG. The information converted into the digital signal B is input to the memory circuit 16. That is, the quantized digital signal is stored in the memory circuit 16 every moment. The information accumulated in the memory circuit 16 is sent to the signal processing circuit 17 at any time, and analyzed for its periodicity, correlation, etc. The output of the signal processing circuit 17 is taken out as the analysis result of the input pulse signal.

In FIGS. 4A and 4B, FIGS. 4A and 4B show the case where the input signal is a simple pulse signal, and FIGS. 4C and 4D show the case of an encoded pulse signal.

However, in the conventional pulse signal analyzer as described above, since the digital signal converted by the quantization circuit 14 needs to be input and stored in the memory circuit 16, the storage capacity of the memory circuit 16 required for signal processing is It is huge. Therefore, the hardware is large and the control configuration and the like are complicated.

For example, as shown in FIG. 4 (e), when a plurality of pulse signals are input 1000 times within the repetition period 1 [ms] of the main pulse signal, this is 10 [MHz] (Δt = 0.1 [μs] Considering the case of quantization with the sampling frequency of), the minimum memory capacity required to store this information is (1000 μs / 0.1 μs) × 1000 shots = 10 ⁷ bits = 10 Mbit. Further, it takes time to process the accumulated information, and since it is input every moment during that time, a memory capacity of several times that is practically required. As described above, the conventional pulse signal analyzer has a drawback that a huge memory capacity is required to perform the processing in a short time, and the control configuration for that purpose becomes complicated and the hardware becomes large. It was

(Problems to be solved by the device) This device requires a huge memory capacity to execute a short-time process in the conventional device, which causes a complicated control configuration and an increase in hardware. It is an object of the present invention to provide a pulse signal analyzer that improves the above points and can execute an analysis process of an input pulse signal in a short time with a smaller memory capacity.

[Structure of the Invention] (Means for Solving the Problems) That is, it is known that the pulse signal analyzer according to the present invention has one or more pulse signals in advance within a fixed period at a fixed cycle. Is a receiving means for receiving an incoming radio wave in which the interval and pulse width of individual pulse signals are unknown, a frequency converting means for detecting the signal received by this receiving means and converting it into a video signal, and a converting means by this frequency converting means. Quantizing means for converting the generated video signal into a quantized pulse signal based on a reference voltage, and the quantizing means sequentially detects the first pulse of the quantized pulse signal obtained at the constant period, and respectively detects from each detection time point. Gate signal generating means for generating a gate signal for a certain period, and a gate for passing the quantized pulse signal according to the gate signal obtained by the gate signal generating means A channel, a memory circuit that receives the gate signal, stores a quantized pulse signal output from the gate circuit, and reads the quantized pulse signal during a period in which the gate signal is not input; and a signal read from the memory circuit. And an analyzing means for analyzing the input pulse signal.

(Operation) That is, in the pulse signal analyzer having the above-described configuration, it is premised that one or more pulse signals are present in a certain period in a certain period in advance. The head pulse of the pulse signal is sequentially detected, and the gate is applied for a certain period from each detection point,
The quantized pulse signal was stored in the memory circuit only during the gate period, read out outside the gate period, and used for analysis of the input pulse signal.

(Embodiment) An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 shows the configuration. Where antenna 21
It is known in advance that one or more pulse signals are present in each of the radio waves arriving at a certain period within a certain period, but it is assumed that the intervals and pulse widths of the individual pulse signals are unknown. This radio wave is captured by the antenna 21 and the receiver 22
After being amplified and frequency-converted by, the signal is detected by the detection circuit 23 and converted into the video signal A. This video signal A is the first
And the second quantization circuits 24 and 25, and level-sliced and quantized by each reference voltage (which may or may not be the same) from the reference voltage generation circuit 26.

The output signal B2 of the second quantization circuit 25 is sent to the gate signal generation circuit 27. The gate signal generation circuit 27 sequentially detects a leading pulse signal (hereinafter, referred to as a main pulse) of a quantized pulse signal obtained at a constant period (known), and a constant period (the pulse signal is present) from each detection time point. A gate pulse D is generated during a period of time (known), and the gate pulse D is delayed by one cycle by a delay circuit 28 and then supplied to a gate circuit 29 and a memory circuit 30.
The gate circuit 29 receives the gate pulse E1 from the delay circuit 28.
The quantized pulse signal B1 sent from the first quantization circuit 24 at the time of input is passed and sent to the memory circuit 30. The memory circuit 30 sequentially stores and accumulates the quantized pulse signal from the gate circuit 29 when the gate pulse E2 is input, and the information accumulated here is sent to the signal processing circuit 31, where the periodicity and correlation of the input pulse signal are obtained. Processing such as sex is performed so that the analysis result can be obtained.

In the above configuration, when a video signal A as shown in FIG. 2 (a) is obtained, for example, the first and second quantizing circuits
The outputs B1 and B2 of 24 and 25 are both as shown in FIG. Then, the gate signal generating circuit 27 receives the quantized pulse signal B2 from the second quantizing circuit 25, detects its basic period pulse, that is, the main pulse, and from the main pulse to the time ΔT at which the encoded pulse exists. The corresponding gate signal D is generated for a certain period as shown in FIG. 2 (c). This gate signal D is supplied to the delay circuit 28 for a time TM corresponding to the basic period of the main pulse as shown in FIG. 2 (d).
After being delayed by P, it is sent to the gate circuit 29 and the memory circuit 30.

On the other hand, the output signal of the first quantization circuit 24 is supplied to the gate circuit 29, and the signal input to this gate circuit 29 is the gate signal from the delay circuit 28 as shown in FIG. 2 (e). Only the signal gated by E1 and corresponding to the gate signal input time is sent to and stored in the memory circuit 30.
The memory circuit 30 writes the digital signal F from the gate circuit 29 in the gate signal input period (ΔT) by the second gate signal E2 from the delay circuit 28, and conversely stores it before the gate signal input period. Signal processing circuit
Send to 31. The signal processing circuit 31 analyzes the periodicity and correlation of the input pulse signal, and analyzes the specifications of the pulse signal.

Therefore, the pulse signal analyzer configured as described above detects the main pulse from the input pulse signal and generates the gate signal D corresponding to the period in which a signal such as a coded pulse exists from the main pulse, The gate signal D gates the pulse signal only for the period corresponding to the next main pulse, so that the digital signal only for that period can be stored and the analysis processing can be performed in the other period, so that it is input momentarily. It is not necessary to store the pulse signal over the entire period, and the capacity of the memory circuit 30 can be made extremely smaller than that of the conventional one. For example, T =
1 [ms], Δt (pulse width) = 0.1 [μs], ΔT
If 1000 pulse signals are input within = 50 [μs], the memory capacity required to store this information is (50 μs / 0.1 μs) × 1000 = 5 × 10 ⁵ bits, Furthermore, if processing is performed within 1000-50 = 950 [μs], no more memory capacity is required, and the hardware can be extremely reduced compared to the conventional one, and its merit is large. .

[Advantages of the Invention] As described in detail above, according to the present invention, it is possible to provide a pulse signal analyzer capable of executing an analysis process of an input pulse signal in a short time with a smaller memory capacity.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a pulse signal analyzer according to the present invention, FIG. 2 is a timing diagram for explaining the operation of the embodiment, and FIG. 3 is a conventional pulse signal analyzer. FIG. 4 is a block diagram showing the configuration, and FIG. 4 is a timing diagram for explaining the operation of the conventional device. 21 ... Antenna, 22 ... Receiver, 23 ... Detection circuit, 24, 25
...... Quantization circuit, 26 …… Reference voltage generation circuit, 27 …… Gate signal generation circuit, 28 …… Delay circuit, 29 …… Gate circuit,
30 ... Memory circuit, 31 ... Signal processing circuit.

Claims (1)

[Scope of utility model registration request] 1. Receiving means for receiving an incoming radio wave in which it is known in advance that one or more pulse signals exist in a certain period with a certain period, but the intervals and pulse widths of the individual pulse signals are unknown, Frequency converting means for detecting the signal received by the receiving means and converting it into a video signal, and quantizing means for converting the video signal converted by the frequency converting means into a quantized pulse signal based on a reference voltage, The quantizing means sequentially detects the leading pulse of the quantized pulse signal obtained in the constant period, and generates the gate signal for the constant period from each detection time point, and the gate signal generating means. A gate circuit that passes the quantized pulse signal according to a gate signal, and a quantized pulse signal that is output from the gate circuit upon receiving the gate signal is stored. A pulse signal analyzing apparatus comprising: a memory circuit for accumulating and reading the gate signal in a period in which the gate signal is not input; and an analyzing unit for analyzing an input pulse signal by analyzing a signal read from the memory circuit. .