JPH0613400A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To heighten electric pressure resistance between the source.drain electrodes without forming a polycrystalline silicon film easily to badly affect an electric characteristic by implanting impurity ions on a semiconductor substrate while having a gate electrode consisting of polycrystalline silicon and a sidewall insulating film as masks. CONSTITUTION:After forming a gate oxide film 102, a silicon nitride film 112 and a gate electrode 113 of a polycrystalline silicon, impurity ions 104 are implanted. Next, the surface of the gate electrode 113 of polycrystalline silicon is thermooxidized so as to form a sidewall insulating film 107. Thereafter, impurity ions 108 are implanted for being subjected to heat treatment in a nitrogen atmosphere in order to form a thick impurity diffusion layer 109. Thereby, electric pressure resistance can be heightened between the source.drain electrodes by a simplified process.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and particularly to a highly reliable LDD (Lightly Doped Dorain).
The present invention relates to a method of forming a semiconductor device having a structure.

[0002]

2. Description of the Related Art As a conventional method for manufacturing a semiconductor device having an LDD structure, an example described in JP-A-2-273933 is known. Hereinafter, this conventional example will be described with reference to the drawings.

2A to 2C are sectional views in the order of steps of a conventional example. First, as shown in FIG. 2A, a gate oxide film 102 and a gate electrode 1 are formed on a semiconductor substrate 101 (p-type).
03 to form impurity ions (p ⁺ ) 104 of about 10 ¹³ c
^Implant by m ⁻² ion implantation method. Next, as shown in FIG. 2B, an extremely thin polycrystalline silicon film 105 (about 500
Å) and the silicon dioxide film 107 are deposited by the method of about 2500 Å CVD, and then the entire surface is dry-etched by anisotropic dry etching to form the sidewall insulating film 107. Further, the impurity ions (As ⁺ ) 108 are added to about 10
Implantation is performed by a ¹⁵ cm ⁻² ion implantation method, and heat treatment is performed in a nitrogen atmosphere to form a deep impurity diffusion layer (n ⁺ ) 109. Next, as shown in FIG. 2C, the interlayer insulating film 110 is formed by CVD.
Then, about 5000Å is deposited by the method, and then a well-known photolithography method is used to form the opening of the contact window and the aluminum wiring 111 to complete the semiconductor device. In the semiconductor device manufactured by such a conventional manufacturing method,
The hot carriers are not captured in the sidewall insulating film 107, and the extremely thin polycrystalline silicon under the sidewall insulating film 107 is connected to the gate electrode. The effect on the transistor characteristics is small, and the deterioration of the transistor characteristics after long-term use is improved and the reliability is improved.

[0004]

However, in the semiconductor device manufactured by the above-described conventional manufacturing method, an extremely thin polycrystalline silicon film 105 must be formed in order to prevent hot carriers from being injected into the sidewall insulating film 7. However, a trap level is formed at the interface between the extremely thin polycrystalline silicon film 105 and the gate oxide film 102 as shown in FIG. 2C, and the fixed charge trapped at the level causes the transistor characteristic. There is a problem that the threshold value is changed.
In addition, since the polycrystalline silicon film 105 has the same potential as the gate electrode 103 during operation in order to inject and diffuse a high concentration of impurities after the polycrystalline silicon film 105 is formed, the vicinity of the source electrode and the drain electrode is There is also a problem that the electric field strength is not relaxed and the electrical breakdown voltage between the source and drain electrodes becomes low even though the LDD structure is realized. In addition to these problems, it is difficult to control the etching time during dry etching of the sidewall insulating film 107, and in the semiconductor substrate 1 having a diameter exceeding 5 inches, the LDD of the semiconductor device is
The length of the region varies, which causes a factor of variation in transistor characteristics.

Therefore, the present invention solves such a problem, and an object of the present invention is to form a polycrystalline silicon film which has a bad influence on electric characteristics without forming a polycrystalline silicon film between the source and drain electrodes. It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of realizing a semiconductor device having an LDD structure, which has a high electrical breakdown voltage, high reliability, and little variation in transistor characteristics, on a large-area semiconductor substrate.

[0006]

A step of forming a gate oxide film and a silicon nitride film on a semiconductor substrate and then forming a gate electrode made of polycrystalline silicon, and thermally oxidizing the gate electrode made of polycrystalline silicon. The method is characterized by including a step of forming a sidewall insulating film and a step of implanting impurity ions on the semiconductor substrate by using the gate electrode made of the polycrystalline silicon and the sidewall insulating film as a mask.

[0007]

EXAMPLES A method for manufacturing a semiconductor device according to the present invention will be described in detail below with reference to examples.

As shown in FIG. 1A, the semiconductor substrate (p
Type Si) 101 on the gate oxide film 102 and the silicon nitride film 1
After forming 12 and the gate electrode 113 of polycrystalline silicon, impurity ions (p ⁺ ) 104 are implanted by about 10 ¹³ cm ^-2 ion implantation method. Next, as shown in FIG. 1B, the surface of the gate electrode 113 of polycrystalline silicon is thermally oxidized to form a sidewall insulating film 107 of about 3000 liters. Impurity ions implanted into the semiconductor substrate 101 during this thermal oxidation are activated, and a thin impurity diffusion layer (n ⁻ ) 106 is formed. As described above, since the sidewall insulating film 7 is formed by the thermal oxidation method, there is less variation in the film thickness as compared with the conventional forming method by the CVD method and the dry etching method, the film quality is good, and the trap level is also high. Few.
Therefore, in the semiconductor device having the LDD structure using such a sidewall insulating film 107, the variation in the length of the LDD region is small, and the transistor characteristics on the large-area semiconductor substrate are uniform, so that the inside of the sidewall insulating film 107 is formed. Highly reliable with little hot carrier injection. Also,
Unlike the conventional example, it is not necessary to form a polycrystalline silicon film to be connected to the gate electrode, which not only simplifies the process but also relaxes the electric field strength near both the source and drain electrodes, so The electrical withstand voltage of
It is also possible to miniaturize the semiconductor device. After forming the side wall insulating film 107, as shown in FIG. 1C, impurity ions (As ⁺ ) 108 are implanted by an ion implantation method of about 10 ¹⁵ cm ^-2 , and heat treatment is performed in a nitrogen atmosphere to diffuse a deep impurity. A layer (n ⁺ ) 109 is formed. Next, as shown in FIG. 2D, an interlayer insulating film 110 is deposited by a CVD method to a thickness of about 500 Å, and then a well-known photolithography method is used to form an opening of a contact window and an aluminum wiring 111 to form a semiconductor device. To complete. As described above, when the gate electrode is made of polycrystalline silicon and the side wall insulating film 107 is formed by thermally oxidizing a part of the gate electrode, the side wall insulating film is anisotropically dried as in the conventional manufacturing method. It is not necessary to form it by etching, the thickness of the sidewall insulating film 107 can be easily controlled, and the process can be simplified.

Although the impurity ion implantation is performed twice in this embodiment, the impurity ion implantation is not performed for the LDD region structure shown in FIG. It is possible to construct the LDD structure semiconductor device by only performing the high-concentration impurity implantation shown in FIG. This is because the sidewall insulating film 107 formed by the thermal oxidation method acts as a mask at the time of ion implantation, and has the effect of reducing the concentration of ions implanted under the sidewall insulating film 107. According to the method, the process can be further simplified.

[0010]

As described above, according to the method of manufacturing a semiconductor device of the present invention, the source-drain electrode between the source and drain electrodes can be formed by a simplified process in which the side wall film of polycrystalline silicon, which easily adversely affects the electrical characteristics, is not formed. The semiconductor device having the LDD structure having a high electric breakdown voltage, high reliability, and excellent and uniform electric characteristics can be realized on a large-area semiconductor substrate.

[Brief description of drawings]

1A to 1D are cross-sectional views in order of the processes, showing an embodiment of a method for manufacturing a semiconductor device of the present invention.

2A to 2C are cross-sectional views in order of the processes, showing an example of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

101 Semiconductor Substrate 102 Gate Oxide Film 103 Gate Electrode 104 Impurity Ion (p ⁺ ) 105 Extremely Thin Polycrystalline Silicon 106 Thin Impurity Diffusion Layer (n ⁻ ) 107 Sidewall Insulation Film 108 Impurity Ion (As ⁺ ) 109 Concentration Impurity Diffusion Layer (N ⁺ ) 110 Interlayer insulating film 111 Aluminum electrode 112 Silicon nitride film 113 Polycrystalline silicon gate electrode

Claims (1)

[Claims] 1. A step of forming a gate oxide film and a silicon nitride film on a semiconductor substrate and then forming a gate electrode made of polycrystalline silicon; and a step of thermally oxidizing the gate electrode made of polycrystalline silicon to form a sidewall insulating film. And a step of implanting impurity ions on the semiconductor substrate using the gate electrode made of polycrystalline silicon and the sidewall insulating film as a mask.