KR100266635B1 - Method for fabricating semiconductor oxide - Google Patents

Method for fabricating semiconductor oxide Download PDF

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KR100266635B1
KR100266635B1 KR1019970057035A KR19970057035A KR100266635B1 KR 100266635 B1 KR100266635 B1 KR 100266635B1 KR 1019970057035 A KR1019970057035 A KR 1019970057035A KR 19970057035 A KR19970057035 A KR 19970057035A KR 100266635 B1 KR100266635 B1 KR 100266635B1
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oxide film
ion implantation
substrate
layer
nitrogen
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KR1019970057035A
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KR19990035266A (en
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김응수
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김영환
현대반도체주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

PURPOSE: A method for forming an oxide layer of a semiconductor is provided to prevent diffusion of dopant ions by implanting nitrogen ions before performing an oxidizing process. CONSTITUTION: A buffer oxide layer is deposited on an upper portion of a substrate(1). A nitrogen ion implantation layer(5) is formed by implanting into a boundary region between the butter oxide layer and the substrate(1). An upper portion of the nitrogen ion implantation layer(5) is exposed by removing the buffer oxide layer. An oxynitride layer is formed by oxidizing the exposed nitrogen ion implantation layer(5). The oxynitride layer is used as a gate oxide layer.

Description

반도체 산화막 형성방법{METHOD FOR FABRICATING SEMICONDUCTOR OXIDE}Method of forming semiconductor oxide film {METHOD FOR FABRICATING SEMICONDUCTOR OXIDE}

본 발명은 반도체 산화막 형성방법에 관한 것으로, 특히 산화공정 전에 질소이온을 주입하여 전기적인 절연특성을 개선한 반도체 산화막 형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a semiconductor oxide film, and more particularly, to a method for forming a semiconductor oxide film in which nitrogen ions are implanted before an oxidation process to improve electrical insulation properties.

일반적으로, 반도체 산화막의 형성방법은 건식산화와 습식산화공정으로 크게 분류된다. 상기 건식산화방법은 순수한 산소(O2)에 의한 산화방법이며, 습식산화는 수증기의 혼입에 의한 산화방법이다. 이와 같이 건식산화 및 습식산화를 통해 제조되는 산화막은 전기적인 특성은 서로 동일하고, 건식산화보다 습식산화가 산화막의 성장속도가 빠른 차이가 있는 것으로, 모두 순수한 산화막(SiO2)을 제조하게 되며, 이와 같은 종래 반도체 산화막의 역할과 특성에 대해 모스 트랜지스터의 게이트산화막 형성방법을 참조로 상세히 설명하면 다음과 같다.In general, the method of forming a semiconductor oxide film is roughly classified into a dry oxidation process and a wet oxidation process. The dry oxidation method is an oxidation method using pure oxygen (O 2 ), and the wet oxidation is an oxidation method by incorporation of water vapor. As such, the oxide film manufactured through dry oxidation and wet oxidation has the same electrical characteristics, and there is a difference in that the growth rate of the oxide film is faster than that of dry oxidation, and thus all pure oxide films (SiO 2 ) are manufactured. The role and characteristics of the conventional semiconductor oxide film will be described in detail with reference to a method of forming a gate oxide film of a MOS transistor.

도1a 및 도1b는 종래 모스 트랜지스터에서 게이트산화막과 게이트전극을 증착하는 과정을 보인 제조공정 수순단면도로서, 이에 도시한 바와 같이 기판(1)의 상부에 습식산화 또는 건식산화공정을 통해 게이트산화막(2)을 증착하는 단계(도1a)와; 상기 게이트산화막(2)의 상부에 다결정실리콘(3)을 증착하는 단계(도1b)로 구성된다.1A and 1B are cross-sectional views illustrating a process of depositing a gate oxide film and a gate electrode in a conventional MOS transistor. As shown in FIG. 1A and FIG. 1B, a gate oxide film (eg, a wet oxidation or a dry oxidation process) is formed on a substrate 1. 2) depositing (FIG. 1A); And depositing polysilicon 3 on the gate oxide film 2 (FIG. 1B).

이와 같은 공정에서 게이트산화막(2)은 다결정실리콘(3)에 소정의 전압이 인가되면 그 하부의 기판에 채널을 형성하는 유전체로서의 역할을 하게 된다.In such a process, when a predetermined voltage is applied to the polysilicon 3, the gate oxide film 2 serves as a dielectric for forming a channel in the lower substrate.

이때, 어느 정도 강한 전압이 인가되어도, 게이트산화막(2)은 파괴되지 않아야 하며 기판에 불순물을 주입하여 소스 및 드레인을 형성하는 경우, 그 불순물이 게이트 측으로 확산되는 것을 방지하여야 한다.At this time, even if a strong voltage is applied to some extent, the gate oxide film 2 should not be destroyed, and when impurities are implanted into the substrate to form a source and a drain, the impurities must be prevented from diffusing to the gate side.

그러나, 상기한 바와 같이 종래의 반도체 산화막 형성방법은 특정 박막 또는 기판의 상부에 직접 산화막을 증착하여 그 산화막은 반도체 소자의 고집적화에 따라 80 ANGSTROM 이하의 두께를 갖게 되면 전기적인 특성이 열화되어 유전체로서의 사용이 불가능한 문제점과 아울러 전극에 인가되는 전압을 견디지 못하고 파괴되고, 불순물의 확산을 방지하지 못하게 되어 소자 형성시 그 특성이 저하되는 문제점이 있었다.However, as described above, in the conventional method of forming a semiconductor oxide film, an oxide film is directly deposited on a specific thin film or substrate, and when the oxide film has a thickness of 80 ANGSTROM or less according to high integration of semiconductor devices, electrical properties deteriorate and become a dielectric. In addition to the problem that it is impossible to use, it is not able to withstand the voltage applied to the electrode and is destroyed, and it is not possible to prevent the diffusion of impurities.

이와 같은 문제점을 감안한 본 발명은 80 ANGSTROM 이하의 두께를 갖는 산화막이 유전체로 사용가능하며, 인가되는 전압에 의해 파괴되지 않고, 불순물 이온의 확산을 방지할 수 있도록 하는 반도체 산화막 형성방법을 제공함에 그 목적이 있다.In view of the above problems, the present invention provides a method for forming a semiconductor oxide film in which an oxide film having a thickness of 80 ANGSTROM or less can be used as a dielectric material and is prevented from being broken by an applied voltage and preventing diffusion of impurity ions. There is a purpose.

도1a 및 도1b는 종래 모스 트랜지스터 제조공정에 있어서, 게이트 산화막과 다결정실리콘을 증착하는 과정을 보인 제조공정 수순단면도.1A and 1B are steps of a manufacturing process showing a process of depositing a gate oxide film and polysilicon in a conventional MOS transistor manufacturing process.

도2a 내지 도2d는 본 발명을 적용한 모스 트랜지스터 제조공정에 있어서, 게이트 산화막과 다결정실리콘을 증착하는 과정을 보인 제조공정 수순단면도.2A to 2D are cross-sectional views of a manufacturing process showing a process of depositing a gate oxide film and polysilicon in a MOS transistor manufacturing process to which the present invention is applied.

***도면의 주요 부분에 대한 부호의 설명****** Description of the symbols for the main parts of the drawings ***

1:기판 3:다결정실리콘1: Substrate 3: Polycrystalline silicon

4:버퍼산화막 5:이온주입층4: buffer oxide film 5: ion implantation layer

6:옥시나이트라이드막6: oxynitride film

상기와 같은 목적은 특정 박막 또는 기판의 상부에 버퍼산화막을 증착하고, 그 버퍼산화막 하부의 특정 박막 또는 기판에 질소이온을 주입하는 질소이온 주입단계와; 상기 버퍼산화막을 제거하고 상기 질소이온이 주입된 특정 박막 또는 기판의 상부에 열산화막을 증착하는 열산화막 증착단계로 구성함으로써 달성되는 것으로, 이와 같은 본 발명을 첨부한 도면을 참조하여 상세히 설명하면 다음과 같다.The above object is a nitrogen ion implantation step of depositing a buffer oxide film on a specific thin film or substrate, and injecting nitrogen ions into a specific thin film or substrate below the buffer oxide film; It is achieved by removing the buffer oxide film and forming a thermal oxide film deposition step of depositing a thermal oxide film on a specific thin film or substrate into which the nitrogen ions are implanted, which will be described in detail with reference to the accompanying drawings. Same as

도2a 내지 도2d는 본 발명을 적용한 모스 트랜지스터에서 게이트산화막과 게이트전극을 증착하는 과정을 보인 제조공정 수순단면도로서, 이에 도시한 바와 같이 기판(1)의 상부에 산화막(4)을 증착하고, 그 산화막(4)을 이온주입버퍼로 사용하여 상기 기판(1)에 질소이온을 이온주입하여 상기 산화막(4)과 기판(1)의 계면에 이온주입층(5)을 형성하는 단계(도2a)와; 상기 산화막(4)을 식각하여 상기 이온주입층(5)을 노출시키는 단계(도2b)와; 상기 이온주입층(5)을 산화하여 옥시나이트라이드막(6)을 형성하는 단계(도2c)와; 상기 옥시나이트라이드막(6)의 상부에 다결정실리콘(3)을 증착하는 단계(도2d)로 구성된다.2A to 2D are cross-sectional views of a manufacturing process illustrating a process of depositing a gate oxide film and a gate electrode in a MOS transistor to which the present invention is applied, and as illustrated therein, an oxide film 4 is deposited on an upper portion of the substrate 1. Ion implantation of nitrogen ions into the substrate 1 using the oxide film 4 as an ion implantation buffer to form an ion implantation layer 5 at the interface between the oxide film 4 and the substrate 1 (Fig. 2A). )Wow; Etching the oxide film 4 to expose the ion implantation layer 5 (FIG. 2B); Oxidizing the ion implantation layer 5 to form an oxynitride film 6 (FIG. 2C); And depositing polysilicon 3 on the oxynitride film 6 (FIG. 2D).

이와 같이 본 발명 반도체 산화막 특성의 개선방법은 산화막의 형성이전에 질소이온을 이온주입하여 유전성, 절연성 및 강도가 우수한 옥시나이트라이드막(6)을 형성하여 이를 산화막 대신 사용함으로써, 특성을 개선할 수 있다.As described above, in the method for improving the characteristics of the semiconductor oxide film of the present invention, by ion implantation of nitrogen ions prior to the formation of the oxide film, an oxynitride film 6 having excellent dielectric property, insulation property and strength is formed and used instead of the oxide film, thereby improving the properties. have.

이하, 상기와 같은 본 발명을 좀 더 상세히 설명한다.Hereinafter, the present invention as described above will be described in more detail.

먼저, 도2a에 도시한 바와 같이 필요한 산화막을 형성할 위치에 이온주입의 버퍼로써 작용할 산화막(4)을 200 ANGSTROM 정도의 두께로 증착한다.First, as shown in Fig. 2A, an oxide film 4 to serve as a buffer for ion implantation is deposited to a thickness of about 200 ANGSTROM at a position where a required oxide film is to be formed.

그 다음, 도2b에 도시한 바와 같이 상기 산화막(4)을 버퍼로 사용하는 이온주입공정으로 질소이온을 이온주입하여 상기 산화막(4)의 하부 기판(1)에 이온주입층(5)을 형성한다. 이때, 질소이온의 이온주입은 20~30KeV의 에너지를 사용하며, 그 농도는 5×1013내지 5×1014의 농도로 이온주입한다. 상기의 농도로 질소이온을 이온주입하면 그 상부에 산화막을 증착하는 경우에 산화율이 20~30%정도 감소하게 되며, 균일도가 향상된다.Next, as shown in FIG. 2B, nitrogen ions are implanted in an ion implantation process using the oxide film 4 as a buffer to form an ion implantation layer 5 on the lower substrate 1 of the oxide film 4. do. At this time, ion implantation of nitrogen ions uses energy of 20 to 30 KeV, and the concentration is ion implanted at a concentration of 5 × 10 13 to 5 × 10 14 . When ion implantation of nitrogen ions at the above concentration, the oxidation rate is reduced by 20 to 30% when the oxide film is deposited thereon, and the uniformity is improved.

그 다음, 도2c에 도시한 바와 같이 상기 질소 이온주입층(5)의 상부에 산화막을 증착한다. 이때의 산화막은 열산화막이며 이는 상기 질소 이온주입층(5)과 반응하여 옥시나이트라이드막(6)을 형성하게 된다.Then, an oxide film is deposited on top of the nitrogen ion implantation layer 5 as shown in FIG. 2C. At this time, the oxide film is a thermal oxide film, which reacts with the nitrogen ion implantation layer 5 to form the oxynitride film 6.

그 다음, 도2c에 도시한 바와 같이 다결정실리콘(3)을 증착하는 등의 후속공정을 진행한다.Then, as shown in FIG. 2C, a subsequent process such as depositing the polysilicon 3 is performed.

이와 같은 옥시나이트라이드막(6)은 불순물의 확산을 차단하는 성질이 우수하고, 강도가 높아 파괴되기 어려우며, 유전체로서의 성질도 우수하다.Such an oxynitride film 6 is excellent in blocking the diffusion of impurities, high in strength, difficult to break, and excellent in dielectric properties.

상기한 바와 같이 본 발명은 산화막의 증착 전에 질소이온을 산화막이 증착될 부분에 이온주입하고, 그 상부에 산화막을 증착하여 유전체로서의 특성과 절연파괴강도를 증가시키고, 불순물 이온이 게이트전극 등의 산화막 상부에 형성되는 막으로 확산되는 것을 방지하는 효과가 증대되어 80 ANGSTROM 이하의 산화막을 사용할 수 있게 됨으로써, 전체적으로 반도체 소자의 집적도를 향상시키고 그 특성 또한 향상시키는 효과가 있다.As described above, in the present invention, ion implantation of nitrogen ions into the portion where the oxide film is to be deposited prior to deposition of the oxide film, and deposition of an oxide film thereon increases the characteristics as dielectric and the dielectric breakdown strength, and impurity ions are oxide films such as gate electrodes Since the effect of preventing diffusion into the film formed on the upper side is increased, an oxide film of 80 ANGSTROM or less can be used, thereby improving the integration degree of the semiconductor device as a whole and improving its characteristics.

Claims (3)

기판의 상부에 버퍼산화막을 증착하고, 그 버퍼산화막과 기판의 계면영역에 질소이온을 주입하여 질소이온주입층을 형성하는 질소이온 주입단계와; 상기 버퍼산화막을 제거하여 상기 질소이온주입층의 상부를 노출시키는 단계와; 상기 노출된 질소이온주입층을 산화시켜 옥시나이트라이드막을 형성하고 이를 게이트산화막으로 사용하는 단계로 이루어진 것을 특징으로 하는 반도체 산화막 형성방법.Depositing a buffer oxide film on the substrate, and injecting nitrogen ions into the interface between the buffer oxide film and the substrate to form a nitrogen ion injection layer; Removing the buffer oxide film to expose an upper portion of the nitrogen ion injection layer; Oxidizing the exposed nitrogen ion implantation layer to form an oxynitride film and using the same as a gate oxide film. 제 1항에 있어서, 상기 질소이온 주입단계에서 사용하는 버퍼산화막은 200 ANGSTROM 의 두께로 증착하는 것을 특징으로 하는 반도체 산화막 형성방법.The method of claim 1, wherein the buffer oxide film used in the nitrogen ion implantation step is deposited to a thickness of 200 ANGSTROM. 제 1항에 있어서, 상기 질소이온 주입단계에서 질소이온은 20~30KeV의 에너지로, 5×1013내지 5×1014의 농도가 되도록 주입하는 것을 특징으로 하는 반도체 산화막 형성방법.The method of claim 1, wherein in the nitrogen ion implantation step, nitrogen ions are implanted at a concentration of 5 × 10 13 to 5 × 10 14 with energy of 20 to 30 KeV.
KR1019970057035A 1997-10-31 1997-10-31 Method for fabricating semiconductor oxide KR100266635B1 (en)

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