JPH06133549A - Semiconductor device - Google Patents

Abstract

PURPOSE:To facilitate patterning for suppressing a noise while reducing the number of components. CONSTITUTION:A rectifying diode 24 and an error amplifier 32 are packaged 33 together. Consequently, the rectifying diode 24 and the error amplifier 32 can be arranged, as one component, closely to ' other components while reducing the number of components and patterning for noise suppression can be facilitated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device comprising a rectifying element and an error amplifier which are integrated and packaged in one package, and are used in a switching power supply or the like.

[0002]

2. Description of the Related Art As an example of a conventional switching power supply using a rectifying element and an error amplifier, a configuration of a primary side regenerative control type switching power supply is shown in FIG. In FIG. 3, 1 is a power supply voltage input terminal, 2 is a transformer, 3 is a primary winding of the transformer 2, 4 is a bias winding of the transformer 2, 5 is a field effect transistor which is a switching element, and 6 is a field effect transistor. 5 is a body diode which is parasitically incorporated in the device 5.

Reference numeral 7 controls the on-period in which a current flows through the field-effect transistor 5, turns on the field-effect transistor 5 during the on-state, and turns off the field-effect transistor 5 in the bias winding 4. This is a control circuit in which the off operation is continued until the polarity of the induced voltage is inverted, and oscillation is continued by repeating this on / off.

Reference numeral 8 is a bias winding of the transformer 2, reference numeral 9 is an energy regeneration capacitor consisting of an electrolytic capacitor, and 10
Is a field effect transistor that turns on and off in reverse phase to the field effect transistor 5, and 11 is a body diode parasitically built in the field effect transistor 10. Reference numeral 12 turns on the field effect transistor 10 for a predetermined on period, and turns off the field effect transistor 10 until the polarity of the induced voltage of the bias winding 8 is reversed.・ Synchronous oscillation circuit that keeps oscillating by repeatedly turning off.

Reference numeral 13 is a power supply voltage output terminal, 14 is a secondary winding of the transformer 2, 15 is a rectifying diode, and 16 is a smoothing capacitor for smoothing the induced voltage of the secondary winding 14 rectified by the rectifying diode 15. (Consisting of electrolytic capacitors)
Is. 17 is a power supply voltage output terminal 13 and a ground terminal 30
An error amplifier for detecting a voltage between the voltage and a predetermined internal reference voltage, and 18 transmitting error information of the power supply voltage detected by the error amplifier 17 to the control circuit 7 on the primary side of the transformer 2. A photo coupler 31 is a resistor for limiting current.

The operation will be described with reference to FIG.
U In FIG. 4, (a) shows the drive pulse voltage of the control circuit 7.
Pressure waveform V_GS1 , T_ONIndicates ON period, T_OFFIs
It shows the off period. (B) is a field effect transistor
Waveform I_D1Shows drain to source
The direction of flow to is positive. (C) is a synchronous oscillation circuit 1
2 drive pulse voltage waveform V_GS2 Is shown. (D) is
Current waveform I flowing through the field effect transistor 10_D2Shows
However, the direction of flow from the source to the drain is positive.
The dotted line is T_ONEnergy stored in transformer 2 during the period
Is current I _D2Shows the current waveform when flowing as
As shown in (e), the secondary current I_SAs of transformer 2
When energy is released, the current I_D2Is the current I_Sof
It shows that the waveform becomes a solid line by decreasing by the amount.
(E) is 2 which flows through the secondary winding 14 of the transformer 2 described above.
Next current I_SIs shown.

A magnetic flux is generated in the transformer 2 by the primary current flowing through the primary winding 3 of the transformer 2 during the ON period of the field effect transistor 5 operating in the ON period determined by the control circuit 7, and energy is accumulated. To be done. At this time, an induced voltage is generated in the primary winding 3 of the transformer 2, but the voltage is applied in a direction in which the body diode 11 of the field effect transistor 10 is reversely biased, and the bias winding 8 is applied. The synchronous oscillation circuit 12 turns off the field effect transistor 10 by the induced voltage generated.

At the same time, an induced voltage is also generated in the secondary winding 14 of the transformer 2 in the direction of reverse biasing the rectifying diode 15, so that no secondary current flows at this time. OFF signal of control circuit 7, that is, V _GS1 = 0V in FIG.
When the field effect transistor 5 is turned off at, a flyback voltage is generated in the primary winding 3 of the transformer 2 and at the same time a flyback voltage is generated in the secondary winding 14 of the transformer 2, and the rectifying diode 15 is turned on. Since the voltage is applied in the forward biasing direction, the energy stored in the transformer 2 is released as a secondary current through the secondary winding 14 as shown in FIG. 4 (e), and is smoothed by the smoothing capacitor 16. It is supplied to the load from the power supply voltage output terminal 13.

At this time, due to the flyback voltage generated in the primary side bias winding 8 of the transformer 2, the synchronous oscillation circuit 12 has V _GS2 = 15V as shown in FIG. 4C.
Since the field effect transistor 10 is turned on,
A primary current flows through the transformer 2, and energy is stored in the energy regeneration capacitor 9. At this time, all the energy accumulated in the transformer 2 by the current I _D1 during the T _ON period is _consumed by the energy regeneration capacitor 9 during the T _OFF period.
Returning to this, the current I _D2 has a dotted waveform as shown in FIG. 4D, but the energy accumulated in the transformer 2 is also discharged to the secondary side as a secondary current I _S , so I
_{D2 is} reduced by the amount of the current I _S , and has a waveform indicated by the solid line in FIG.

When all the energy stored in the transformer 2 is released and the primary current of the transformer 2 becomes zero, the voltage across the energy regenerating capacitor 9 passes through the transformer 2 via the field effect transistor 10 which is already turned on.
Since it is applied to the primary winding 3 of the above, a current flows in the opposite direction from the energy recovery capacitor 9, and a magnetic flux in the opposite direction is generated in the transformer 2 to accumulate energy. In this state, since the polarity of the induced voltage generated in each winding of the transformer 2 does not change, the flyback voltage of the bias winding 4 does not change, and the control circuit 7 keeps the field effect transistor 5 off.

The synchronous oscillation circuit 12 turns on the field effect transistor 10 for a predetermined period and then turns it off, that is, sets V _GS2 = 0V in FIG. 4 (c). When the field effect transistor 10 is turned off, the induced voltage generated in each winding of the transformer 2 reverses its polarity, and the induced voltage generated in the secondary winding 14 of the transformer 2 reverse-biases the rectifying diode 15. The secondary current of the transformer 2 stops flowing.

The induced voltage generated in the primary winding 3 of the transformer 2 is generated in such a direction that the connection end of the field effect transistor 5 is negative voltage and the connection end of the power supply voltage input terminal 1 is positive voltage. , The primary current of the transformer 2 flows in a direction of charging a smoothing capacitor (not shown) of the power supply voltage 1 via the body diode 6, and the transformer 2 is turned off during the off period.
The energy stored in is regenerated into the power supply of the power supply voltage input terminal 1. At this time, the induced voltage generated in the bias winding 4 is also inverted, so that the control circuit 7 turns on the field effect transistor 5.

All the energy accumulated in the transformer 2 is released during the off period of the field effect transistor 5,
When the primary current of the transformer 2 becomes zero, the primary current of the transformer 2 flows so as to discharge from the power supply voltage input terminal 1 in the opposite direction through the field effect transistor 5 which is already on. As a result, magnetic flux is generated in the transformer 2 and energy is accumulated. In this state, the polarity of the induced voltage generated in each winding of the transformer 2 does not change, and the control circuit 7 keeps the field effect transistor 5 in the ON state.

When the field effect transistor 5 is turned off during the ON period determined by the control circuit 7, that is, when V _GS1 = 0 V in FIG. 4A, the energy stored in the transformer 2 passes through the secondary winding 14. Is discharged as a secondary current. By repeating these operations, the power supply voltage output terminal 1
The power supply voltage is continuously supplied from 3 to the load. further,
The operation of stably controlling the output voltage will be described. The error amplifier 17 has a built-in reference voltage. When the power supply voltage of the power supply voltage output terminal 13 becomes lower than the reference voltage, the current flowing through the light emitting diode of the photocoupler 18 decreases, the base current of the light receiving side transistor decreases, and the collector current decreases. Also decreases. When the collector current decreases, the control circuit 7 extends the ON period of the field effect transistor 5 to increase the current flowing through the field effect transistor 5 and increase the energy stored in the transformer 2 per unit time.

At this time, the current flowing through the secondary winding also increases, energy is accumulated in the smoothing capacitor 16, and the power supply voltage output from the power supply voltage output terminal 13 rises. When the power supply voltage of the power supply voltage output terminal 13 becomes higher than the reference voltage of the error amplifier 17, the power supply voltage of the power supply voltage output terminal 13 is decreased by the operation completely opposite to the above. Even if the load connected to the power supply voltage output terminal 13 changes in this way,
The power supply voltage is controlled so that it is always constant.

[0016]

However, in the above configuration, the rectifying diode 15, the error amplifier 17, and the photocoupler 18 are arranged so that the voltage error information fed back from the secondary side to the primary side of the transformer 2 does not have noise. However, there is a problem in that it is difficult to configure the pattern because it may be necessary to add a noise removing capacitor or to make them close to each other on the pattern.

An object of the present invention is to provide a semiconductor device capable of reducing the number of parts and facilitating a pattern configuration for reducing the influence of noise.

[0018]

The semiconductor device of the present invention is characterized in that the rectifying element and the error amplifier are contained in one package.

[0019]

According to the structure of the present invention, the rectifying element and the error amplifier are integrated into one part, the number of parts is reduced, and the rectifying element and the error amplifier are brought close to each other, so that they are brought close to other parts. This facilitates pattern construction for reducing noise.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a circuit diagram showing a configuration of a primary-side regenerative control type switching power supply configured to include the semiconductor device of the embodiment of the present invention. In FIG. 2, reference numeral 15
And reference numeral 17, except for reference numerals 1 to 18, reference numerals 30 and 3
Each component up to 1 is the same as the conventional example shown in FIG. Reference numeral 19 denotes a rectifying device according to the embodiment of the present invention, in which a rectifying diode and an error amplifier corresponding to the rectifying diode 15 and the error amplifier 17 shown in FIG. 3 are contained in one package (not shown). .

FIG. 1 is an equivalent circuit diagram of the semiconductor device of FIG. 2 (semiconductor device of the embodiment of the present invention). In FIG.
Reference numeral 24 is a rectifying diode (rectifying element). 25 is a transistor, 26 is a Zener diode, 27 to 2
Reference numeral 9 is a resistor, and the transistor 25, the Zener diode 26, and the resistors 27 to 29 form an error amplifier 32. Reference numeral 32 is a package that integrally houses the rectifying diode 24 and the error amplifier 32.

The error amplifier 32 includes a detecting means for detecting the voltage rectified by the rectifying element, a comparing means for comparing the voltage rectified by the rectifying element with a specific reference voltage,
The comparator 27 is composed of an output means for outputting the comparison information, but the resistors 27 and 28 in the circuit of FIG. 1 constitute a detecting means for detecting the voltage rectified by the rectifying element, and the zener diode 27 and the resistor 29. Constitutes a means for producing a specific reference voltage, and the transistor 25 serves both as a comparing means for comparing the voltage rectified by the rectifying element with a specific reference voltage and an output means for outputting comparison information by the comparing means.

Reference numerals 20 to 23 denote terminals of the semiconductor device 19, 20 denotes an anode terminal of the rectifying diode 24, 2
Reference numeral 1 is a cathode terminal of the rectifying diode 24, 22 is an output terminal of the error amplifier 32, and 23 is a ground terminal.
The semiconductor device may be a hybrid IC or a monolithic IC.

The operation of the switching power supply having the semiconductor device 19 of this embodiment is different from that of the conventional example even when the rectifying diode 24 and the error amplifier 32 are contained in one package 33 as described above. It will be performed without any change. That is, the circuit operation is exactly the same as the conventional example. According to this embodiment, the rectifying diode 24 and the error amplifier 32 are combined into one package 3.
Since it is stored in 3, the rectifying diode 24 and the error amplifier 3
2 can be a single component to reduce the number of components, and the rectifying diode 24 and the error amplifier 3
2 becomes close to each other, so that it becomes easy to bring them closer to another component, for example, a photocoupler, and a pattern configuration for reducing noise can be easily realized.

Moreover, because of the above configuration, the operation of the switching power supply is not changed at all, and the cost can be reduced by reducing the number of parts.

[0026]

According to the semiconductor device of the present invention, since the rectifying element and the error amplifier are housed in one package, the rectifying element and the error amplifier are made into one part, and the number of parts can be reduced. At the same time, the rectifying element and the error amplifier come close to each other, which makes it easy to bring them close to other parts, and a pattern configuration for reducing noise can be easily realized. Moreover, cost reduction can be achieved by reducing the number of parts.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a switching power supply including a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of a conventional example of a switching power supply.

FIG. 4 is a waveform diagram showing operation waveforms of respective parts of the switching power supply of FIG.

[Explanation of symbols]

 19 Semiconductor Device 20 Anode Terminal 21 Cathode Terminal 22 Output Terminal 23 Ground Terminal 24 Rectifying Diode (Rectifying Element) 25 Transistor 26 Zener Diode 27-29 Resistor 32 Error Amplifier 33 Package

Claims (1)

[Claims] 1. A rectifying element, a detecting means for detecting a voltage rectified by the rectifying element, a comparing means for comparing the voltage with a specific reference voltage, and an outputting means for outputting comparison information by the comparing means. A semiconductor device, comprising: an error amplifier including the rectifying element and the error amplifier in a single package.