JPH06133382A - Cross connector - Google Patents

Abstract

PURPOSE:To provide the cross connector having a function replacing a routing header with part of destination information of a high-order group signal for selection, in which buffer memory for frame phase synchronization is not required with less transmission delay. CONSTITUTION:A high-order group signal includes a pointer representing a head position of a low-order group signal, at least two low-order group signals are multiplexed on the high-order group signal, a pulse synchronously with the high-order group signal is generated, and the pulse is used to allow.a frame phase synchronization circuit 3 to phase-lock to the high-order group signal of each transmission line and a header addition section 6 replaces frame synchronization with destination information and a switching module 7 is selected in response to the destination information and a control section 10 discriminates corrects switching based on the destination information from the header elimination section 8 and replaces the destination information with the frame synchronizing signal to generate the high-order group signal, and it is outputted to each transmission line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cross connect device for switching transmission lines of multiplexed digital signals.

[0002]

2. Description of the Related Art A cross-connect is a line connected to an exchange in a station, a dedicated line not connected to the exchange, or a line that is connected to an exchange in a switch, or goes through to another station. It is a line setting function that selects lines and connects to each route. Conventionally, connections were manually connected and switched on a distribution rack one by one, but nowadays, due to improvements in semiconductor device technology, it is now possible to electronically switch and connect lines, so line settings are made. It can be automated.

Further, automation of line setting has enabled remote line testing by a direct line access function, time lease of a dedicated line by software for line setting control, and customer control by which a user directly controls a cross-connect device. Under the customer control, the user can set / change the capacity of the digital leased line, set / change the route, and reserve / set / change the use time.

A conventional cross-connect device will be described. FIG. 3 is a block diagram showing a configuration example of a conventional cross-connect device. In FIG. 3, the signal input from the transmission line 1 is a high-order group digital signal. The high-order group signal input from the transmission line 1 is terminated at the transmission line termination 15. At the transmission line terminal 15, the high-order group signal is phase-synchronized, the transmission line is monitored based on the error correction information and the phase information contained in the high-order group signal, and the destination information is added to the high-order group signal. The terminated high-order group signal is input to the line setting unit 16.

The line setting unit 16 extracts the destination information, transmits it to the terminal station control unit 17, receives the control signal generated based on the destination information in the terminal station control unit 17, and receives the route distribution, drop / connect line. Perform separation and switch lines. After this, the destination information is removed from the higher order group signal. The high-order group signal for which the line is set is input to the line termination 18, the high-order group signal is separated into the low-order group signal, and the terminal station control unit is based on the information included in the low-order group signal.
The control from 17 performs processing such as lease of leased line and user's line setting control, and line monitoring such as error detection. The line-terminated low-order group signal is connected to the digital exchange 19 and the leased line 20.

The low-order group signals input from the digital exchange 19 and the leased line 20 are terminated at the line termination 18. At the line termination 18, line monitoring is performed based on error correction information and phase information contained in the low-order group signal, and multiple low-order group signals are multiplexed to generate a high-order group signal. The destination information sent is added to the higher-order group signal. The line-terminated high-order group signal is input to the line setting unit 16, the destination information is extracted from the high-order group signal and transmitted to the terminal station control unit 17, and the terminal station control unit 17 sets the control signal based on the information of the destination information. Transmission to the unit 16 performs line convergence, drop / connect line separation, etc. to switch lines.

After this, the destination information is removed from the higher order group signal. The high-order group signal whose line is set in the line setting unit 16 is input to the transmission line terminal 15, and the transmission line is monitored based on the error correction information and the phase information contained in the high-order group signal, and is connected to the transmission line 1.

[0008]

However, in the above-described conventional cross-connect device, when the high-order group signal is a frame, the destination information is newly added to or removed from the frame, so that the amount of information to be processed is small. Changed, had to change the frequency of the clock. Especially when the frame length is long, a buffer memory for phase synchronization of the frame is required and the circuit scale increases.
There is a problem that a delay occurs due to the buffer memory.

The present invention solves the above-mentioned drawbacks of the prior art, multiplexes at least two frames into one frame by using a pointer, and phase-synchronizes the frames of at least two transmission lines with a frame pulse synchronized with the multiplexed frame. It is an object of the present invention to provide a cross-connect device having a function of switching lines without changing the frame length by replacing the destination information with a part of the frame.

[0010]

In order to achieve this object, a cross-connect device of the present invention includes a pointer for indicating the head position of a low-order group signal in a high-order group signal, and at least two low-order group signals are arranged in the high-order group signal. And a pulse which is synchronized with the high-order group signal is generated, the high-order group signals of at least two transmission lines are phase-synchronized by using the pulse, and then a part of the high-order group signal is replaced with destination information to switch the transmission line. have.

[0011]

With this structure, a buffer memory for phase synchronization becomes unnecessary, and a cross-connect device with a small transmission delay can be realized.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a cross-connect device according to an embodiment of the present invention, showing a cross-connect device having two inputs of a transmission line 1. FIG. 2 is a block diagram of the same frame phase synchronization circuit.

In FIG. 1, a digital signal transmitted through transmission lines T ₁ and T ₂ is a high-order group signal composed of multiplexed periodic digital signals, the beginning of one period (hereinafter referred to as a frame). A part (hereinafter referred to as "overhead") of the error information includes error correction information and phase information. The high-order group signal used here is a STM 1 (hereinafter abbreviated as STM; refer to JT-G707, JT-G708, JT-G709 of the Telegraph and Telephone Technical Committee). STM-
An STM-4 (hereinafter abbreviated as STM-4) frame in which four frames are multiplexed,
The transmission rate is 622.08 Mbps.

The STM-4 frames on the transmission lines T ₁ and T ₂ are input to the transmission line termination R2. At the transmission path termination R2, frame synchronization pulses A1 and A2 bytes are detected from the section overhead (hereinafter abbreviated as SOH) of the STM-4 frame to establish synchronization, and STM-4 is used.
The frame is divided into four STM-1 frames and each ST
An error in the M-1 frame is detected, and each STM-
The overhead of one frame is removed to form a buoy sea 4 (hereinafter abbreviated as VC4) frame which is a low-order group signal.

Further, a 19.44 MHz clock synchronized with the VC4 frame is extracted from the transmission line T ₁ . Here, the four separated STM-1 frames are STM-1 # 1 to # 4 according to the order of separation, and the VC4 frame with the overhead removed from the STM-1 frame corresponds to each STM-1 frame. Then VC4 # 1 to # 4
And

19.44M output from the transmission line termination R2
The Hz clock is input to the clock recovery circuit 4. The clock regeneration circuit 4 regenerates a 622.08 MHz clock synchronized with the STM-4 based on the input 19.44 MHz clock. The 622.08 MHz clock output from the clock recovery circuit 4 is input to the FP generation circuit 5. The FP generation circuit 5 divides the 622.08 MHz clock to generate an STM-1 frame pulse.

The four VC4 frames of each transmission line that output the transmission line termination R2 are input to the frame phase synchronizing circuit 3. In the frame phase synchronization circuit 3, as shown in FIG.
The data processing unit 12 generates a VC4 frame pulse from the VC4 data, and the pointer processing unit 13 detects the phase difference between the VC4 frame pulse and the STM-1 frame pulse input from the FP generation circuit 5 to detect VC4 in the STM-1 frame.
A pointer indicating the start position of the frame is generated. The generated pointer is multiplexed in the STM-1 frame with the VC4 frame output from the data processing unit 12 in the multiplexing processing unit 14. Therefore, by making the same frame pulse input to the pointer processing unit 13, the phases of the STM-1 frames can be made to coincide with each other, and the switch module 7 in the subsequent stage can synchronously switch between different transmission paths.

The four STM-1 frames of each transmission line output from the frame phase synchronizing circuit 3 are input to the header adding section 6. The header addition unit 6 replaces the frame synchronization byte A1 at the head of the STM-1 # 1 frame with 1-byte destination information (hereinafter referred to as a routing header) input from the control unit 10. Here, the routing header is input from the computer 11 that communicates with the control unit 10, and has a 1-byte length of 0.
Take a value of ~ 3F ₍₁₆₎ . After that, the four STM-1 frames are multiplexed into the STM-4 frame in the order of STM-1 # 1 to # 4. Therefore, the routing header is STM
-4 at the beginning of the frame.

The S of each transmission line output from the header addition unit 6
The TM-4 frame is input to the switch module 7.
Here, a batcher-banyan type is used as the switch module 7. The batcher-banyan type switch module is configured by combining switches that switch between 0 and 1, and compares the values of the routing header values of the frames of the respective transmission lines and rearranges them in descending order, and then sets each bit of the routing header to 0. , 1, the transmission frames do not collide in the switch module.

The STM-4 frame of each transmission line output from the switch module 7 is input to the header removing unit 8 and ST
After the M-4 frame is separated into four STM-1 frames, the routing header is detected based on the control signal input from the control unit 10 and is properly switched as compared with the routing header of the header adding unit 6. Is judged,
The result is displayed on the computer. Here, the control signal is input from the computer 11 that communicates with the control unit 10. The routing header at the beginning of the first STM-1 frame is A1.
In addition to replacing bytes, the overhead is removed from each STM-1 frame to produce a VC4 frame.

Each STM-1 frame output from the header removing unit 8 is input to the transmission line terminal T9 in order to be multiplexed into the STM-4 frame again, and data is output at the timing of the frame pulse output from the header adding unit 6. STM without parts
-1 frame is generated, and each VC4 frame is multiplexed in the data part thereof to generate each STM-1 frame, and four STM-1 frames are converted into STM-1 # 1 to # 4.
In this order, STM-4 frames are multiplexed. Transmission line termination T9
The STM-4 frame of each transmission path output from
Is output to.

As described above, according to this embodiment, the high-order group signal includes the pointer indicating the head position of the low-order group signal, and at least two low-order group signals are multiplexed with the high-order group signal and synchronized with the high-order group signal. A buffer memory for phase synchronization is unnecessary by generating a pulse, phase-locking the high-order group signals of at least two transmission lines using the pulse, and then replacing part of the high-order group signal with the destination information to switch the transmission line. Therefore, it is possible to realize a cross-connect device with less transmission delay.

[0023]

As described above, according to the cross-connect device of the present invention, the amount of information is made constant by replacing a part of the overhead with the routing header, and the frames of at least two transmission lines have the same frame pulse. Since the clock frequency does not fluctuate due to the addition of the routing header to the frame unlike the conventional cross-connect device, the cross-connect device can be operated stably and multiple transmissions can be performed. Since the road frames are synchronized, it is possible to realize a cross-connect device that does not require unnecessary delay of a large capacity buffer memory.

[Brief description of drawings]

FIG. 1 is a block diagram of a cross-connect device according to an embodiment of the present invention.

FIG. 2 is a block diagram of the same frame phase synchronization circuit.

FIG. 3 is a block diagram of a synchronous multiplexing converter including a conventional cross-connect device.

[Explanation of symbols]

 1 Transmission Line 2 Transmission Line Termination R 3 Frame Phase Synchronization Circuit 4 Clock Recovery Circuit 5 FP Generation Circuit 6 Header Addition Section 7 Switch Module 8 Header Removal Section 9 Transmission Path Termination T 10 Control Section 11 Computer 12 Data Processing Section 13 Pointer Processing Section 14 Multiplexing processing unit

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Ryozo Kishimoto 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo Inside Nippon Telegraph and Telephone Corporation (72) Inventor Yasuyuki Okumura 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo No. Japan Telegraph and Telephone Corporation

Claims (1)

[Claims] 1. A high-order group signal includes a pointer indicating the head position of a low-order group signal, at least two low-order group signals are multiplexed with the high-order group signal, and a pulse synchronized with the high-order group signal is generated to generate the pulse. A cross-connect device, characterized in that the high-order group signals of all transmission lines are phase-synchronized with each other, and then part of the high-order group signals is replaced with destination information to switch the transmission lines.