JPH06132413A - Semiconductor package - Google Patents

Abstract

PURPOSE:To eliminate a leak due to the difference between an internal pressure and an external pressure in a sealing operation and to achieve the reliability of the sealing operation by a method wherein, in the sealing operation using a sealing material composed of an Au-Sn eutectic alloy, the wettability of the sealing material is improved and a ring-shaped preform is used for the sealing operation. CONSTITUTION:A semiconductor package is formed in such a way that a cap 2 and a chip carrier substrate 1 are sealed with a ring-shaped sealing material (a ring preform) 4 in which a cutout 3 or a stepped part has been formed. Since an internal gas is removed from the cutout or the stepped part, it is possible to prevent a leak defect even when an internal pressure is exerted in a sealing operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package, and more particularly, to a sealing technique effective when sealing is performed using a ring-shaped sealing material having poor wettability, such as Au-Sn eutectic alloy.

[0002]

2. Description of the Related Art One of the methods for hermetically sealing a semiconductor package is a flow-sealing method using Pb-Sn solder. As an alternative method, an Au-Sn eutectic alloy (for example, Au-20Sn composition is used. The sealing method using the sealing material consisting of An example of the method is to bond a cap and a microchip carrier (MCC) base at a sealing temperature of 300 to 350 ° C., which is lower than that of glass sealing, and has excellent mass productivity and relatively low material cost. Become.

[0003]

However, the encapsulation using the Au-Sn eutectic alloy encapsulant has a drawback that the encapsulant has poor wettability. Therefore, in the flow-in sealing as described above, in the case of Au-Sn solder or the like having poor wettability, it is necessary to seal with a ring-shaped preform (ring preform). There is a problem that leakage occurs due to the difference in external pressure.
That is, the reliability of the sealing may be lacking, such as the occurrence of a weakly sealed portion. It is an object of the present invention to eliminate the drawbacks of the prior art, prevent leak defects, and ensure the reliability of sealing. The above and other objects and novel features of the present invention will be apparent from the description of the present specification and the accompanying drawings.

[0004]

The outline of the representative ones of the inventions disclosed in the present application will be briefly described as follows. The ring preform of the present invention is provided with a notch or a step so as to remove a part of the preform so that gas can escape from the part when sealing.

[0005]

In the conventional ring preform having no cuts or steps, a leak failure occurs due to the difference between the internal pressure and the external pressure when the ring is sealed. Since the gas is allowed to escape from the portion when the step is provided and sealing is performed, a leak defect can be prevented even if internal pressure is applied during sealing.

[0006]

Embodiments of the present invention will be described below with reference to the drawings. Example 1. FIG. 1 shows an embodiment of the present invention. A ring preform 4 having a notch 3 is placed between the MCC substrate 1 and the cap 2, and the MCC substrate 1 and the cap 2 are passed through a furnace body set to a temperature equal to or higher than the melting point of the preform.
Is sealed. At this time, since the internal gas escapes from the cut portion 3 of the preform 4 and is then sealed, a leak failure can be prevented even if internal pressure is applied during sealing. In FIG. 1, 5 is a preliminary solder.
The MCC substrate 1 comprises an MCC base 6 and a chip 7. The chip 7 is made of, for example, a silicon single crystal substrate, has a large number of circuit elements formed therein by a well-known technique, and is given one circuit function. A specific example of the circuit element includes, for example, a MOS transistor, and these circuit elements form a circuit function of a logic circuit and a memory, for example.

Example 2. The embodiment shown in FIG. 2 shows an example in which a wire-shaped ring preform 9 having a circular cross section and having a cut 8 is used instead of the flat plate-shaped ring preform 4 of FIG. Also in this case, it is possible to prevent the leak failure.

Embodiment 3. FIG. 3 shows that instead of the notch,
An example of using a ring preform in which a step is provided on a part of the preform is shown. What is shown in FIG. 3 (A) is an embodiment of a ring preform 11 having a step 10 cut on one side of the ring, and what is shown in FIG. 3 (B) is
An example of a ring preform 13 having raised steps 12 and 12 on two sides of the ring is shown.

Example 4. The embodiment shown in FIG. 4 shows an ordinary thin ring preform 14 as shown in FIG. 4A and the ring preform 4 with the notch 3 shown in Embodiment 1 in FIG. 4B. An example of overlapping is shown below. By doing so, the reliability of the sealing is further increased.

FIG. 5A is an external view of the semiconductor package after assembly. FIG. 5 (B) is an external view of the main part of the MCC substrate 1, in which reference numeral 15 is a lead. Although the invention made by the inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments,
It goes without saying that various changes can be made without departing from the spirit of the invention. For example, in the above-described embodiment, an example in which the ring preform is installed between the MCC substrate and the cap has been shown, but the ring preform may be vapor-deposited on the cap or the like, or pre-solder may be attached to seal the ring preform. Good. In the above description, the case where the invention made by the present inventor is mainly applied to the MCC semiconductor package which is the field of application which is the background has been described, but the invention is not limited to this, and a semiconductor using another sealing solder. It can also be applied to packages.

[0011]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. According to the present invention, it is possible to prevent leakage failure during sealing and ensure sealing reliability. The present invention is effective for sealing using solder having poor wettability such as AuSn eutectic alloy.

[Brief description of drawings]

FIG. 1 is a perspective view of an assembled structure showing an embodiment of the present invention,

FIG. 2 is a perspective view of a ring preform showing another embodiment of the present invention,

3 (A) and 3 (B) are perspective views of a ring preform with steps, showing still another embodiment of the present invention.

FIG. 4 (A) is a configuration diagram before the ring preform has two layers, and FIG. 4 (B) is a configuration diagram in which the ring preform has two layers.

5A is an external view of a semiconductor package, FIG. 5B is a configuration diagram of a main part of an MCC substrate,

[Explanation of sign]

 1 ... MCC base 2 ... Cap 3 ... Notch 4 ... Ring preform 5 ... Pre-solder 6 ... MCC base 7 ... Chip 8 ... Notch 9 ... Wire Ring preform 10 ... Step 11 ... Ring preform 12 ... Step 13 ... Ring preform 14 ... Ring preform 15 ... Lead

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Hiroshi Kikuchi 2326 Imai, Ome City, Tokyo Metropolitan Area, Hitachi Device Development Center (72) Inventor Toshihiko Sato 2326 Imai, Ome City, Tokyo Hitachi Device Development Center Within

Claims (2)

[Claims] 1. A semiconductor package characterized in that a cap and a chip carrier base are sealed with a ring-shaped sealing material having cuts or steps. 2. A semiconductor device characterized in that a cap and a chip carrier substrate are sealed by stacking a ring-shaped sealing material having cuts or steps and a flat ring-shaped sealing material on top of each other. package.