JPH06132369A - Burn-in test method of bare chip ic - Google Patents

Abstract

PURPOSE:To enable a bare chip IC to be subjected to a required burn-in test (accelerated test) by a method wherein the base chip IC is arranged so as to be electrically connected through the intermediary of conductive micro balls, and the conductive micro balls are removed by melting adhesive resin after a required burn-in test is finished. CONSTITUTION:Electrode pads 1a are provided onto a test board 1 corresponding to electrode pads 3a formed on a bare chip IC 3, and adhesive resin 2 is selectively deposited on the electrode pads 1a to hold conductive micro balls 4. The test bare chip IC 3 is arranged so as to be electrically connected to the test board 1 through the intermediary of the conductive micro balls 4, and the conductive micro balls 4 are removed by melting the adhesive resin 2 after a required burn-in test (accelerated test) is finished. By this setup, a test bare chip IC is easily subjected to an accelerated life test.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a burn-in test method for bare chip ICs.

[0002]

As is well known, an IC element is, for example, Si.
A large number of wafers are formed on a wafer, which are cut and separated into so-called bare chips. Then, for this type of IC element, a tentative electrical evaluation (initial evaluation) is performed in the wafer state, and a bare chip I of a selected acceptable product is selected.
Burn-in test is performed after packaging or assembling C. That is, an IC element which is determined as a non-defective product by being classified into a non-defective product and a defective product in the initial evaluation is practically used as a non-defective product after being formed into a bare chip.

[0003]

However, the method of performing the burn-in test after packaging or assembling the bare chip IC as described above has the following inconveniences. That is, after the packaging or assembly, if the product is judged to be defective in the accelerated test (usually, a voltage of 1.2 times the standard voltage is applied at a constant high temperature) as a predictive life test, the packaging or The assembled product will be discarded as a defective product. In other words, the bare chip IC, which becomes a defective product in the life test as a result, is packaged or assembled, which causes a lot of loss in terms of manufacturing cost.
Moreover, for the accelerated test after packaging or assembly, a relatively large space or a relatively large bar is used.
There is also a problem in terms of equipment because it requires an on-line furnace. further,
COB (chip on board) for directly mounting bare chips
Method or flip-chip method, there is no method to connect effectively from the minute input / output terminals of bare chip,
It was mounted without a built-in test, and there was a problem with the reliability of the mounted product.

An object of the present invention is to provide a method capable of easily performing a required burn-in test in the form of a bare chip IC in order to cope with the above situation.

[0005]

Bare chip IC of the present invention
In the burn-in test method, the electrode pad group corresponding to the electrode pad of the bare chip IC under test is provided to selectively adhere the adhesive resin to the electrode pad surface on the test substrate to hold the conductive microspheres. Then, the bare chip IC to be tested is arranged so as to be electrically connected through the conductive microspheres, and after the required burn-in test (acceleration test) is completed, the adhesive resin is dissolved to form the conductive microspheres. It is characterized by including means for removing.

Here, the adhesive resin containing dispersed conductive microspheres interposed between the electrode pad of the bare chip IC to be tested and the electrode pad on the test substrate is subjected to the burn-in test in an uncured state. The burn-in test may be carried out, or the burn-in test may be carried out in a state of being cured and fixed.

[0007]

According to the above invention, the bare chip IC is arranged so that each electrode pad is electrically connected to the corresponding electrode pad previously provided on the surface of the test substrate, and the required burn-in test is performed. . In other words, even in the case of bare chip ICs in which bare electrode pads are finely spaced, the required accelerated life test is performed by being removably placed on the surface of the test substrate, and it is a non-defective product that is easy and does not require complicated operations. A defective product selection selection can be achieved.

[0008]

EXAMPLE FIG. 1 schematically shows an embodiment of the present invention.
An embodiment will be described with reference to (a) to (e).

First, as shown in a sectional view in FIG. 1 (a), on the surface of each electrode pad 1a of a test substrate 1 prepared in advance,
As the adhesive resin, for example, the polysulfonic acid resin layer 2 is adhered and formed by a transfer method or the like. The electrode pad 1a of the test substrate 1 is a bare chip IC3 to be tested.
It is provided corresponding to the electrode pad 3a. Then, as shown in a sectional view in FIG. 1 (b), conductive microspheres 4 having a diameter of, for example, about 10 μm are dispersed on the above-mentioned adhered polysulfonic acid resin layer 2 and the resin layer 2 is adhered by the adhesive property. It is carried or arranged selectively.

On the other hand, a bare chip IC 3 to be tested and a mounting machine 5 having positioning, pressurizing, and partial heating functions are prepared, and as shown in a sectional view in FIG. Bare chip IC to be tested on the surface of substrate 1
The surface of the electrode pad 3a of No. 3 faces downward, and the electrode pad 3a
The surface is arranged in contact with (electrically connected to) the surface of the corresponding electrode pad 1a on the surface of the test substrate 1 through the conductive microspheres 4, and the bare chip IC3 to be tested is pressed from the upper surface side. It is heated to ensure the electrical connection between the electrode pads 1a and 3a. In FIG. 1 (c), 5a is a pickup head which is a part of the mounting machine 5, and 5b is a partial heating means which is also a part of the mounting machine 5 and which utilizes pulsed electricity.

Here, if necessary, as shown in a sectional view in FIG. 1 (d), between the bare chip IC 3 to be tested and the test substrate 1, the same kind of solvent as that for dissolving the resin forming the resin layer 2 is formed. The thermosetting resin 6 which can be dissolved in the solvent is supplied and intervened, and the partial heating means 5b utilizing the pulsed electricity of the mounting machine 5 heats and cures it so that it is securely fixed and electrically connected. Reliability may be improved.

Based on the above, the bare chip IC3 to be tested is
After arranging the electrode pads 3a of No. 1 so as to be electrically connected to the corresponding electrode pads 1a on the test substrate 1, the mounting machine 5 is removed, and in a state shown in cross section in FIG. In a high-temperature furnace maintained at a predetermined temperature while applying a current / signal to the electrode pad 1a of the test substrate 1 via the connector or applying a required voltage to the electrode pad 1a of the test substrate 1 via the connector Then, the bare chip IC3 is subjected to a required acceleration test (burn-in test). Thus, by the required acceleration test (burn-in test),
The bare chip IC3 is judged and sorted as a good product or a defective product, and the bare chip IC3 which is judged and sorted as a good product is subjected to packaging and assembly, while the bare chip IC3 which is judged and sorted as a defective product is packed as a package. -It will be excluded from the target of ging. After completion of the required accelerated test (burn-in test), supply / interposition between the resin layer 2 adhered to the surface of the electrode pad 1a of the test substrate 1 and the bare chip IC3 to be tested and the test substrate 1. The thermosetting resin 6 is dissolved and removed by a required solvent, and the conductive microspheres 4 interposed between the electrode pads 1a and 3a are removed to remove the test substrate 1
The bare chip IC3 to be tested is removed from.

In the above, the bare chip I to be tested is
A required burn-in test was performed by supplying and interposing a thermosetting resin 6 between C3 and the test substrate 1, and the required burn-in test was performed. The electrode pad 1a surface of the test substrate 1 was selectively deposited. The adhesiveness of the resin layer 2 holding the conductive microspheres 4 is 1
Alternatively, a method of fixing and holding the bare chip IC3 under test may be adopted.

[0014]

As described above, according to the burn-in test method of the present invention, the required accelerated life test can be easily performed on the bare chip IC under test. In other words, the required burn-in test (accelerated life test) is performed before the packaging of the bare chip IC under test or before the flip-chip mounting or chip-on-board mounting to judge whether the life characteristics are good or bad. -Can be identified. Therefore, after packaging or mounting or assembling the bare chip IC to be tested, it is possible to completely avoid or prevent occurrence of a situation requiring replacement and repair. Moreover, the required burn-in test (accelerated life test) can be relatively easily performed without requiring a complicated or expensive device or complicated operation. Thus, it can be said that the burn-in test method for a bare chip IC according to the present invention brings many advantages in putting this type of bare chip IC into practical use by packaging it.

[Brief description of drawings]

FIG. 1 schematically shows an example of an embodiment of a burn-in test method for a bare chip IC according to the present invention, in which (a) is a state in which an adhesive resin layer is adhered to the electrode pad surface of the test substrate. , (B) is a cross-sectional view showing conductive microspheres placed on the adhesive resin layer that has been adhered, and (c) is a bare chip IC to be tested positioned on the test substrate. , (D) is a cross-sectional view showing a state in which a thermosetting resin is supplied between the test substrate and the bare chip IC under test, and (e) is a cross-section showing the burn-in test. Fig.

[Explanation of symbols]

 1 ... Test substrate 1a ... Test substrate electrode pad 2 ... Adhesive resin layer 3 ... Test bare chip IC 3a ... Test bare chip IC electrode pad 4 ... Conductive microsphere 5 ... Mounting machine 5a ... Pickup head 5b ... Partial heating means 6 ... Thermosetting resin layer

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[Procedure amendment]

[Submission date] October 20, 1993

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Correction target item name] All drawings

[Correction method] Change

[Correction content]

[Figure 1]

Claims (1)

[Claims] 1. An adhesive resin is selectively applied to the surface of an electrode pad on a test substrate, which is provided with an electrode pad group corresponding to the electrode pad of a bare chip IC to be tested, to hold conductive microspheres. A means for arranging the bare chip IC to be tested so as to be electrically connected through the conductive microspheres and, after the required burn-in test is completed, dissolving the adhesive resin to remove the conductive microspheres. A burn-in test method for a bare chip IC, comprising: