JPH06130120A - Testing of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To shorten the transient state time at the time of the testing of an integrated circuit having a high input time constant by releasing the coupling between an input terminal and the output terminal of a buffer circuit after a predetermined time is elapsed from a point of time when power supply voltage is applied and applying an input signal from the other terminal of a coupling condenser. CONSTITUTION:When cooprative switches 7, 8 are turned, the terminal of a coupling condenser 2 on the side of a signal source is earthed by the switch 8 and, at the same time, the resistor 33 in a semiconductor integrated circuit 3 to be tested becomes a short-circuited state by the switch 7 and the condenser 2 is rapidly charged. Thereafter, the switches 7, 8 are turned OFF to set the arrangement state of a steady measuring circuit. By this constitution, even when inspection is performed on the basis of the same circuit constant as mounting, the charge time at the time of the closing of a power supply can be shortened and AC characteristics can be detected only for a substantial measuring time. Since the condenser 2 is charged within a short time so as to bypass a resistor 33 when the power supply is closed, a steady state not drifting an input signal even in measurement thereafter is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for testing a semiconductor integrated circuit having a low frequency amplifier circuit for audio equipment.

[0002]

2. Description of the Related Art Amplification circuits for low-frequency analog signals used in audio equipment, etc. are subject to the influence of the manufacturing process on the amplitude rate, distortion rate, frequency characteristics, etc. of the output signal with respect to the input signal. An accurate characterization test of is required. When performing the test by directly applying the voltage of the external power supply to the integrated circuit, the characteristics including the effect of the external power supply are measured, so that the integrated circuit can be evaluated accurately for the characteristics of the DUT. It has a built-in reference voltage section. Input a test signal to such an integrated circuit,
The amplitude and distortion of the signal from the output terminal are measured to evaluate the performance of the amplifier section without the influence of external circuits.

FIG. 4 is a block diagram showing the configuration of a measuring system that has been conventionally used for evaluating a low frequency amplifier circuit including a reference voltage section of this type. The test signal from the signal source 1 is supplied to the input terminal 34 of the semiconductor integrated circuit 3 under test through the coupling capacitor 2, and its signal waveform is a sine wave whose center voltage is set to the ground level. The coupling capacitor 2 is provided for blocking a DC voltage and transmitting only an AC signal component, and its capacitance value is determined by the following conditions.

That is, at the input terminal 34 of the amplifying section 31, a central voltage of the operating point of the amplifying circuit together with the input signal D
The C bias (V _ref ) is supplied from the reference voltage unit 32 through the resistor 33, but in the test of the low frequency amplifier circuit and the audio amplifier circuit targeted by the present invention, an AC signal of 10 Hz is set as the lower limit frequency. Amplification part 3 without attenuation
Must be entered as 1. Therefore, in order to input 98% of the amplitude of the test signal, it is necessary to set the CR product of the coupling capacitor 2 and the resistor 33 to be 0.1 or more.

There are various methods for generating the reference voltage in the semiconductor integrated circuit 3 to be tested, but the method for generating the reference voltage by resistance voltage division of the voltage V _cc from the external DC power source 5 is general. The reference voltage section 32 supplies the voltage obtained from the resistance value 321 for dividing the resistance value at approximately the midpoint of its resistance value, but has a low impedance for the purpose of eliminating the influence of the external power source 5. A buffer circuit 322 is provided for this purpose. The output (V _ref ) of the buffer circuit 322 is simultaneously connected to the external terminal 38 of the integrated circuit. The output of the amplifier 31 is output by the signal measuring device 4,
Amplitude, distortion, frequency characteristics, etc. are measured. The external DC power supply 5 is connected to the _Vcc terminal 36 of the integrated circuit via the switch 6.

In the measurement process, first, the external DC power supply 5 is applied to the _Vcc terminal 36 of the semiconductor integrated circuit 3 under test through the switch 6.
More V _cc is applied. Next, the test signal from the signal source 1 is amplified by the amplifier 31, and the output signal thereof is output from the output terminal 3
The signal is input to the signal measuring device 4 via 5 to execute the measurement. When one test item is completed, switch 6 is turned off and V
_Turn off _cc , measure the next test item, and finally replace with the next semiconductor integrated circuit under test. The mass production test is performed by repeating this process.

[0007]

In the above-mentioned conventional test method for low frequency characteristics, it is necessary to charge the coupling capacitor 2 in preparation for signal input. As shown in FIG. 5, the DC bias voltage VINDC at the time of turning on the power supply voltage is compared with V _ref by the following equation: VI until the charging is completed.
Since it changes with time represented by NDC = V _ref (1-e ^{-t / CR} ), the capacitance value of the coupling capacitor 2 is 1 μF,
If the resistance value of the resistor 33 is 100 KΩ, the charging time is about 0.3 seconds when the charging time is the time when the DC bias voltage VINDC reaches the reference voltage V _ref 95%. This value is the time from the application of the power supply voltage to the stable operation, which is the standby time until the stable operation is switched every time the circuit under measurement is switched, and is a substantial loss time.

Further, the content of the mass production inspection is 10 to 100 items per integrated circuit, and the measurement circuit is switched many times for measurement. In terms of inspection cost, it is necessary to set the total measurement time of each inspection time to a few seconds or less,
The inspection cost becomes a problem, and the waiting time of 0.3 seconds is a long time that cannot be ignored. If the CR product is made small, the characteristic of the measurement result cannot be guaranteed as described above, which is a problem.

The present invention solves the above problem and can dramatically reduce the time of a transient state when testing a semiconductor integrated circuit having a low frequency amplifier circuit or an audio amplifier circuit having a relatively large input time constant. It is intended to provide a method.

[0010]

In order to achieve the above object, in a semiconductor integrated circuit testing method of the present invention, an input terminal of an amplifying section to which an input signal is applied and a reference voltage of a reference voltage via a resistor are connected to the input terminal. A method for testing a semiconductor integrated circuit comprising a buffer circuit for applying a DC bias and a reference voltage external terminal on the input side or output side of the buffer circuit, the method comprising: connecting between the input terminal and the output side of the buffer circuit. Short-circuiting, grounding the other end of the coupling capacitor, one end of which is connected to the input terminal, and applying a power supply voltage to the semiconductor integrated circuit; and, after a lapse of a predetermined time after turning on the power supply voltage, the input terminal And an output side of the buffer circuit are opened, and an input signal is applied from the other end of the coupling capacitor.

[0011]

According to the above-mentioned means, by applying _{Vcc to} the semiconductor integrated circuit under test, the coupling capacitor is charged by bypassing the resistance during the short-circuit time, and the steady state in which the input signal does not drift even in the subsequent measurement is maintained. Obtainable.

[0012]

【Example】

(First Embodiment) A first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of a semiconductor integrated circuit testing apparatus according to the first embodiment of the present invention. Figure 1
In the above, the description of the same parts as those of the conventional example will be omitted. The semiconductor integrated circuit 3 under test is composed of an amplifying section 31, a reference voltage section 32 and a resistor 33, and the amplifying section 31 is connected to an input terminal 34 and an output terminal 35. Output V _{re f} of the buffer circuit 322 is connected to the reference voltage terminal 38 with the output of the reference voltage unit 32. The test signal from the signal source 1 is amplified by the amplification unit 31 and output through the output terminal 35, and the signal measuring device 4 measures the amplitude, the distortion rate, the frequency characteristic, and the like.

In the present invention, the switch 7 and the switch 8 are added, and the switch 7 and the switch 8 operate in conjunction with each other, and when they are turned off, they have exactly the same configuration as the conventional example. When ON, the signal source side terminal of the coupling capacitor 2 is grounded by the switch 8, and at the same time, the resistor 33 in the semiconductor integrated circuit 3 under test is short-circuited by the switch 7,
The coupling capacitor 2 is charged rapidly.

FIG. 2 is a flow chart showing the measurement procedure of the test apparatus of FIG. First, V of the semiconductor integrated circuit 3 under test
The voltage V _{cc of the} power source 5 is supplied by turning on the switch 6 connected to the _cc terminal 36. (Step 1 ...
Hereinafter, it is abbreviated as S1). Next, the interlocking switches 7 and 8 are turned on to short-circuit the resistor in series with the coupling capacitor 2 and rapid charging is performed (S2). By waiting for this short charging time, the charging of the coupling capacitor 2 is completed (S3).
The switches 7 and 8 are returned to the OFF state, and the preparation for measurement is completed (S4). After that, various tests are executed as usual (S5). After the measurement is completed, switch 6 is turned off (S
6) Then, the test result is judged (good or bad judgment) (S
7) Finally, replace with the next semiconductor integrated circuit under test (S
8) Return to step 1.

Low output impedance (0.
A buffer circuit that operates at about 1 to 10 Ω) is often used in a semiconductor integrated circuit as a low-impedance bias power supply circuit that uses a voltage source having a relatively large internal impedance and outputs an output voltage equivalent to that.
Also, by connecting to other semiconductor integrated circuits in the same set,
The output voltage of the buffer circuit is often connected to the external terminal 38 in some cases. In this case, the resistor 33 is short-circuited via the switch 7 and the input terminal 34 from the external terminal 38 according to the present embodiment, and the switch 8 is grounded at the same time, so that a substantial resistance component forming a series circuit with the coupling capacitor 2 is formed. Is only the output impedance of the buffer circuit. The value can be set to 10Ω or less (output impedance of the buffer circuit) in the present invention, compared to 100KΩ in the conventional example, and theoretically can be shortened to a charging time of 1/10000. In reality, since it has a series resistance component inside the capacitor (for example, in the case of an electrolytic capacitor of 1 μF, around 100Ω), the charging time cannot be shortened at the theoretical ratio, but it is shortened to about 1/100. It Also,
Empirically, the measurement of the AC characteristics requires a time of at least two cycles of the AC signal, and a measurement time of at least 0.2 seconds in the case of an input frequency of 10 Hz. Therefore, the charging time in (S3) of this embodiment is a value that can be ignored compared to the actual measurement time.

To summarize this first embodiment, (S2)
Then, the switches 7 and 8 are turned on to zero the resistance component interposed in series with the coupling capacitor 2 and both ends of the coupling capacitor 2 are grounded between the buffer circuit 322 and the ground. The bias voltage is charged in a short time, and then the switches 7 and 8 are turned off in (S4) to switch to the steady ground state of the measurement circuit. Can be made extremely small, and the AC characteristics can be inspected with only a substantial measurement time.

In this embodiment, the time from turning on the power source in (S1) to switching the switches 7 and 8 (in ON state) in (S2) is automatically performed in a short time (S1).
Needless to say, the same result can be obtained by exchanging the order of (S2).

(Embodiment 2) FIG. 3 shows a block diagram of a semiconductor integrated circuit testing apparatus according to a second embodiment of the present invention. This is the case where the buffer circuit 322 of the built-in reference voltage section has a high impedance. In that case, the addition of the buffer circuit 9 does not adversely affect the semiconductor integrated circuit 3 to be tested and is completely different from that of the first embodiment. The same effect is obtained.

According to the method for testing a semiconductor integrated circuit of the above embodiment, the output terminal 38 and the coupling capacitor 2 by applying V _cc to the semiconductor integrated circuit under test and switching operation.
Since the quick charge is performed by connecting to the input side of, the transient state time (standby time) can be shortened even if the input time constant is large, and the test cost of the semiconductor integrated circuit having the low frequency amplifier circuit and the audio amplifier circuit can be reduced. It can be reduced.

[0020]

The test method of the semiconductor integrated circuit of the present invention is
The semiconductor integrated circuit under test has a low-frequency amplifier circuit and an audio amplifier circuit because it can shorten the waiting time in the transient state after applying V _cc from an external power supply and can measure with the same circuit constant as the mounted state. It is possible to improve productivity while maintaining high inspection quality in mass production automatic testing of integrated circuits.

[Brief description of drawings]

FIG. 1 is a block diagram of a test apparatus for carrying out a method for testing a semiconductor integrated circuit according to a first embodiment of the present invention.

FIG. 2 is a flowchart for explaining the operation sequence of the test method of FIG.

FIG. 3 is a block diagram of a test apparatus for carrying out a semiconductor integrated circuit test method according to a second embodiment of the present invention.

FIG. 4 is a block diagram of a test apparatus that implements a conventional semiconductor integrated circuit test method.

FIG. 5 is a diagram for explaining a time change of a voltage waveform of an input terminal in a transient state.

[Explanation of symbols]

 2 Coupling Capacitor 3 Semiconductor Integrated Circuit Under Test 31 Amplifying Section 32 Reference Voltage Section 33 Resistor 34 Input Terminal 38 Reference Voltage Terminal 322 Buffer Circuit

Claims (1)

[Claims] 1. A semiconductor integrated circuit in which a signal input terminal to an amplification section, a buffer circuit for applying a DC bias of a reference voltage to the input terminal via a resistor, and an input side or an output side of the buffer circuit are connected to an external terminal. In a method of testing a circuit, a short circuit is made between the input terminal and an output side of the buffer circuit, the other end of a coupling capacitor connected to the input terminal is grounded, and a power supply voltage is supplied to the semiconductor integrated circuit. Applying the power supply voltage and, after a predetermined time has elapsed after applying the power supply voltage, opening between the input terminal and the output side of the buffer circuit and supplying an input signal from the other end of the coupling capacitor. Test method for semiconductor integrated circuit provided.