JPH0612991U - Electronic watch circuit board structure - Google Patents

Abstract

(57) [Abstract] [Purpose] Prevents short circuit between the corners of the integrated circuit and the wiring pattern when the wiring pattern is passed under the integrated circuit on the circuit board. [Constitution] In a circuit board in which an integrated circuit having bumps is connected to a circuit board having a wiring pattern, the wiring pattern arranged on the circuit board at the outer peripheral portion of the integrated circuit is connected to a dummy bump with the integrated circuit and then integrated. A circuit board of an electronic timepiece, characterized in that the circuit board passes through a bump surface of a circuit and is connected to a bump having a function of the wiring pattern. [Effects] With the above-described configuration, the degree of freedom of the integrated circuit bump layout is improved, or the degree of freedom of the wiring pattern in a fixed bump layout is improved, and the circuit block can be downsized, and therefore It has a great effect of miniaturization.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a structure of a circuit board of an electronic timepiece.

[0002]

[Prior art]

 Conventionally, when the wiring pattern 2 is arranged on the circuit board 1 as shown in FIG. 7, if the wiring pattern 2 cannot be arranged in the vicinity of the bumps 5 on the layout, it has been known to arrange the wiring patterns 2 through the bump surface of the integrated circuit 3. For example, such a structure is disclosed in Japanese Utility Model Laid-Open No. 62-75491.

[0003]

[Problems to be solved by the device]

 However, in the case of the conventional circuit board, when the wiring pattern is arranged on the circuit board on the bump surface of the integrated circuit, the cross section is as shown in FIG. 8A, and the corners of the integrated circuit and the wiring pattern are in contact with each other ( There was a problem of edge shorting).

Therefore, in order to solve such a conventional problem, an object of the present invention is to obtain a circuit board capable of reliable connection even if a wiring pattern is arranged on a circuit board on the bump surface side of an integrated circuit. That is.

[0005]

[Means for Solving the Problems]

 In order to solve the above-mentioned problems, the present invention relates to a circuit board having an integrated circuit, in which a wiring pattern arranged on the circuit board at the outer periphery of the integrated circuit is connected to a bump having no function. It is configured to connect to the bump that has the function of the wiring pattern through the bump surface, and even when the wiring pattern is placed on the circuit board on the bump surface side of the integrated circuit, reliable connection can be achieved without edge shorting. I did it.

[0006]

In the circuit board of the electronic timepiece configured as described above, the wiring pattern on the circuit board passes through the bump surface of the integrated circuit after connecting to the dummy bump with the integrated circuit, and the function of the wiring pattern is obtained. Will be connected to the bump having.

[0007]

【Example】

 An embodiment of the present invention will be described below with reference to the drawings. In FIGS. 1 and 2, the wiring pattern 2 is formed on the circuit board 1. The wiring pattern 2 is connected to the dummy bumps 5, passes under the integrated circuit 2, and is connected to the bumps 4 having a function.

3 and 4 show a type of circuit board in which holes are formed in the circuit board 1 so as to allow the integrated circuit 3 to escape. This makes it possible to reduce the thickness of the circuit board. The wiring pattern is connected to the dummy bumps 5 in the same manner as in FIGS. 1 and 2, and then passes under the integrated circuit 2 to be connected to the bumps 4 having a function.

The wiring pattern 2 in a portion which overlaps with the integrated circuit 3 in plan view cannot be formed on the substrate and is only a pattern. Therefore, when the dummy bumps 5 are not provided, the probability of edge short circuit is higher than that of the types shown in FIGS. FIG. 5 shows a case where the bump positions in FIG. 1 are different and the functional bumps 4 and the dummy bumps 5 can be laid out only on the same side of the integrated circuit 3. At this time, by forming the dummy bumps 5 on the opposite side of the integrated circuit 3 as well, the wiring pattern 2 supports both ends and the connection is more reliable.

Similar to FIG. 5, FIG. 6 shows a difference in the bump position of FIG. This is the case where the dummy bumps 5 can be formed only on the orthogonal sides on the integrated circuit 3 with respect to the functional bumps 4. In this case as well, the connection becomes more reliable by using two dummy bumps and supporting both ends.

[0011]

As described above, according to the present invention, when the functional bump cannot be arranged near the wiring pattern on the bump layout, the dummy bump is provided near the wiring pattern, the wiring pattern is connected to the dummy bump, and then integrated. Connecting functional bumps under the circuit stabilizes the connection, improves the flexibility of pattern and bump layout, makes it smaller than a circuit board that does not pass the pattern under the integrated circuit, and allows the integrated circuit to escape to the board. Even when the wiring pattern is formed, the wiring pattern can pass under the integrated circuit, which has a great effect of reducing the thickness of the substrate.

[Brief description of drawings]

FIG. 1 is a plan view of a circuit board of the present invention.

FIG. 2 is a sectional view of a circuit board of the present invention.

FIG. 3 is a plan view of another embodiment 1 of the present invention.

FIG. 4 is a sectional view of another embodiment 1 of the present invention.

FIG. 5 is a plan view of another embodiment 2 of the present invention.

FIG. 6 is a plan view of another embodiment 3 of the present invention.

FIG. 7 is a plan view of a conventional example of the present invention.

FIG. 8 is a sectional view of a conventional example of the present invention.

[Explanation of symbols]

 1 circuit board 2 wiring pattern 3 integrated circuit 4 functional bump 5 dummy bump 6 sealant

Claims (1)

[Scope of utility model registration request] 1. In the structure of a circuit board of an electronic timepiece in which an integrated circuit having bumps is connected to a circuit board having a wiring pattern, the wiring pattern on the circuit board located at the outer peripheral portion of the integrated circuit is the integrated circuit. A structure of a circuit board of an electronic timepiece, wherein the circuit board is connected to a functional bump through a dummy bump.