JPH06120231A - Diode and manufacture thereof - Google Patents

Diode and manufacture thereof

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Publication number
JPH06120231A
JPH06120231A JP28952092A JP28952092A JPH06120231A JP H06120231 A JPH06120231 A JP H06120231A JP 28952092 A JP28952092 A JP 28952092A JP 28952092 A JP28952092 A JP 28952092A JP H06120231 A JPH06120231 A JP H06120231A
Authority
JP
Japan
Prior art keywords
diffusion region
concentration diffusion
low
region
photosensitive resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28952092A
Other languages
Japanese (ja)
Inventor
Yuisuke Yano
結資 矢野
Shoji Okabe
祥二 岡部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP28952092A priority Critical patent/JPH06120231A/en
Publication of JPH06120231A publication Critical patent/JPH06120231A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To eliminate instability for setting a current and a breakdown voltage, in the case of a voltage lower than or equal to the breakdown voltage at the time of applying a backward bias voltage, which instability is caused by that a PN junction is formed at a crystal defect part generated under the edge a field oxide film which is selectively formed. CONSTITUTION:This diode is manufactured as follows; under the field oxide film 5 edge of an element region where, in a first low concentration diffusion region 1 formed in a semiconductor substrate 9, a first high concentration region 3 of the opposite conductivity type is formed, a second low concentration diffusion region 2 of the same conductivity type is formed. Thereby the crystal defect part formed under the field oxide film 5 edge is covered with the second low concentration diffusion region 2, so that a P-N function is not formed. Hence a current does not flow in the case of low voltage, and the setting of a breakdown voltage is facilitated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はダイオードおよびその製
造方法に関する。
FIELD OF THE INVENTION The present invention relates to a diode and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来のダイオードおよびその製造方法を
図7〜図10の断面図、図11のダイオードの電圧−電
流特性のグラフを用いて説明する。
2. Description of the Related Art A conventional diode and a method of manufacturing the same will be described with reference to sectional views of FIGS. 7 to 10 and a graph of voltage-current characteristics of the diode of FIG.

【0003】まず、従来のダイオードの製造方法を説明
する。最初に、図7に示すように、比抵抗8ΩcmのN
型の半導体基板9上に、膜厚1.1μmの感光性樹脂
(図示せず)を回転塗布法により全面に形成し、所定の
マスクを用いて露光し、現像処理を行い、感光性樹脂を
パターニングし、この感光性樹脂をマスクとして、イオ
ン注入法を用いて、リンを加速エネルギー100ke
V、注入量9.1×1013atoms/cm2 を注入
し、N型の第1の低濃度拡散領域1を形成し、感光性樹
脂を除去する。
First, a conventional method for manufacturing a diode will be described. First, as shown in FIG. 7, N having a specific resistance of 8 Ωcm
A photosensitive resin (not shown) having a film thickness of 1.1 μm is formed on the entire surface of the semiconductor substrate 9 of the mold by a spin coating method, exposed using a predetermined mask, and subjected to a developing treatment to remove the photosensitive resin. After patterning, phosphorus is accelerated with an acceleration energy of 100 ke using an ion implantation method using this photosensitive resin as a mask.
V and an injection amount of 9.1 × 10 13 atoms / cm 2 are injected to form the N-type first low-concentration diffusion region 1, and the photosensitive resin is removed.

【0004】次に、図8に示すように、温度1140℃
で14時間熱処理を行い、第1の低濃度拡散領域1のリ
ンを活性化する。その後、気相化学成長法(以下、CV
Dと記す)により、膜厚150nmの窒化シリコン(図
示せず)を全面に形成し、膜厚1.1μmの感光性樹脂
(図示せず)を回転塗布法により全面に形成し、所定の
マスクを用いて露光し、現像処理を行い、第1の低濃度
拡散領域1上の、窒化シリコンの上に感光性樹脂をパタ
ーニングし、この感光性樹脂をマスクとして反応性イオ
ンエッチング法(以下、RIEと記す)により窒化シリ
コンをパターニングし、その後、感光性樹脂を除去す
る。その後、水蒸気を添加した酸素雰囲気中で1000
℃の熱処理を160分行い、素子分離領域に酸化シリコ
ンを形成する、いわゆる選択酸化により、膜厚710n
mの酸化シリコンのフィールド酸化膜5を形成する。こ
のとき、フィールド酸化膜5のエッジ下部に応力が生
じ、第1の低濃度拡散領域1に結晶欠陥6が生じる。そ
の後、窒化シリコンを180℃に加熱したリン酸で除去
する。
Next, as shown in FIG. 8, a temperature of 1140 ° C.
Is heat-treated for 14 hours to activate phosphorus in the first low concentration diffusion region 1. After that, vapor phase chemical growth method (hereinafter, CV
A silicon nitride (not shown) having a film thickness of 150 nm is formed on the entire surface by D), and a photosensitive resin (not shown) having a film thickness of 1.1 μm is formed on the entire surface by spin coating, and a predetermined mask is formed. Is exposed to light and developed, a photosensitive resin is patterned on the silicon nitride on the first low-concentration diffusion region 1, and the photosensitive resin is used as a mask for reactive ion etching (hereinafter referred to as RIE). Is used to pattern the silicon nitride, and then the photosensitive resin is removed. After that, 1000 in the oxygen atmosphere with the addition of water vapor
A heat treatment at 160 ° C. is performed for 160 minutes to form silicon oxide in the element isolation region, that is, by selective oxidation, a film thickness of 710 n is obtained.
A field oxide film 5 of m silicon oxide is formed. At this time, stress is generated under the edge of the field oxide film 5, and a crystal defect 6 is generated in the first low concentration diffusion region 1. Then, the silicon nitride is removed with phosphoric acid heated to 180 ° C.

【0005】次に、図9に示すように、膜厚1.1μm
の感光性樹脂(図示せず)を回転塗布法により全面に形
成し、所定のマスクを用いて露光し、現像処理を行い、
所定の素子領域上の感光性樹脂を開口し、この感光性樹
脂をマスクとして用い、イオン注入法を用いて、ボロン
を加速エネルギー25keV、注入量2.5×1015
toms/cm2 を注入して、P型の第1の高濃度拡散
領域3を形成し、N型の第1の低濃度拡散領域1とのP
N接合を形成して、その後、感光性樹脂を除去する。そ
の後、膜厚1.1μmの感光性樹脂(図示せず)を回転
塗布法により全面に形成し、所定のマスクを用いて露光
し、現像処理を行い、第1の高濃度拡散領域3の形成し
ていない素子領域上の感光性樹脂を開口し、この感光性
樹脂をマスクとして、イオン注入法を用いて、ヒ素を加
速エネルギー60keV、注入量3.5×1015ato
ms/cm2 を注入して、N型の第1の低濃度拡散領域
1の電極としてN型の第2の高濃度拡散領域4を形成し
て、その後、感光性樹脂を除去する。
Next, as shown in FIG. 9, the film thickness is 1.1 μm.
Photosensitive resin (not shown) is formed on the entire surface by a spin coating method, exposed using a predetermined mask, and subjected to development processing.
An opening is formed in a photosensitive resin on a predetermined element region, this photosensitive resin is used as a mask, and an ion implantation method is used to accelerate boron with an acceleration energy of 25 keV and an implantation amount of 2.5 × 10 15 a.
toms / cm 2 is implanted to form the P-type first high-concentration diffusion region 3 and P with the N-type first low-concentration diffusion region 1.
The N junction is formed, and then the photosensitive resin is removed. After that, a photosensitive resin (not shown) having a film thickness of 1.1 μm is formed on the entire surface by a spin coating method, exposed using a predetermined mask, and developed to form a first high-concentration diffusion region 3. An opening is made in the photosensitive resin on the element region that has not been formed, and using this photosensitive resin as a mask, arsenic is accelerated with an acceleration energy of 60 keV and an injection amount of 3.5 × 10 15 ato using an ion implantation method.
ms / cm 2 is injected to form an N-type second high-concentration diffusion region 4 as an electrode of the N-type first low-concentration diffusion region 1, and then the photosensitive resin is removed.

【0006】次に、図10に示すように、CVDを用い
て、膜厚550nmのリンとボロンを含んだ酸化シリコ
ンの層間絶縁膜7を形成し、窒素雰囲気中で1000℃
の熱処理を25分行い層間絶縁膜7を流動化させる、い
わゆる、リフローを行い、層間絶縁膜7の表面を平坦化
する。その後、感光材料である膜厚1.1μmの感光性
樹脂(図示せず)を全面に形成し、所定のマスクを用い
て露光し現像し感光性樹脂をパターニングする。その
後、感光性樹脂をマスクとしてRIEにより層間絶縁膜
7をエッチングして接続穴を形成し、感光性樹脂を除去
する。その後、スパッタリング法によりアルミニウムか
らなる配線8を形成し、この配線8と第1の高濃度拡散
領域3、および配線8と第2の高濃度拡散領域4とを接
続する。
Next, as shown in FIG. 10, a 550 nm-thickness interlayer insulating film 7 of silicon oxide containing phosphorus and boron is formed by CVD, and the temperature is set to 1000 ° C. in a nitrogen atmosphere.
Is heat-treated for 25 minutes to fluidize the interlayer insulating film 7, so-called reflow is performed, and the surface of the interlayer insulating film 7 is flattened. After that, a photosensitive resin (not shown) having a film thickness of 1.1 μm, which is a photosensitive material, is formed on the entire surface, and exposed and developed using a predetermined mask to pattern the photosensitive resin. After that, the interlayer insulating film 7 is etched by RIE using the photosensitive resin as a mask to form a connection hole, and the photosensitive resin is removed. After that, the wiring 8 made of aluminum is formed by the sputtering method, and the wiring 8 and the first high-concentration diffusion region 3 are connected to each other, and the wiring 8 and the second high-concentration diffusion region 4 are connected to each other.

【0007】[0007]

【発明が解決しようとする課題】以上の工程により作成
した従来のダイオードは、図10に示すように、PN接
合を、N型の第1の低濃度拡散領域1とP型の第1の高
濃度拡散領域3境界に形成するが、選択酸化工程で形成
したフィールド酸化膜5のエッジ下部の結晶欠陥6部分
にも第1の低濃度拡散領域1と第1の高濃度拡散領域3
とのPN接合が形成される。そのため、P型の第1の高
濃度拡散領域3とN型の第2の高濃度拡散領域4に逆バ
イアスを印加するときの、つまり、第1の高濃度拡散領
域3に印加する電圧よりも、第2の高濃度拡散領域4に
マイナスの電圧を印加するときの逆バイアス電流は、結
晶欠陥6部分に形成されたPN接合から電流が流れるた
め、図11のグラフに示すように、ブレークダウン電圧
10以下の電圧でも電流が流れてしまう。また、ブレー
クダウン電圧10も、結晶欠陥6部分のPN接合部分で
ブレークダウンが生じるため、不安定で、ブレークダウ
ン電圧10の設定が困難になる。
As shown in FIG. 10, the conventional diode produced by the above process has a PN junction with an N type first low concentration diffusion region 1 and a P type first high concentration diffusion region 1. Although formed at the boundary of the concentration diffusion region 3, the first low concentration diffusion region 1 and the first high concentration diffusion region 3 are also formed in the crystal defect 6 portion below the edge of the field oxide film 5 formed by the selective oxidation process.
To form a PN junction. Therefore, when a reverse bias is applied to the P-type first high-concentration diffusion region 3 and the N-type second high-concentration diffusion region 4, that is, more than the voltage applied to the first high-concentration diffusion region 3. , A reverse bias current when a negative voltage is applied to the second high-concentration diffusion region 4 flows from the PN junction formed in the crystal defect 6 portion, and therefore, as shown in the graph of FIG. A current flows even at a voltage of 10 or less. Further, the breakdown voltage 10 is also unstable because the breakdown occurs at the PN junction portion of the crystal defect 6 portion, and it is difficult to set the breakdown voltage 10.

【0008】本発明の目的は、上記課題を解決して、ブ
レークダウン電圧以下の電圧で電流が流れず、また、ブ
レークダウン電圧の設定が容易なダイオード、およびそ
の製造方法を提供することにある。
An object of the present invention is to solve the above problems and to provide a diode in which no current flows at a voltage lower than the breakdown voltage and in which the breakdown voltage can be easily set, and a manufacturing method thereof. .

【0009】[0009]

【課題を解決するための手段】上記目的を達成するため
に本発明のダイオードおよびその製造方法は下記記載の
ダイオードおよびその製造方法を採用する。
In order to achieve the above object, the diode and the manufacturing method thereof according to the present invention employ the diode and the manufacturing method described below.

【0010】本発明のダイオードは、半導体基板上の素
子分離領域間に高濃度拡散領域を備え、高濃度拡散領域
の端に形成される結晶欠陥を高濃度拡散領域と同じ導電
型の低濃度拡散領域で覆う構造を備えることを特徴とす
る。
The diode of the present invention has a high-concentration diffusion region between element isolation regions on a semiconductor substrate, and crystal defects formed at the ends of the high-concentration diffusion region have low-concentration diffusion of the same conductivity type as the high-concentration diffusion region. It is characterized in that it is provided with a structure for covering with a region.

【0011】本発明のダイオードの製造方法は、半導体
基板上に、第1の低濃度拡散領域を形成する工程と、第
1の低濃度拡散領域と逆の導電型で、第1の低濃度拡散
領域上に第2の低濃度拡散領域を形成する工程と、第2
の低濃度拡散領域上に、素子分離領域の端を形成するよ
うに、第1の低濃度拡散領域と第2の低濃度拡散領域上
に選択的に素子分離領域を形成する工程と、第1の低濃
度拡散領域と逆の導電型で、素子分離領域の端に第2の
低濃度拡散領域を形成した素子領域に第1の高濃度拡散
領域を形成する工程と、第1の低濃度拡散領域と同じの
導電型で、第1の高濃度拡散領域の形成していない素子
領域に第2の高濃度拡散領域を形成する工程と、その後
全面に層間絶縁膜を形成する工程と、層間絶縁膜に接続
穴を形成して、配線を形成することを特徴とする。
According to the method of manufacturing a diode of the present invention, a step of forming a first low-concentration diffusion region on a semiconductor substrate, and a conductivity type opposite to that of the first low-concentration diffusion region, the first low-concentration diffusion region. Forming a second low-concentration diffusion region on the region;
Selectively forming an element isolation region on the first low-concentration diffusion region and the second low-concentration diffusion region so as to form an edge of the element isolation region on the low-concentration diffusion region. Forming a first high-concentration diffusion region in an element region having a conductivity type opposite to that of the low-concentration diffusion region in which the second low-concentration diffusion region is formed at the end of the element isolation region; A step of forming a second high-concentration diffusion region in an element region that has the same conductivity type as that of the region and in which the first high-concentration diffusion region is not formed, and then a step of forming an interlayer insulating film on the entire surface, A feature is that a connection hole is formed in the film to form a wiring.

【0012】[0012]

【実施例】以下、図1〜図6を用いて本発明の実施例を
説明する。図1〜図5はダイオードの製造方法を工程順
に示す断面図で、図6は本発明のダイオードの電圧−電
流特性を示すグラフである。
Embodiments of the present invention will be described below with reference to FIGS. 1 to 5 are cross-sectional views showing a method of manufacturing a diode in the order of steps, and FIG. 6 is a graph showing voltage-current characteristics of the diode of the present invention.

【0013】まず、本発明のダイオードを説明する。図
5に示すように、PN接合を、N型の第1の低濃度拡散
領域1とP型の第2の低濃度拡散領域2、およびN型の
第1の低濃度拡散領域1とP型の第1の高濃度拡散領域
3とに形成する。また、フィールド酸化膜5のエッジ下
部に形成される結晶欠陥6を、第2の低濃度拡散領域2
で覆う構造を採用する。N型の第1の低濃度拡散領域1
とP型の第2の低濃度拡散領域2とのPN接合のブレー
クダウン電圧は、第2の低濃度拡散領域2の不純物濃度
が第1の高濃度拡散領域3より薄いために、第1の低濃
度拡散領域1と第1の高濃度拡散領域3間に形成される
のPN接合のブレークダウン電圧より、かなり高くな
る。また、結晶欠陥6部分を、第2の低濃度拡散領域2
に覆う構造を採用することにより、結晶欠陥6部分にP
N接合が形成されない。そのため、結晶欠陥6部分での
ブレークダウンが生じないで、ブレークダウン電圧以下
の電圧で電流が流れない。また、ブレークダウン電圧を
設定することが困難な結晶欠陥6部分によるブレークダ
ウンが生じないため、ブレークダウン電圧の設定が容易
になる。
First, the diode of the present invention will be described. As shown in FIG. 5, the PN junction includes an N-type first low-concentration diffusion region 1 and a P-type second low-concentration diffusion region 2 and an N-type first low-concentration diffusion region 1 and P-type. And the first high-concentration diffusion region 3 of. In addition, the crystal defects 6 formed below the edge of the field oxide film 5 are removed from the second low concentration diffusion region 2
Adopt a structure covered with. N-type first low concentration diffusion region 1
The breakdown voltage of the PN junction between the P type second low-concentration diffusion region 2 and the P-type second low-concentration diffusion region 2 is the first because the impurity concentration of the second low-concentration diffusion region 2 is lower than that of the first high-concentration diffusion region 3. It is considerably higher than the breakdown voltage of the PN junction formed between the low concentration diffusion region 1 and the first high concentration diffusion region 3. In addition, the crystal defect 6 portion is replaced with the second low-concentration diffusion region 2
By adopting a structure for covering the crystal defect 6
N-junction is not formed. Therefore, no breakdown occurs at the crystal defect 6 portion, and no current flows at a voltage lower than the breakdown voltage. Further, since the breakdown due to the crystal defect 6 portion where it is difficult to set the breakdown voltage does not occur, the breakdown voltage can be easily set.

【0014】次に、本発明のダイオードの製造方法を工
程順に説明する。最初に、図1に示すように、比抵抗8
ΩcmのN型の半導体基板9上に、膜厚1.1μmの感
光性樹脂(図示せず)を回転塗布法により全面に形成
し、所定のマスクを用いて露光し、現像処理を行い、感
光性樹脂をパターニングし、この感光性樹脂をマスクと
して用い、イオン注入法を用いて、リンを加速エネルギ
ー100keV、注入量9.1×1013atoms/c
2 を注入し、N型の第1の低濃度拡散領域1を形成
し、感光性樹脂を除去する。
Next, a method of manufacturing the diode of the present invention will be described in the order of steps. First, as shown in FIG.
A photosensitive resin (not shown) having a film thickness of 1.1 μm is formed on the entire surface by a spin coating method on an N-type semiconductor substrate 9 having an Ωcm, exposed by using a predetermined mask, developed, and exposed to light. Patterning a photosensitive resin, using this photosensitive resin as a mask, and using an ion implantation method, phosphorus is accelerated at an acceleration energy of 100 keV and an implantation amount of 9.1 × 10 13 atoms / c.
m 2 is injected to form the N-type first low-concentration diffusion region 1, and the photosensitive resin is removed.

【0015】次に、図2に示すように、温度1140℃
で14時間熱処理を行い、第1の低濃度拡散領域1のリ
ンを活性化する。その後、膜厚1.1μmの感光性樹脂
11を回転塗布法により全面に形成し、所定のマスクを
用いて露光し、現像処理を行い、その後に形成する第1
の高濃度拡散領域1の端の部分だけ感光性樹脂11を開
口し、この感光性樹脂11をマスクとして、イオン注入
法を用いて、ボロンを加速エネルギー25keV、注入
量2.0×1014atoms/cm2 を注入して、P型
の第2の低濃度拡散領域2を形成する。
Next, as shown in FIG. 2, the temperature is 1140 ° C.
Is heat-treated for 14 hours to activate phosphorus in the first low concentration diffusion region 1. After that, a photosensitive resin 11 having a film thickness of 1.1 μm is formed on the entire surface by a spin coating method, is exposed using a predetermined mask, is subjected to development processing, and is then formed.
Of the high-concentration diffusion region 1 is opened, and using this photosensitive resin 11 as a mask, an ion implantation method is used to accelerate boron with an acceleration energy of 25 keV and an implantation amount of 2.0 × 10 14 atoms. / Cm 2 is implanted to form the P-type second low-concentration diffusion region 2.

【0016】次に、図3に示すように、感光性樹脂11
を除去し、さらにCVDにより、膜厚150nmの窒化
シリコン(図示せず)を全面に形成し、膜厚1.1μm
の感光性樹脂(図示せず)を回転塗布法により全面に形
成し、所定のマスクを用いて露光し、現像処理を行い、
第1の低濃度拡散領域1上の窒化シリコンの上と、およ
び、第2の低濃度拡散領域2上の窒化シリコンの上に感
光性樹脂の端が設けるように、第2の低濃度拡散領域2
と第1の低濃度拡散領域1上の窒化シリコンの上とに、
感光性樹脂をパターニングし、この感光性樹脂をマスク
としてRIEにより窒化シリコンをパターニングし、そ
の後、感光性樹脂を除去する。その後、水蒸気を添加し
た酸素雰囲気中で1000℃の熱処理を160分行い、
素子分離領域に酸化シリコンを形成する、いわゆる選択
酸化により、膜厚710nmの酸化シリコンのフィール
ド酸化膜5を形成する。このとき、フィールド酸化膜5
のエッジ下部に応力が生じ、結晶欠陥6が形成される
が、その後の工程で形成する第1の高濃度拡散領域5の
素子領域端のフィールド酸化膜のエッジ下部の結晶欠陥
6は、第2の低濃度拡散領域2で覆った構造になる。そ
の後、窒化シリコンを180℃に加熱したリン酸で除去
する。
Next, as shown in FIG. 3, the photosensitive resin 11
And a silicon nitride (not shown) having a film thickness of 150 nm is formed on the entire surface by CVD, and the film thickness is 1.1 μm.
Photosensitive resin (not shown) is formed on the entire surface by a spin coating method, exposed using a predetermined mask, and subjected to development processing.
The second low-concentration diffusion region is provided so that the edge of the photosensitive resin is provided on the silicon nitride on the first low-concentration diffusion region 1 and on the silicon nitride on the second low-concentration diffusion region 2. Two
And on the silicon nitride on the first low-concentration diffusion region 1,
The photosensitive resin is patterned, the silicon nitride is patterned by RIE using the photosensitive resin as a mask, and then the photosensitive resin is removed. After that, heat treatment at 1000 ° C. is performed for 160 minutes in an oxygen atmosphere to which water vapor is added,
A field oxide film 5 of silicon oxide having a film thickness of 710 nm is formed by so-called selective oxidation for forming silicon oxide in the element isolation region. At this time, the field oxide film 5
Stress is generated under the edge of the field oxide film at the edge of the element region of the first high-concentration diffusion region 5 formed in the subsequent step, and the crystal defect 6 is The structure is covered with the low-concentration diffusion region 2. Then, the silicon nitride is removed with phosphoric acid heated to 180 ° C.

【0017】次に、図4に示すように、膜厚1.1μm
の感光性樹脂(図示せず)を回転塗布法により全面に形
成し、所定のマスクを用いて露光し、現像処理を行い、
フィールド酸化膜5のエッジ下部に第2の低濃度拡散領
域2を形成した素子領域上の感光性樹脂を開口し、この
感光性樹脂をマスクとして、イオン注入法を用いて、ボ
ロンを加速エネルギー25keV、注入量2.5×10
15atoms/cm2を注入して、P型の第1の高濃度
拡散領域3を形成し、N型の第1の低濃度拡散領域1お
よびN型の半導体基板9とにPN接合を形成して、その
後、感光性樹脂を除去する。
Next, as shown in FIG. 4, the film thickness is 1.1 μm.
Photosensitive resin (not shown) is formed on the entire surface by a spin coating method, exposed using a predetermined mask, and subjected to development processing.
A photosensitive resin on the element region where the second low-concentration diffusion region 2 is formed is opened below the edge of the field oxide film 5, and using this photosensitive resin as a mask, the boron is accelerated with an acceleration energy of 25 keV by an ion implantation method. , Injection amount 2.5 × 10
Implanting 15 atoms / cm 2 forms a P-type first high-concentration diffusion region 3 and forms a PN junction with the N-type first low-concentration diffusion region 1 and the N-type semiconductor substrate 9. Then, the photosensitive resin is removed.

【0018】その後、膜厚1.1μmの感光性樹脂(図
示せず)を回転塗布法により全面に形成し、所定のマス
クを用いて露光し、現像処理を行い、P型の第1の高濃
度拡散領域3を形成していない素子領域上の感光性樹脂
を開口し、この感光性樹脂をマスクとして、イオン注入
法を用いて、ヒ素を加速エネルギー60keV、注入量
3.5×1015atoms/cm2 を注入して、N型の
第1の低濃度拡散領域1の電極としてN型の第2の高濃
度拡散領域4を形成して、その後、感光性樹脂を除去す
る。
After that, a photosensitive resin (not shown) having a film thickness of 1.1 μm is formed on the entire surface by a spin coating method, is exposed using a predetermined mask, and is subjected to a developing treatment, so that the P-type first high resin is formed. The photosensitive resin on the element region where the concentration diffusion region 3 is not formed is opened, and using this photosensitive resin as a mask, arsenic is accelerated with an acceleration energy of 60 keV and an implantation amount of 3.5 × 10 15 atoms. / Cm 2 is injected to form an N-type second high-concentration diffusion region 4 as an electrode of the N-type first low-concentration diffusion region 1, and then the photosensitive resin is removed.

【0019】次に、図5に示すように、CVDを用い
て、膜厚550nmのリンとボロンを含んだ酸化シリコ
ンの層間絶縁膜7を形成し、窒素雰囲気中で1000℃
の熱処理を25分行い層間絶縁膜7を流動化させる、い
わゆる、リフローを行い、層間絶縁膜7の表面を平坦化
する。その後、感光材料である膜厚1.1μmの感光性
樹脂(図示せず)を全面に形成し、所定のマスクを用い
て露光し現像し感光性樹脂をパターニングする。その
後、感光性樹脂をマスクとしてRIEにより層間絶縁膜
7をエッチングし、感光性樹脂を除去する。その後、ス
パッタリング法によりアルミニウムからなる配線8を形
成して、この配線8と第1の高濃度拡散領域3、および
配線8と第2の高濃度拡散領域4とを接続する。
Next, as shown in FIG. 5, a 550 nm-thickness interlayer insulating film 7 of silicon oxide containing phosphorus and boron is formed by CVD, and the temperature is set to 1000 ° C. in a nitrogen atmosphere.
Is heat-treated for 25 minutes to fluidize the interlayer insulating film 7, so-called reflow is performed, and the surface of the interlayer insulating film 7 is flattened. After that, a photosensitive resin (not shown) having a film thickness of 1.1 μm, which is a photosensitive material, is formed on the entire surface, and exposed and developed using a predetermined mask to pattern the photosensitive resin. After that, the interlayer insulating film 7 is etched by RIE using the photosensitive resin as a mask to remove the photosensitive resin. After that, the wiring 8 made of aluminum is formed by the sputtering method, and the wiring 8 and the first high-concentration diffusion region 3 are connected to each other, and the wiring 8 and the second high-concentration diffusion region 4 are connected to each other.

【0020】この工程により作成したダイオードは、第
2の低濃度拡散領域2内に結晶欠陥6を形成し、結晶欠
陥6部分にPN接合が形成されず、従来のように結晶欠
陥6部分でブレークダウンが生じない。このため、図6
のグラフに示すように、ブレークダウン電圧10以下の
電圧で電流が流れず、また、結晶欠陥6部分によるブレ
ークダウンが生じないため、ブレークダウン電圧10の
設定が容易になる。
The diode produced by this process forms crystal defects 6 in the second low-concentration diffusion region 2 and a PN junction is not formed in the crystal defect 6 portions. Down does not occur. Therefore, in FIG.
As shown in the graph, the current does not flow at a voltage equal to or lower than the breakdown voltage 10 and the breakdown due to the crystal defect 6 portion does not occur, so that the breakdown voltage 10 can be easily set.

【0021】[0021]

【発明の効果】本発明によるダイオードおよびその製造
方法により、フィールド酸化膜のエッジ下部の、第2の
低濃度拡散領域内に結晶欠陥を形成し、結晶欠陥部分に
PN接合が形成されず、結晶欠陥部分でブレークダウン
が生じない。このため、ブレークダウン電圧以下の電圧
で電流が流れない。また、ブレークダウン電圧を設定す
ることが困難な結晶欠陥部分のブレークダウンが生じな
いため、ブレークダウン電圧の設定が容易になる。
According to the diode and the method of manufacturing the same according to the present invention, a crystal defect is formed in the second low concentration diffusion region under the edge of the field oxide film, and a PN junction is not formed in the crystal defect portion. Breakdown does not occur at the defective part. Therefore, no current flows at a voltage lower than the breakdown voltage. Further, since the breakdown of the crystal defect portion where it is difficult to set the breakdown voltage does not occur, the breakdown voltage can be set easily.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例を示すダイオードの製造方法の
断面図である。
FIG. 1 is a cross-sectional view of a method for manufacturing a diode showing an embodiment of the present invention.

【図2】本発明の実施例を示すダイオードの製造方法の
断面図である。
FIG. 2 is a cross-sectional view of a method for manufacturing a diode showing an embodiment of the present invention.

【図3】本発明の実施例を示すダイオードの製造方法の
断面図である。
FIG. 3 is a cross-sectional view of a method for manufacturing a diode showing an embodiment of the present invention.

【図4】本発明の実施例を示すダイオードの製造方法の
断面図である。
FIG. 4 is a cross-sectional view of a method for manufacturing a diode showing an embodiment of the present invention.

【図5】本発明の実施例を示すダイオードの製造方法の
断面図である。
FIG. 5 is a cross-sectional view of a method for manufacturing a diode showing an embodiment of the present invention.

【図6】本発明の実施例を示すダイオードの電圧−電流
特性のグラフである。
FIG. 6 is a graph of voltage-current characteristics of a diode showing an example of the present invention.

【図7】従来例を示すダイオードの製造方法の断面図で
ある。
FIG. 7 is a cross-sectional view of a method for manufacturing a diode showing a conventional example.

【図8】従来例を示すダイオードの製造方法の断面図で
ある。
FIG. 8 is a cross-sectional view of a method for manufacturing a diode showing a conventional example.

【図9】従来例を示すダイオードの製造方法の断面図で
ある。
FIG. 9 is a cross-sectional view of a method for manufacturing a diode showing a conventional example.

【図10】従来例を示すダイオードの製造方法の断面図
である。
FIG. 10 is a cross-sectional view of a method for manufacturing a diode showing a conventional example.

【図11】従来例を示すダイオードの電圧−電流特性の
グラフである。
FIG. 11 is a graph of voltage-current characteristics of a diode showing a conventional example.

【符号の説明】[Explanation of symbols]

1 第1の低濃度拡散領域 2 第2の低濃度拡散領域 3 第1の高濃度拡散領域 4 第2の高濃度拡散領域 5 フィールド酸化膜 6 結晶欠陥 7 層間絶縁膜 1 first low concentration diffusion region 2 second low concentration diffusion region 3 first high concentration diffusion region 4 second high concentration diffusion region 5 field oxide film 6 crystal defect 7 interlayer insulating film

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板上の素子分離領域間に高濃度
拡散領域を備え、高濃度拡散領域の端に形成される結晶
欠陥を高濃度拡散領域と同じ導電型の低濃度拡散領域で
覆う構造を備えることを特徴とするダイオード。
1. A structure in which a high-concentration diffusion region is provided between element isolation regions on a semiconductor substrate, and a crystal defect formed at an end of the high-concentration diffusion region is covered with a low-concentration diffusion region of the same conductivity type as the high-concentration diffusion region. A diode characterized by comprising.
【請求項2】 半導体基板上に、第1の低濃度拡散領域
を形成する工程と、第1の低濃度拡散領域と逆の導電型
で、第1の低濃度拡散領域上に第2の低濃度拡散領域を
形成する工程と、第2の低濃度拡散領域上に、素子分離
領域の端を形成するように、第1の低濃度拡散領域と第
2の低濃度拡散領域上に選択的に素子分離領域を形成す
る工程と、第1の低濃度拡散領域と逆の導電型で、素子
分離領域の端に第2の低濃度拡散領域を形成した素子領
域に第1の高濃度拡散領域を形成する工程と、第1の低
濃度拡散領域と同じの導電型で、第1の高濃度拡散領域
の形成していない素子領域に第2の高濃度拡散領域を形
成する工程と、その後全面に層間絶縁膜を形成する工程
と、層間絶縁膜に接続穴を形成して、配線を形成するこ
とを特徴とするダイオードの製造方法。
2. A step of forming a first low concentration diffusion region on a semiconductor substrate, and a second low concentration diffusion region having a conductivity type opposite to that of the first low concentration diffusion region. A step of forming a concentration diffusion region, and selectively forming an end of an element isolation region on the second low concentration diffusion region on the first low concentration diffusion region and the second low concentration diffusion region. The step of forming the element isolation region and the conductivity type opposite to that of the first low-concentration diffusion region, and the first high-concentration diffusion region is formed in the element region where the second low-concentration diffusion region is formed at the end of the element isolation region. A step of forming, a step of forming a second high-concentration diffusion region in an element region having the same conductivity type as that of the first low-concentration diffusion region, and in which the first high-concentration diffusion region is not formed, and then over the entire surface. Die characterized by forming an interlayer insulating film, forming a connection hole in the interlayer insulating film, and forming a wiring Aether manufacturing method.
JP28952092A 1992-10-02 1992-10-02 Diode and manufacture thereof Pending JPH06120231A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28952092A JPH06120231A (en) 1992-10-02 1992-10-02 Diode and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28952092A JPH06120231A (en) 1992-10-02 1992-10-02 Diode and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH06120231A true JPH06120231A (en) 1994-04-28

Family

ID=17744324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28952092A Pending JPH06120231A (en) 1992-10-02 1992-10-02 Diode and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH06120231A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100369269C (en) * 2003-12-10 2008-02-13 上海华虹Nec电子有限公司 Structur of catching diode (two)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100369269C (en) * 2003-12-10 2008-02-13 上海华虹Nec电子有限公司 Structur of catching diode (two)

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