JPH06119719A - Magnetic tape and digital video tape recorder - Google Patents

Abstract

PURPOSE:To record video data without being influenced by a vibration of a magnetic tape to be generated immediately after a magnetic head is brought into contact with the magnetic tape. CONSTITUTION:A track on the magnetic tape is formed with an ATF area, an audio data recording area AUDIO, a video data recording area VIDEO, a subcode recording area SUBCODE and an ATF recording area in order in the direction from commencing the contact of the magnetic head H. Audio data not processed of compression is recorded in the audio data recording area, while video data processed of compression and audio data processed of compression are recorded in the video data recording area.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic tape and a digital video suitable for use in digitally recording, for example, an NTSC video signal or a high-definition television signal represented by high definition on a magnetic tape. Regarding tape recorders.

[0002]

2. Description of the Related Art The present applicant has previously proposed a digital video tape recorder as Japanese Patent Application No. 2-294672.
In the previous proposal, the format of the track on the magnetic tape is defined as shown in FIG.

That is, as shown in FIG. 22A, an ATF signal (pilot signal) for tracking is recorded at the beginning of a track, video data and audio data are recorded next, and then audio is recorded. The data is recorded. Then, sub data (sub code) is recorded next to the audio data. In an area where video data and audio data are mixedly recorded, audio data is arranged at the end of the sync block and video data is arranged before it, as shown in FIG. ing.

[0004]

As described above, in the above proposal, the ATF signal is arranged at the head of the track, and the noise caused by the vibration of the magnetic tape immediately after the magnetic head starts contact with the magnetic tape causes a noise in the video signal. Or not appearing in the audio signal. However, in this proposal, since the video signal is reproduced next after the ATF signal ends, this video signal may be affected by the vibration of the magnetic tape.

The present invention has been made in view of the above circumstances, and is intended to reduce the possibility that a video signal is affected by vibration of a magnetic tape.

[0006]

The magnetic tape of the present invention comprises:
A magnetic tape on which video data and audio data are digitally recorded. A plurality of tracks are formed on the magnetic tape, and on the tracks, an audio data recording area in which audio data is recorded and a video in which video data is recorded. The data recording area and the subcode recording area in which the subcodes associated with the audio data and the video data are recorded are formed in that order.

The digital video tape recorder of the present invention is a digital video tape recorder for digitally recording video data and audio data on a track on a magnetic tape. In the digital video tape recorder, magnetic heads 17A and 17B as recording means for recording data on the track. And magnetic head 1
The mixing circuit 12 is provided as a control means for controlling the data supplied to the 7A and 17B and recording the data on the track according to a predetermined format. The mixing circuit 12 includes audio data, video data, and sub-data accompanying the audio data and the video data. The code is recorded in the audio data recording area, the video data recording area, and the subcode recording area on the track in that order.

In addition to video data, compressed audio data can be recorded in the video data recording area. In the audio data recording area, uncompressed audio data can be recorded.

Further, the tracking signal used for the tracking servo can be recorded in the tracking signal recording area before the audio data recording area and in the tracking signal recording area after the subcode recording area.

Video data can be recorded on a track as a product code. Furthermore, the audio data can be generated as a 2-channel data having a sampling frequency of 48 kHz and a quantization bit number per sample of 16 bits, or a 32-kHz, 12-bit, 4-channel data. In addition, the video data D
By CT processing, the ratio of the audio data recording area to the video data recording area can be made about 1:10.

[0011]

In the magnetic tape having the above structure, the audio data recording area, the video data recording area and the subcode recording area are formed in this order on the track. Therefore, a reproduced image with less noise can be obtained as compared with the case where video data having a frequency higher than that of audio data is arranged first.

Further, in the digital video tape recorder of the present invention, each data is recorded on each track in the order of audio data, video data and subcode. Therefore, it becomes possible to reduce the influence of the vibration of the magnetic tape.

[0013]

FIG. 1 shows a track format on a magnetic tape of a digital video tape recorder of the present invention. For example, when recording an NTSC video signal,
The data for one frame is recorded on ten tracks of this format. As shown in the figure, in this embodiment, signals are arranged as follows in order from the side (the left side in the figure) where the magnetic head starts contacting the magnetic tape. 4 in the first 455 bytes and the last (the side where the magnetic head separates from the magnetic tape (right side in FIG. 1))
The 55-byte period is a margin area.
Then, substantial data is recorded in the period of 16089 bytes between these two margin areas.

Next to the first margin area, 60 bytes of T amble are recorded. Since this amble is immediately after the contact with the magnetic head, the PL that generates the clock is generated.
Considering the pull-in of L, it is formed slightly longer than other ambles. In the next 237-byte period, AT
A region F1 is formed. In this area, the pilot signals f1, f2, f _N for tracking are recorded, and the timing sync signal f _T is also recorded. In the A channel track, the signal f _T is recorded in the first 6 × 6 byte section, and the pilot signals f1 and f _N for tracking are recorded in the remaining section. On the other hand, B
In the channel track, the signal f _T is recorded in the first section of 6 × 10 bytes, and the pilot signals f _N and f2 for tracking are recorded in the remaining section. However, the pilot signal f2 is recorded once every four tracks are adapted to the pilot signal f _N are recorded in the remaining three tracks.

In the signal f _T , 6 bytes are recorded as 1 unit (1 block), the first 2 bytes are sync data,
The next 2 bytes are ID data, and the next 1 byte is ID parity (ID _P ). The remaining 1 byte is reserved for future use.

[0016]

[Table 1]

As the ID data, data shown in Table 1 is recorded. That is, a flag (SP / LP) indicating the distinction between the SP mode with a short recording time and the LP mode with a long recording time, and 2-bit data (RTY) indicating the distinction between video, audio or subcode.
PE1 and RTYPE0) are recorded. Further, the position (sync number) from the beginning of the timing sync signal f _T can be known from the 4-bit data (SYNC0 to SYNC4). That is, in this embodiment, the number of timing sync signals f _T is 6 for the A channel track and 10 for the B channel track, but the position is indicated by this sync number.

Next, the principle of tracking control will be described. The A channel track and the B channel track are alternately arranged, and the pilot signal f1 is detected when the magnetic head is reproducing the A channel track. When the pilot signal f1 is detected, after a predetermined time has elapsed from that time, the pilot signal f2 as a crosstalk component from the adjacent track is detected. The recording length of the pilot signal f1 is adapted to be short when the pilot signal f2 is detected from the B channel track adjacent to the right side, and when the pilot signal f2 is detected from the B channel track adjacent to the left side. , Is set to be long.

Therefore, by detecting the length of the pilot signal f1, the detected pilot signal f2 is a crosstalk component from the right track or a crosstalk component from the left track. Will be recognized. The level of the crosstalk component from the right track of the pilot signal f2 is temporarily sampled and held. After that, when the next A channel track is reproduced, the level detected as the crosstalk component from the B channel track adjacent to the left side is sampled and held. Then, tracking control is performed so that the levels of both are equal.

After the above ATF1, an amble area is formed for a period of 176 bytes. The predetermined period before the amble area is 131-byte IBG.
It is set as a region (inter block gap region). In the subsequent preamble area, a clock necessary for detecting audio data in the audio data recording area that follows is recorded for a period of 45 bytes.

Next to the amble area, an audio data recording area of 1274 bytes (recording area dedicated to audio data) is arranged. In this audio data recording area, uncompressed audio data is recorded as it is. That is, for example, data that is digital data with a sampling frequency of 48 kHz for an analog audio signal of 2 channels and a quantization bit number of 16 bits is directly recorded here (32 kHz, 12
Bits and 4 channels of data are also possible).
However, the formation of the audio data recording area is an option, and the recording can be performed as necessary. As a result, when it is not necessary to record / reproduce a high-quality audio signal, a circuit therefor can be omitted, and a more inexpensive device can be realized. The audio data can be after-recorded.

Next to the audio data recording area, 18
An amble area of a 2-byte period is formed. This amble area includes a 6-byte postamble period following the audio data recording area and a 45-byte preamble period preceding the subsequent video data recording area. And between the two amble areas, 13
A 1-byte IBG area is formed.

The video data recording area has a length of 13377 bytes. In the video data recording area, as will be described later, for example, video data compressed by DCT (discrete cosine transform) processing is recorded, and also audio data compressed by DPCM is recorded. There is. Audio data in this area is not an option, but is mandatory. That is, even when the audio data is not recorded in the dedicated audio data recording area, by reproducing the audio data recorded together with the video data in the video data recording area,
It is possible to enjoy both video and audio.

Next to the video data recording area, an amble area having a period of 182 bytes is formed. This amble area also has a postamble area (6 bytes) and a preamble area (45 bytes) formed in the same manner as in the amble area formed on the start point side of the video data recording area, and an IBG area between them. (131 bytes) are formed. The postamble area follows the video data recording area, and the next preamble area precedes the subcode recording area.

The subcode recording area is set for a period of 144 bytes. In this area, subcodes associated with video data and audio data recorded in the video data recording area or audio data recording area, such as data and time code required for high-speed access, are recorded.

Next to the subcode recording area, an amble area having a period of 220 bytes is formed. This amble area is also divided into a postamble area (44 bytes) following the subcode recording area and a preamble area (45 bytes) preceding the ATF area.
An area (131 bytes) is formed.

The area of ATF2 has a period of 237 bytes, and the same data as in the case of ATF1 described above is recorded in this area.

As described above, in the embodiment shown in FIG.
An ATF area (ATF1) is arranged on the side where the magnetic head starts contact with the magnetic tape, and an audio data recording area which is an option is arranged next to the ATF area. And
Following that, a video data recording area in which video data and essential audio data are recorded is arranged.

As described above, formation of the audio data recording area is optional. As a result, when audio data is not recorded here,
Even if the magnetic tape vibrates immediately after the magnetic head comes into contact with the magnetic tape, the reproduced data is not affected because data is not substantially recorded in the audio data recording area. Further, even if the audio data is recorded here, the frequency of the audio data is lower than that of the video data, so that the influence thereof is less than that of the video data. Therefore, it is preferable to arrange the audio data recording area before the video data recording area.

Next, the data format in the video data recording area, the audio data recording area or the subcode recording area will be described with reference to FIGS.

FIG. 2 shows a data format in the video data recording area. In this area,
A sync block having a length of 91 bytes is a recording unit. At the beginning of each sync block, a 2-byte sync and a 3-byte ID are recorded, followed by the subsequent 2
Compressed audio data is recorded during the byte period. As described above, this audio data (Embedded AUDIO) is essential audio data. Following this audio data, video data is recorded in a 76-byte period, and parity is arranged in the last 8 bytes.

The 2-byte audio data, 76-byte video data and 8-byte parity are 49
The sync blocks are collected to form a product code. By constructing the product code in this way,
Not only horizontal parity C1 but also vertical parity C
2 is generated, which enables more accurate error correction. In this embodiment, 45 sync blocks are used as audio data and video data, and 4 sync blocks are used as the parity C2.

This (78 + 8) × 49 bytes (= 421
3 bytes (12642 bytes) in the video data recording area of 13377 bytes of FIG.
Minutes have been placed. The sync and the ID are arranged in the remaining period of the video data recording area.

FIG. 3 shows a data format in the audio data recording area in FIG. As shown in the figure, as in the case of the video data shown in FIG. 2, this audio data is recorded in units of sync blocks each having a length of 91 bytes. The first 2 bytes are the sync, and the next 3 bytes are the ID. Then, the following 78 bytes are used as audio data. Here, as described above, the optional high-quality (uncompressed) audio data is recorded. Following the 78-byte data, 8-byte parity is arranged.

In this way, by making the processing unit the same in the case of video data and the case of audio data (by setting the sync block having substantially the same configuration as a unit), the processing circuit of the video data and the audio data are processed. The data processing circuit can be similarly configured,
The hardware configuration is simplified.

This 78-byte audio data,
Eight bytes of parity are collected for 14 sync blocks to form a product code. And in the case of this audio data, as shown in FIG.
The horizontal parity C1 is arranged at one end (the right end in the embodiment), and the vertical parity C2 is arranged at the center. That is, the upper 5 sync blocks and the lower 5 sync blocks are respectively used as the audio data area, and the middle 4 sync blocks are used as the parity C2 area.

When the parity C2 is arranged in the center in this way, even if the audio data for the upper 5 sync blocks is continuously destroyed, the audio data for the lower 5 sync blocks remains. Therefore,
The destroyed data can be interpolated from the remaining audio data. It is empirically known that if the audio data is destroyed every other sample, a signal close to the original signal can be obtained by correcting this. Therefore, as in this embodiment, the area is divided into an upper area and a lower area, for example, odd-numbered sampling data is arranged in the upper area, and even-numbered sampling data is arranged in the lower area. If the data in one area is destroyed, a signal close to the original signal can be obtained by correcting from the other data.

The product codes shown in FIGS. 2 and 3 are arranged so that three blocks are put together and corresponding sync blocks of different blocks are sequentially recorded, as shown in FIG. That is, for example, after the data of the uppermost sync block (sync block with number 0) of the leftmost block is recorded first, then the uppermost sync block (sync block with number 1) of the next central block is recorded. Data is recorded, and subsequently, the data of the uppermost sync block (sync block with number 2) of the rightmost block is further recorded. Next, returning to the leftmost block, the second sync block from the top (sync block with number 3) is recorded, and thereafter, the right sync block is recorded sequentially. By recording in this way, it becomes easy to restore the data when the data is dispersed and the magnetic tape is damaged.

FIG. 4 shows the data format of the subcode recorded in the subcode recording area of FIG.
In this embodiment, a sync block having a length of 12 bytes is a recording unit. The first 2 bytes are the sync, and the next 3 bytes are the ID. Then, the following 5 bytes are used as data, and the subcode is recorded here. The last 2 bytes are used as the parity.

Also in this case, 12 sync blocks having a length of 12 bytes are collected to generate a product code. However, in this case, the horizontal parity C1
Only used.

As described above, 16-bit data of 48 kHz for the left and right channels can be recorded in the audio data recording area of FIG. 1 at a bit rate of 1.872 Mbps. The bit rate of this area added with parity, sync, ID, etc. is 3.0576 Mbps.
Becomes

In the video data recording area, 24.
Since audio data, parity, sync, and ID are recorded in addition to 624 Mbps video data, the bit rate of this area is 32.1048 Mbps.

Further, in the subcode recording area, 144
Since the parity, sync, and ID are recorded in addition to the kbps data, the bit rate of this area is 345.6 kb.
ps.

Since the IGB, amble, and ATF signals are recorded on the entire magnetic tape, the total bit rate is 38.6136 Mbps.

Next, with reference to FIGS. 6 and 7, an embodiment of a digital video tape recorder for recording and reproducing data of the above-mentioned format will be described.

FIG. 6 shows the structure of the recording system.
Digital luminance signals Y and digital color difference signals U and V formed from, for example, three primary color signals R, G and B output from a color video camera (not shown) are supplied to input terminals 1Y, 1U and 1V, respectively. To be done. In this case, the clock rate of each signal is 13.5MHz or 6.75MHz
And the number of bits per sample is 8
It is considered a bit.

Of this signal, the data amount is compressed by the effective information extraction circuit 2 which removes the data in the blanking period and extracts only the information in the effective area. Of the output of the effective information extraction circuit 2, the luminance signal Y is supplied to the frequency conversion circuit 3 and the sampling frequency is converted from 13.5 MHz to 3/4 thereof. As the frequency conversion circuit 3, for example, a thinning filter is used so that aliasing distortion does not occur. The output signal of the frequency conversion circuit 3 is supplied to the blocking circuit 5, and the order of luminance data is converted into the order of blocks. The blocking circuit 5 is
It is provided for the block encoding circuit 8 provided in the subsequent stage.

For block coding, DCT, ADRC
(Encoding adapted to the dynamic range) or the like can be adopted. One block has 8 × 8 pixels.

Of the outputs of the effective information extraction circuit 2,
The two color difference signals U and V are supplied to the sub-sampling and sub-line circuit 4, and the sampling frequency is converted from 6.75 MHz to a half thereof respectively, and then two digital color difference signals are alternately selected for each line, and one channel is selected. Is combined with the data of. Therefore, from this subsampling and subline circuit 4, a line-sequential digital color difference signal is obtained.

Subsampling and subline circuit 4
The line sequential output signal is supplied to the blocking circuit 6. Similar to the blocking circuit 5, the blocking circuit 6 converts color difference data in the scanning order of the television signal into data in the block order. Similar to the blocking circuit 5, the blocking circuit 6 converts the color difference data into a block structure of 8 × 8 pixels. The output signals of the blocking circuits 5 and 6 are supplied to the combining circuit 7.

In the synthesizing circuit 7, the luminance signal and chrominance signal converted in the order of blocks are converted into 1-channel data, and the output signal of the synthesizing circuit 7 is supplied to the block coding circuit 8. As the block encoding circuit 8,
Similar to the blocking circuits 5 and 6, a coding circuit (ADRC) adapted to the dynamic range of each block, a DCT
Circuits etc. can be applied. The output signal of the block encoding circuit 8 is supplied to the framing circuit 9 and converted into frame structure data. In the framing circuit 9, the image system clock and the recording system clock are changed.

The digital audio data input from the input terminal 1A ₁ is the audio processing circuit 1
8 and is subjected to processing required for recording. The output data of the audio processing circuit 18 is supplied to the parity generation circuit 19, and the parity of the product code which is an error correction code is generated (FIG. 3). In this way, the audio data and the parity to be recorded in the audio data recording area described above are supplied to the mixing circuit 12.

The output signal of the framing circuit 9 is supplied to the parity generating circuit 11 via the contact a of the switch 10, and the parity of the product code is generated. The output signal of the parity generation circuit 11 is supplied to the mixing circuit 12. The mixing circuit 12 is also supplied with the output signals of the parity generating circuits 19 and 27, respectively. The parity generation circuit 19
The parity of the error correction code is generated for the output data of the audio encoding circuit 18. Parity generation circuit 27
Performs error correction coding processing on the subcode input from the input terminal 1S to generate parity. For the sub-code, only the inner code is used among the product codes having the inner code and the outer code as the error correction code.

The sub-code supplied to the input terminal 1S is
It is generated from the subcode generation circuit 24. Further, the ID or sync generated by the ID generation circuit 25 or the sync generation circuit 26 is supplied to the input terminal 1S. The timing signal generating circuit 23 includes a sub code generating circuit 24, I
The D generating circuit 25 and the sync generating circuit 26 are respectively supplied with necessary predetermined timing signals.

In the mixing circuit 12, the video data, the audio data, and the data in which the subcode is inserted are formed at predetermined positions on one track (FIG. 1). The output signal of the mixing circuit 12 is supplied to the channel encoder 13, and channel coding is performed so as to reduce the low frequency part of the recording data. Channel encoder 13
Is supplied to the mixing circuit 14. Mixing circuit 14
From the input terminal 15 to the pilot signal f for ATF.
1, f2, f _N are supplied. This pilot signal is
It is a low-frequency signal that can be frequency separated from recorded data. The output signal of the mixing circuit 14 is the recording amplifiers 16A, 16
Magnetic head 17 through B and a rotary transformer (not shown)
It is supplied to A and 17B and recorded on the magnetic tape.

On the other hand, the audio data input from the input terminal 1A ₂ (this audio data is
₁ may be the same as or different from the data inputted from ₁ ) and is inputted to the audio compression circuit 21 and, for example, about 300 by DPCM.
It is compressed to kbps. This data is supplied to and stored in the memory 22. The framing circuit 9 controls the memory 22 in the audio data recording area in the video data recording area shown in FIG. 2 to read the audio data stored therein. At this time, the framing circuit 9 switches the switch 10 to the contact b side. As a result, the audio data read from the memory 22 passes through the contact b of the switch 10 and the parity generation circuit 11
And the parity data is added. This data is supplied to the mixing circuit 12, and is supplied to the magnetic heads 17A and 17B for recording in the same manner as described above.

Next, the structure of the reproducing system will be described with reference to FIG.

In FIG. 7, magnetic heads 17A and 17B are provided.
Reproduction data from the channel decoder 3 via a rotary transformer (not shown) and reproduction amplifiers 31A and 31B.
2 and the ATF circuit 52, respectively. The channel decoder 32 demodulates (decodes) the channel code, and the output signal of the channel decoder 32 is supplied to the TBC circuit (time axis correction circuit) 33. In this TBC circuit 33, the time-axis fluctuation component of the reproduction signal is removed. As described above, the ATF circuit 52 generates a tracking error signal from the level of the crosstalk component of the reproduced pilot signal f2, and supplies this tracking error signal to, for example, a phase servo circuit (not shown) of the capstan servo. To be done.

The reproduced data from the TBC circuit 33 is ECC.
It is supplied to the circuits 34, 44 and 46, and the error correction using the product code and the error that cannot be corrected are performed. The ECC circuit 34 performs error correction and error correction on video data (including audio data recorded in the video data recording area), and the ECC circuit 44 corrects error in audio data recorded in the audio data recording area. And error correction,
The ECC circuit 46 performs error correction on the subcode. E
The output signal of the CC circuit 44 is supplied to the audio processing circuit 45, and processing necessary for reproducing the audio signal is performed. Output data of the audio processing circuit 45 is output terminal 4
It is output from 3A ₁ to a circuit (not shown). ECC circuit 46
The reproduced sub-code is taken out to the output terminal 43S of. This subcode is supplied to a system controller (not shown) for controlling the operation of the entire VTR. The output signal of the ECC circuit 34 is the frame decomposition circuit 35.
Is supplied to.

The frame decomposing circuit 35 separates the respective components of the block coded data of the video data from each other and changes the clock of the recording system to the clock of the image system. Each data separated by the frame decomposing circuit 35 is supplied to the block decoding circuit 36, and the restored data corresponding to the original data is decoded for each block.

The decoded data of the video data from the block decoding circuit 36 is supplied to the distribution circuit 37. The distribution circuit 37 separates the decoded data into a luminance signal and a color difference signal. The luminance signal and the color difference signal are supplied to the block decomposition circuits 38 and 39, respectively. Block decomposition circuit 38
And 39 reverse the decoding circuits 5 and 6 on the reproducing side to convert the decoded data in the order of blocks into the order of raster scanning.

The decoded luminance signal from the block decomposition circuit 38 is supplied to the interpolation filter 40. In the interpolation filter 40, the sampling rate of the luminance signal is from 3fs (fs is a color subcarrier frequency) to 4fs (4fs = 13.
5 MHz). The digital luminance signal Y from the interpolation filter 40 is taken out to the output terminal 43Y.

On the other hand, the digital color difference signal from the block decomposition circuit 39 is supplied to the distribution circuit 41, and the line-sequential digital color difference signals U and V are separated. The digital color difference signals U and V separated by the distribution circuit 41 are supplied to the interpolation circuit 42 and are interpolated. Interpolation circuit 4
2 is to interpolate the data of the thinned pixels using the restored video data. From the interpolation circuit 42, digital color difference signals U and V with a sampling rate of 4fs are obtained, and the output terminals 43U, It is taken out to each 43V.

On the other hand, the audio data recorded in the video data recording area outputted from the ECC circuit 34 is supplied to the memory 49 and stored therein after being subjected to error correction. The ECC circuit 34 also supplies to the memory 49 an error flag indicating the position of the error that could not be corrected. In the memory 49, the data that is input corresponding to this error flag and that could not be error-corrected is also written. The data written in the memory 49 is
The compressed audio decoding circuit 50 supplies the compressed audio decoding circuit 50 to perform compression decoding. The decoded data is further supplied to the interpolation circuit 51. In the interpolation circuit 51, the data corresponding to the error flag is interpolated. The output of the interpolation circuit 51 is output to a circuit (not shown) via the output terminal 43A ₂ .

The signal output from the TBC circuit 33 is
It is input to the f _T signal processing circuit 47. f _T signal processing circuit 4
7 detects the sync and ID in the ATF area shown in FIG. 1 from the input signal. And this ID
The position is determined from the data (sync number) (Table 1) indicating the sync position in the counter, and the counter 4 is determined at a predetermined timing.
8 is operated. The counter 48 includes the magnetic head 17A,
A timing signal corresponding to the reproduction position of 17B is output from the output terminal 43T. Therefore, the system controller controls after-recording on the basis of the timing signal output from the output terminal 43T.

In the embodiment of FIG. 2, 135 (= 45 × 3) sync blocks are recorded in the video data recording area of one track (FIG. 1). With such a configuration, it is possible to reduce the scale of the device, but from the viewpoint of parity redundancy, there is much waste.

Therefore, the format in the video data recording area of one track can be set, for example, as shown in FIG. In this example, a total of 147
It is similar to the case in FIG. 2 that it is composed of (= 136 + 11 = 49 × 3) sync blocks, but of these 136 sync blocks are used for recording data, and the remaining 11 sync blocks are used. The block is adapted to be used as the parity C2 of the 136 sync block. In other words, in this embodiment, one track is provided with one product code.

That is, in the embodiment shown in FIG. 8, the product code is RS (86,78,9) × RS (147,136,36).
12). With this, 187.2 kb
Data of ps (= 78 × 8 × 300) can be recorded.

The video data is compressed in units of macro blocks. In a digital video tape recorder, there are 135 macroblocks in one track. In the embodiment of FIG. 2, 135 (= 45
Data of one macroblock is recorded in each of the (3) sync blocks.

On the other hand, in the embodiment shown in FIG.
Processing data for each macroblock is recorded in each of 135 sync blocks out of 36 sync blocks. The remaining one sync block is used when recording other data. As other data, for example, text broadcasting, future digital broadcasting (ATV)
Etc. can be given.

As shown in FIG. 9, the ATV is 148 (= 1
The length of the sync block is + 127 + 20) bytes. The first 1 byte is the sync pattern, the last 20 bytes is the parity, and 127 bytes in between are the data.

When this ATV data is recorded by the digital video tape recorder in the format shown in FIG.
As shown in, the data of one sync block of 148 bytes of ATV is divided into two sync blocks of 86 bytes of the digital video tape recorder and recorded.

By recording in this way, even if one sync block cannot read data,
The error can be contained within the sync block. As a result, it is possible to improve the quality during reproduction when ATV data is recorded. On the other hand, considering the case where the data is jointly shot, it is preferable to avoid recording the data of one sync block over two tracks. Therefore, in such a case, as shown in FIG. 8, 136 (even number) sync blocks are recorded on one track.

Of course, the format is constructed as shown in FIG. 2, and AT is set in 134 sync blocks among them.
It is also possible to record V data. However,
In that case, one sync block per track is substantially wasted. Therefore, it is preferable to configure as shown in FIG.

FIG. 10 shows a comparison of the symbol error rates in the case of the format shown in FIG. 2 (FIG. 10A) and the case of the format shown in FIG. 8 (FIG. 10B). As is clear from the figure, as shown in FIG. 8, the correction capability is higher when 11 sync blocks are used as the parity C2.

In FIG. 10, the arithmetic operation is performed assuming that the erasure can be performed up to 3 erasures in the method of FIG. 2 and 11 erasures in the method of FIG.

FIG. 11 shows an example of the structure of a recording system having the format shown in FIG. In the embodiment shown in FIG. 11, the switch 10 is provided with a contact c in addition to the contacts a and b, and data is supplied to the contact c from the FIFO 73 controlled by the memory controller 74. The configuration is similar to that in FIG.

In this embodiment, data such as ATV (FIG. 12A) is supplied to the FIFO 73 from the input terminal 71 via the digital interface. In addition, a sync pulse synchronized with the digital data (see FIG. 1) is input to the input terminal 72 via a digital interface.
2 (B)) is supplied. Memory controller 74
Causes the FIFO 73 to write the data supplied from the input terminal 71 in response to the sync pulse.

As shown in FIG. 9, the data of one sync block of this ATV is taken in as the data of two sync blocks in this digital video tape recorder. Therefore, the remaining 24 bytes (= 86
It is also possible to allocate data other than ATV to (X2-148).

The memory controller 74 reads this ATV data according to the format shown in FIG. 8 and supplies it to the contact c of the switch 75. Switch 75 has contact c
This signal is switched to the parity generation circuit 1 when switched to
Output to 1. The parity generation circuit 11 generates the parity C1 and the parity C2 shown in FIG. 8, adds them, and outputs them to the mixing circuit 12.

The following operation is the same as when the stitch 10 is switched to the contact a or b.

FIG. 13 shows an example of the structure of a reproducing system corresponding to the recording system shown in FIG. In this embodiment, the output of the ECC circuit 34 is supplied to the FIFO 81. Writing and reading of the FIFO 81 are controlled by the memory controller 82. Then, the data read from the FIFO 81 is supplied from the output terminal 83 to a circuit (not shown). Other configurations are the same as those in FIG.

That is, in this embodiment, F in FIG.
The data output from the IFO 73 and supplied to the parity generation circuit 11 via the contact c of the switch 10 is recorded on the magnetic tape and reproduced. Then, the reproduced data is output from the ECC circuit 34 and supplied to the FIFO 81. At this time, the memory controller 82
The O81 is controlled so that only the necessary data is taken into the FIFO81. Then, this data is read by the memory controller 82 according to the ATV format, and is output from the output terminal 83 to a circuit (not shown).

In the format shown in FIG. 2, R
The product code of S (86,78) × RS (49,45) is 1
Although three are used for the tracks, in the format shown in FIG. 8, RS (86,78) × RS (1
47, 136). As described above, one macro block (MB), which is the compression unit of the digital video tape recorder, is recorded in one sync block (78 bytes). Since 135 macro blocks are recorded on one track, one sync block is left in the case of the format shown in FIG.

A compression method is defined such that five macro blocks are collected and the rate after compression is constant. Therefore, considering the product code, 5 sync blocks are regarded as one signal processing unit. Therefore, in the format shown in FIG. 8, for example, as shown in FIG.
The audio data can be arranged in each sync block.

In the embodiment of FIG. 14, of the consecutive 5 sync blocks, the first, third, and fifth sync blocks are used.
The audio data is arranged in the first 2 bytes of the th sync block. Then, in the second and fourth sync blocks, the first two bytes and the fourth sync block
The audio data is arranged in a total of 3 bytes of the 1st byte. In any of the first to fifth sync blocks, the third 1 byte contains the quantization number (Q
No) is arranged. 1st, 3rd, and 5th
Invalid data is recorded in the 4th byte of the 4th sync block. Then, in each sync block, the video data is recorded from the 5th byte to the 78th byte.

Further, as shown in FIG. 15, sync number 0
Of the 136 sync blocks from the sync number to the sync number 135, the audio data is recorded in the first 2 bytes of the last 135th block. By doing so, 326 bytes (= 12 × 27 + 2) of audio data can be recorded in one track. In the digital video tape recorder of this embodiment, since 300 tracks are recorded per second, the bit rate of audio data is 782.4 kbps (= 326 × 30).
0x8). Now, assuming that audio data of 32 kHz × 12 bits is recorded for two channels,
The bit rate is 768 kbps (= 32k x 12 x
8 × 2), it is possible to record audio data according to this format.

FIG. 16 shows a state in which audio data is recorded according to such a format. The figure (A) shows the even tracks, and the figure (B) shows the odd tracks.

On the even-numbered track (FIG. 16A), even-numbered sample data L0U, L0L, L2U, L2 of the L channel are provided between sync blocks S0 to S67.
L, ... Are recorded. Further, between sync blocks S68 to S135, data R0U, R0L, R2U, R2L, ...
・ Is recorded. On the other hand, odd tracks (see FIG. 16)
In (B)), odd-numbered sample data R1 of the R channel is provided between sync blocks S0 to S67.
U, R1L, R3U, R3L, etc. are recorded,
Between sync blocks S68 to S135, data L1U, L1L, L3U
L3L, etc. are recorded.

The data indicated by U is composed of 8 bits, while the data indicated by L is composed of 4 bits. Therefore, the data indicated by L is combined with the sampling data in the previous order.

That is, in this embodiment, FIG.
As shown in (A), even-numbered sample data of the R channel and the L channel are arranged from the upstream side to the downstream side in the moving direction of the head on the even-numbered track, and the head moves on the next odd-numbered track. The L-channel odd-numbered sample data and the R-channel odd-numbered sample data are arranged in the direction.

Therefore, for example, even if the data of the sync blocks S68 to S135 cannot be reproduced due to a scratch in the longitudinal direction of the magnetic tape (horizontal direction in FIG. 17 (A)), the L channels of the sync blocks S0 to S67 can be reproduced. Even sample data and R channel odd sample data can be reproduced. Therefore, the original reproduction data can be interpolated from this data. As described above, it is empirically known that if there is one of even-numbered samples or odd-numbered samples, even if the other is missing, a good quality audio signal can be restored by interpolation.

Similarly, even if one of the odd-numbered track and the even-numbered track cannot be reproduced, it is possible to generate a high-quality interpolated sound from the other data.

The arrangement of the audio data of the odd sample and the even sample can be changed to the format shown in FIG. 17B instead of the format shown in FIG. Even in this case, the same interpolation can be performed.

Note that the data indicated by AUX in FIG. 16 is, for example, ID data that accompanies the audio data and indicates whether it is a bilingual broadcast or a stereo broadcast. By arranging a plurality of AUX data at predetermined positions on one track, even if one AUX data is missing, it is possible to obtain the information from other AUX data.

Further, in the case of the format as shown in FIG. 18, if the AUX data is composed of 4 bits, the AUX data will be smaller than that shown in FIG.
It is possible to record many samples.

If the AUX data is recorded in another area, for example, a video AUX data recording area, it can be formatted as shown in FIG. 19 (see FIG. 1).
It is possible to prevent the audio data from being recorded in the sync block S135 by arranging the audio data at the position where the AUX data is arranged in 6).

Next, a circuit for recording / reproducing data in the format shown in FIG. 16, FIG. 18 or FIG. 19 will be described with reference to FIG. 20 and FIG.

FIG. 20 shows a recording system circuit. The audio compression circuit 21 in the recording system shown in FIG.
It is composed of a converter 100 and a conversion circuit 101. Further, the memory 22 is the interleaving memory 111.
And a memory controller 112 for controlling this.

The analog audio signal input from the input terminal 1A ₂ is converted by the A / D converter 100 into digital audio data of 16 bits per sample and input to the conversion circuit 101. The conversion circuit 101 is
16-bit digital data is compressed into 12-bit data and supplied to the interleaving memory 111. The interleaving memory 111 has a C (not shown).
AUX data is also supplied from PU or the like. The memory controller 112 includes a timing signal generation circuit 23 (see FIG.
A predetermined write address is output to the interleaving memory 111 corresponding to the track information generated in 1). As a result, the interleaving memory 111 stores the audio data and the AUX data at the predetermined addresses. As a result, FIG. 16, FIG. 18 and FIG.
The interleaving of the format shown in 9 is performed.

In this way, the interleaving memory 1
The data stored in 11 is stored in the framing circuit 9 (see FIG.
It is read corresponding to the read address supplied from 1) and supplied to the contact b of the switch 10 in FIG.

On the other hand, FIG. 21 shows the structure of the reproducing system. That is, in the reproducing system, the memory 49 shown in FIG.
Is composed of a deinterleaving memory 121 and a memory controller 122 for controlling it. Further, the compressed audio decoding circuit 50 is composed of the conversion circuit 131. Further, in this embodiment, the data output from the interpolation circuit 51 is the D / A converter 132.
The signal is output to the output terminal 43A ₂ via the.

That is, in this embodiment, the ECC 34
The data supplied from the deinterleaving memory 1
21. In addition, the memory controller 122
Supplies a write address to the deinterleaving memory 121 in accordance with the track information output by the timing signal generation circuit 23. As a result, the data input from the ECC 34 is deinterleaved and written at a predetermined address of the deinterleaving memory 121.

The memory controller 122 generates a read address corresponding to the data supplied from the frame decomposing circuit 35 and outputs it to the deinterleaving memory 121. As a result, the deinterleaved audio data is supplied to the conversion circuit 131. Conversion circuit 13
1 decompresses the input 12-bit data into 16-bit data. This decompressed audio data is
After being interpolated by the interpolation circuit 51, the D / A converter 132
It is D / A converted by and output from the output terminal 43A ₂ . Also, the AUX data read from the deinterleaving memory 121 is output to the CPU or the like.

The embodiment of the present invention has been described above.
The number of bytes indicating the length of each area in is an example, and the length can be slightly changed. At this time, in the above embodiment, the ratio of the audio data recording area to the video data recording area is 1: 10.5 (= 1274/133).
77), but this ratio will also change slightly. However, from the viewpoint of efficiency and the like, the ratio is preferably about 1:10.

[0106]

As described above, according to the magnetic tape of the present invention, the audio data recording area, the video data recording area, and the subcode recording area are formed in the track in this order. Even if the magnetic tape vibrates immediately after the contact with, it is possible to reproduce a good image without being affected by the vibration.

Further, according to the digital video tape recorder of the present invention, an audio data recording area is formed on the track,
Since each area is formed in the order of the video data recording area and the subcode recording area, even if the magnetic tape vibrates immediately after the magnetic head comes into contact with the magnetic tape, the effect of this will be reduced and accurate. It becomes possible to record data in.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a track format of a magnetic tape of the present invention.

FIG. 2 is a diagram illustrating a data format in a video data recording area of FIG.

FIG. 3 is a diagram illustrating a data format in an audio data recording area of FIG.

FIG. 4 is a diagram illustrating a data format in a subcode recording area of FIG.

FIG. 5 is a diagram illustrating the order in which the product codes shown in FIGS. 2 and 3 are recorded.

FIG. 6 is a block diagram showing a configuration of a recording system of the digital video tape recorder of the present invention.

FIG. 7 is a block diagram showing a configuration of a reproduction system of the digital video tape recorder of the present invention.

FIG. 8 is a diagram for explaining another example of the configuration of the data format in the video data recording area of FIG.

9 is a diagram illustrating a relationship with sync blocks of a digital video tape recorder when ATV data is recorded according to the format of FIG.

FIG. 10 is a diagram comparing the error correction capabilities of the format of FIG. 2 and the format of FIG.

11 is a block diagram showing a configuration example of a recording system in the case of recording data according to the format of FIG.

FIG. 12 is a timing chart explaining the operation of the embodiment of FIG.

13 is a block diagram showing a configuration example of a reproduction system for reproducing data recorded according to the format of FIG.

FIG. 14 is a diagram illustrating a principle of a format for embedding audio data in a sync block of video data according to the format of FIG.

15 is a diagram illustrating the format of the last sync block in FIG. 8 when audio data is recorded according to the format shown in FIG.

16 is a diagram illustrating a state in which data is recorded according to the formats shown in FIGS. 14 and 15. FIG.

FIG. 17 is a diagram for explaining the relationship between odd-numbered sample and even-numbered sample audio data, and odd-numbered track and even-numbered track.

18 is a diagram showing a state of another track recorded according to the formats shown in FIGS. 14 and 15. FIG.

FIG. 19 is a diagram illustrating a state of yet another track on which audio data is recorded according to the principle shown in FIGS. 14 and 15.

20 is a block diagram showing a configuration of a circuit for performing recording according to the formats shown in FIGS. 14 and 15. FIG.

21 is a block diagram showing a configuration of a circuit for reproducing audio data recorded by the embodiment shown in FIG.

FIG. 22 is a diagram illustrating a track format of a magnetic tape in a conventional digital video tape recorder.

[Explanation of symbols]

 2 Effective Information Extraction Circuit 4 Sub-sample and Sub-line Circuit 5, 6 Blocking Circuit 8 Block Encoding Circuit 9 Framed Circuit 10, 11 Parity Generation Circuit 12, 14 Mixing Circuit 17A, 17B Magnetic Head 21 Audio Compression Circuit 22, 49 Memory 50 compression audio decoding circuit 100 A / D converter 101 conversion circuit 111 interleaving memory 112 memory controller 121 deinterleaving memory 122 memory controller 131 conversion circuit 132 D / A converter

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Keiji Kanata 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Yukio Kubota 6-35 Kita-Shinagawa, Shinagawa-ku, Tokyo No. Sony Corporation

Claims (9)

[Claims] 1. A magnetic tape in which video data and audio data are digitally recorded, wherein a plurality of tracks are formed on the magnetic tape, and audio data recording in which the audio data is recorded is formed on the tracks. An area, a video data recording area in which the video data is recorded, and a subcode recording area in which subcodes associated with the audio data and the video data are recorded are formed in that order. 2. A digital video tape recorder for digitally recording video data and audio data on a track on a magnetic tape, controlling recording means for recording data on the track, and controlling data supplied to the recording means, Control means for recording the track in accordance with a predetermined format, wherein the control means records the audio data, the video data, and the audio data and a subcode accompanying the video data in an audio data recording area on the track. , A digital video tape recorder characterized by recording in a video data recording area and a subcode recording area in that order. 3. The digital video tape recorder according to claim 2, wherein the control unit also records the audio data in the video data recording area. 4. The digital video tape recorder according to claim 2, wherein the control means records the uncompressed audio data in the audio data recording area. 5. The compression means for compressing the audio data is further provided, and the control means records the compressed audio data in the video data recording area. Digital video tape recorder described. 6. The control means records a tracking signal used for tracking servo in a tracking signal recording area before the audio recording area and in a tracking signal recording area after the sub-code recording area. 5. The digital video tape recorder according to any one of 5. 7. The digital apparatus according to claim 2, further comprising arithmetic means for computing a product code of the video data, wherein the recording means records the product code on the track. Video tape recorder. 8. The apparatus further comprises processing means for performing DCT processing on the video data, wherein the control means sets a ratio of the audio data recording area to the video data recording area to about 1:10, and the audio data is sampled. Frequency is 48k
3. The data of 2 channels, wherein the number of quantization bits per sample at 16 Hz is 16 bits.
8. A digital video tape recorder according to any one of 7 to 7. 9. The digital signal according to claim 2, wherein the audio data is 4-channel data having a sampling frequency of 32 kHz and a quantization bit number per sample of 12 bits. Video tape recorder.